23 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
27 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE) && defined(_USART_ROUTEPEN_CTSPEN_MASK)
28 #define UART_HW_FLOW_CONTROL_SUPPORT
33 #if defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
34 #define UART_DMA_IRQ DMA_IRQn
35 #define UART_DMA_IRQHANDLER() DMA_IRQHandler()
36 #elif defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
37 #define UART_DMA_IRQ LDMA_IRQn
38 #define UART_DMA_IRQHANDLER() LDMA_IRQHandler()
40 #error "No valid UARTDRV DMA engine defined."
43 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
44 static bool uartdrvHandleIsInitialized =
false;
48 static bool ReceiveDmaComplete(
unsigned int channel,
49 unsigned int sequenceNo,
51 static bool TransmitDmaComplete(
unsigned int channel,
52 unsigned int sequenceNo,
58 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
63 for (i = 0; i < EMDRV_UARTDRV_MAX_DRIVER_INSTANCES; i++)
65 if (uartdrvHandle[i]->ctsPin == gpioPinNo)
67 return uartdrvHandle[i];
91 static void HwFcManageClearToSend(uint8_t gpioPinNo)
99 handle->fcSelfState = HwFcGetClearToSendPin(handle);
107 handle->IgnoreRestrain =
false;
153 fcSwCode = UARTDRV_FC_SW_XON;
161 fcSwCode = UARTDRV_FC_SW_XOFF;
172 #define HwFcGetClearToSendPin(x) uartdrvFlowControlOn
191 memcpy((
void *)&queue->
fifo[queue->
head],
192 (
const void *)inputBuffer,
194 *queueBuffer = &queue->
fifo[queue->
head];
211 if (queue->
used == 0)
217 *buffer = &queue->
fifo[queue->
tail];
234 if (queue->
used == 0)
240 *buffer = &queue->
fifo[queue->
tail];
251 if (handle->type == uartdrvUartTypeUart)
259 #if defined(USART_ROUTEPEN_TXPEN)
262 handle->peripheral.uart->ROUTE |= USART_ROUTE_TXPEN;
265 else if (handle->type == uartdrvUartTypeLeuart)
276 #if defined(LEUART_ROUTEPEN_TXPEN)
279 handle->peripheral.leuart->ROUTE |= LEUART_ROUTE_TXPEN;
289 if (handle->type == uartdrvUartTypeUart)
292 #if defined(USART_ROUTEPEN_TXPEN)
295 handle->peripheral.uart->ROUTE &= ~USART_ROUTE_TXPEN;
300 else if (handle->type == uartdrvUartTypeLeuart)
306 #if defined(LEUART_ROUTEPEN_TXPEN)
309 handle->peripheral.leuart->ROUTE &= ~LEUART_ROUTE_TXPEN;
321 if (handle->type == uartdrvUartTypeUart)
329 #if defined(USART_ROUTEPEN_RXPEN)
332 handle->peripheral.uart->ROUTE |= USART_ROUTE_RXPEN;
335 else if (handle->type == uartdrvUartTypeLeuart)
346 #if defined(LEUART_ROUTEPEN_RXPEN)
349 handle->peripheral.leuart->ROUTE |= LEUART_ROUTE_RXPEN;
359 if (handle->type == uartdrvUartTypeUart)
362 #if defined(USART_ROUTEPEN_RXPEN)
365 handle->peripheral.uart->ROUTE &= ~USART_ROUTE_RXPEN;
370 else if (handle->type == uartdrvUartTypeLeuart)
376 #if defined(LEUART_ROUTEPEN_RXPEN)
379 handle->peripheral.leuart->ROUTE &= ~LEUART_ROUTE_RXPEN;
394 handle->rxDmaActive =
true;
395 if (handle->type == uartdrvUartTypeUart)
397 rxPort = (
void *)&(handle->peripheral.uart->RXDATA);
399 else if (handle->type == uartdrvUartTypeLeuart)
401 rxPort = (
void *)&(handle->peripheral.leuart->RXDATA);
405 handle->rxDmaActive =
false;
428 handle->txDmaActive =
true;
429 if (handle->type == uartdrvUartTypeUart)
431 txPort = (
void *)&(handle->peripheral.uart->TXDATA);
433 else if (handle->type == uartdrvUartTypeLeuart)
435 txPort = (
void *)&(handle->peripheral.leuart->TXDATA);
439 handle->txDmaActive =
false;
457 static bool ReceiveDmaComplete(
unsigned int channel,
458 unsigned int sequenceNo,
468 GetTailBuffer(handle->rxQueue, &buffer);
470 if (handle->type == uartdrvUartTypeUart
477 else if (handle->type == uartdrvUartTypeLeuart
484 else if (handle->type == uartdrvUartTypeUart
491 else if (handle->type == uartdrvUartTypeLeuart
511 DequeueBuffer(handle->rxQueue, &buffer);
513 if (handle->rxQueue->used > 0)
515 GetTailBuffer(handle->rxQueue, &buffer);
516 StartReceiveDma(handle, buffer);
520 #if EMDRV_UARTDRV_FLOW_CONTROL_ENABLE
522 FcApplyState(handle);
524 handle->rxDmaActive =
false;
528 DisableReceiver(handle);
539 static bool TransmitDmaComplete(
unsigned int channel,
540 unsigned int sequenceNo,
550 GetTailBuffer(handle->txQueue, &buffer);
552 EFM_ASSERT(buffer != NULL);
564 DequeueBuffer(handle->txQueue, &buffer);
566 if (handle->txQueue->used > 0)
568 GetTailBuffer(handle->txQueue, &buffer);
569 StartTransmitDma(handle, buffer);
573 handle->txDmaActive =
false;
602 #if defined(_USART_ROUTELOC0_MASK)
605 #if defined(USARTRF0)
607 else if (handle->peripheral.uart == USARTRF0)
614 #if defined(USARTRF1)
616 else if (handle->peripheral.uart == USARTRF1)
625 else if (handle->peripheral.uart ==
USART0)
634 else if (handle->peripheral.uart ==
USART1)
643 else if (handle->peripheral.uart == USART2)
652 else if (handle->peripheral.uart == USART3)
661 else if (handle->peripheral.uart == USART4)
670 else if (handle->peripheral.uart == USART5)
679 else if (handle->peripheral.uart == UART0)
688 else if (handle->peripheral.uart == UART1)
697 else if (handle->peripheral.uart == UART2)
712 #if defined(USARTRF0)
714 else if (handle->peripheral.uart == USARTRF0)
718 handle->txPin = AF_USARTRF0_TX_PIN(initData->portLocation);
719 handle->rxPin = AF_USARTRF0_RX_PIN(initData->portLocation);
721 #if defined(USARTRF1)
723 else if (handle->peripheral.uart == USARTRF1)
727 handle->txPin = AF_USARTRF1_TX_PIN(initData->portLocation);
728 handle->rxPin = AF_USARTRF1_RX_PIN(initData->portLocation);
732 else if (handle->peripheral.uart ==
USART0)
736 handle->txPin = AF_USART0_TX_PIN(initData->portLocation);
737 handle->rxPin = AF_USART0_RX_PIN(initData->portLocation);
741 else if (handle->peripheral.uart ==
USART1)
745 handle->txPin = AF_USART1_TX_PIN(initData->portLocation);
746 handle->rxPin = AF_USART1_RX_PIN(initData->portLocation);
750 else if (handle->peripheral.uart == USART2)
754 handle->txPin = AF_USART2_TX_PIN(initData->portLocation);
755 handle->rxPin = AF_USART2_RX_PIN(initData->portLocation);
759 else if (handle->peripheral.uart == UART0)
763 handle->txPin = AF_UART0_TX_PIN(initData->portLocation);
764 handle->rxPin = AF_UART0_RX_PIN(initData->portLocation);
768 else if (handle->peripheral.uart == UART1)
772 handle->txPin = AF_UART1_TX_PIN(initData->portLocation);
773 handle->rxPin = AF_UART1_RX_PIN(initData->portLocation);
782 handle->ctsPort = initData->
ctsPort;
783 handle->ctsPin = initData->
ctsPin;
784 handle->rtsPort = initData->
rtsPort;
785 handle->rtsPin = initData->
rtsPin;
796 #if defined(_LEUART_ROUTELOC0_MASK)
801 else if (handle->peripheral.leuart ==
LEUART0)
810 else if (handle->peripheral.leuart == LEUART1)
827 else if (handle->peripheral.leuart ==
LEUART0)
831 handle->txPin = AF_LEUART0_TX_PIN(initData->portLocation);
832 handle->rxPin = AF_LEUART0_RX_PIN(initData->portLocation);
836 else if (handle->peripheral.leuart == LEUART1)
840 handle->txPin = AF_LEUART1_TX_PIN(initData->portLocation);
841 handle->rxPin = AF_LEUART1_RX_PIN(initData->portLocation);
850 handle->ctsPort = initData->
ctsPort;
851 handle->ctsPin = initData->
ctsPin;
852 handle->rtsPort = initData->
rtsPort;
853 handle->rtsPin = initData->
rtsPin;
867 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
872 GPIO_IntConfig(handle->ctsPort, handle->ctsPin,
true,
true,
true);
885 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
890 GPIO_IntConfig(handle->ctsPort, handle->ctsPin,
true,
true,
false);
902 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
912 if (!uartdrvHandleIsInitialized)
914 for (handleIdx = 0; handleIdx < EMDRV_UARTDRV_MAX_DRIVER_INSTANCES; handleIdx++)
916 uartdrvHandle[handleIdx] = NULL;
918 uartdrvHandleIsInitialized =
true;
922 for (handleIdx = 0; handleIdx < EMDRV_UARTDRV_MAX_DRIVER_INSTANCES; handleIdx++)
924 if ((uartdrvHandle[handleIdx] == NULL) || (uartdrvHandle[handleIdx] == handle))
926 uartdrvHandle[handleIdx] = handle;
948 handle->rxQueue = rxQueue;
949 handle->rxQueue->head = 0;
950 handle->rxQueue->tail = 0;
951 handle->rxQueue->used = 0;
952 handle->rxDmaActive =
false;
954 handle->txQueue = txQueue;
955 handle->txQueue->head = 0;
956 handle->txQueue->tail = 0;
957 handle->txQueue->used = 0;
958 handle->txDmaActive =
false;
960 handle->IgnoreRestrain =
false;
963 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
974 FcApplyState(handle);
1026 if (initData == NULL)
1033 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
1034 retVal = SetHandleIndex(handle);
1039 handle->fcType = initData->
fcType;
1045 handle->peripheral.uart = initData->
port;
1046 handle->type = uartdrvUartTypeUart;
1069 else if (initData->
port == USART2)
1071 handle->uartClock = cmuClock_USART2;
1072 handle->txDmaSignal = dmadrvPeripheralSignal_USART2_TXBL;
1073 handle->rxDmaSignal = dmadrvPeripheralSignal_USART2_RXDATAV;
1077 else if (initData->
port == USART3)
1079 handle->uartClock = cmuClock_USART3;
1080 handle->txDmaSignal = dmadrvPeripheralSignal_USART3_TXBL;
1081 handle->rxDmaSignal = dmadrvPeripheralSignal_USART3_RXDATAV;
1085 else if (initData->
port == USART4)
1087 handle->uartClock = cmuClock_USART4;
1088 handle->txDmaSignal = dmadrvPeripheralSignal_USART4_TXBL;
1089 handle->rxDmaSignal = dmadrvPeripheralSignal_USART4_RXDATAV;
1093 else if (initData->
port == USART5)
1095 handle->uartClock = cmuClock_USART5;
1096 handle->txDmaSignal = dmadrvPeripheralSignal_USART5_TXBL;
1097 handle->rxDmaSignal = dmadrvPeripheralSignal_USART5_RXDATAV;
1101 else if (initData->
port == UART0)
1103 handle->uartClock = cmuClock_UART0;
1104 handle->txDmaSignal = dmadrvPeripheralSignal_UART0_TXBL;
1105 handle->rxDmaSignal = dmadrvPeripheralSignal_UART0_RXDATAV;
1109 else if (initData->
port == UART1)
1111 handle->uartClock = cmuClock_UART1;
1112 handle->txDmaSignal = dmadrvPeripheralSignal_UART1_TXBL;
1113 handle->rxDmaSignal = dmadrvPeripheralSignal_UART1_RXDATAV;
1117 else if (initData->
port == UART2)
1119 handle->uartClock = cmuClock_UART2;
1120 handle->txDmaSignal = dmadrvPeripheralSignal_UART2_TXBL;
1121 handle->rxDmaSignal = dmadrvPeripheralSignal_UART2_RXDATAV;
1135 #if defined(USART_CTRL_MVDIS)
1152 #if defined(USART_ROUTEPEN_TXPEN)
1163 initData->
port->ROUTE = USART_ROUTE_TXPEN
1165 | (initData->portLocation
1166 << _USART_ROUTE_LOCATION_SHIFT);
1181 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
1184 #if defined(UART_HW_FLOW_CONTROL_SUPPORT)
1197 InitializeGpioFlowControl(handle);
1223 retVal = InitializeDma(handle);
1261 if (initData == NULL)
1273 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
1274 retVal = SetHandleIndex(handle);
1279 handle->fcType = initData->
fcType;
1285 handle->peripheral.leuart = initData->
port;
1286 handle->type = uartdrvUartTypeLeuart;
1291 #if defined(LEUART0)
1299 #if defined(LEUART1)
1301 else if (initData->
port == LEUART1)
1303 handle->uartClock = cmuClock_LEUART1;
1304 handle->txDmaSignal = dmadrvPeripheralSignal_LEUART1_TXBL;
1305 handle->rxDmaSignal = dmadrvPeripheralSignal_LEUART1_RXDATAV;
1338 #if defined( _SILICON_LABS_32B_SERIES_0 )
1342 uint8_t divisor = 0;
1344 while (leuartInit.
baudrate <= (refclk >> (divisor + 7)))
1355 #elif defined( _SILICON_LABS_32B_SERIES_1 )
1368 #if defined(LEUART_ROUTEPEN_TXPEN)
1379 initData->
port->ROUTE = LEUART_ROUTE_TXPEN
1380 | LEUART_ROUTE_RXPEN
1381 | (initData->portLocation
1382 << _LEUART_ROUTE_LOCATION_SHIFT);
1397 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
1400 InitializeGpioFlowControl(handle);
1421 retVal = InitializeDma(handle);
1458 ConfigGpio(handle,
false);
1459 if (handle->type == uartdrvUartTypeUart)
1464 else if (handle->type == uartdrvUartTypeLeuart)
1473 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
1484 handle->rxQueue->head = 0;
1485 handle->rxQueue->tail = 0;
1486 handle->rxQueue->used = 0;
1488 handle->txQueue->head = 0;
1489 handle->txQueue->tail = 0;
1490 handle->txQueue->used = 0;
1516 if (handle == NULL) {
1532 && (handle->txQueue->used == 0)
1533 && (handle->rxQueue->used == 0))
1544 handle->txDmaActive =
false;
1546 if (handle->txQueue->used > 0)
1549 GetTailBuffer(handle->txQueue, &txBuffer);
1555 while (handle->txQueue->used > 0)
1557 DequeueBuffer(handle->txQueue, &txBuffer);
1578 handle->rxDmaActive =
false;
1580 if (handle->rxQueue->used > 0)
1583 GetTailBuffer(handle->rxQueue, &rxBuffer);
1589 while (handle->rxQueue->used > 0)
1591 DequeueBuffer(handle->rxQueue, &rxBuffer);
1607 DisableReceiver(handle);
1628 if (handle->type == uartdrvUartTypeUart)
1630 status = handle->peripheral.uart->STATUS;
1632 else if (handle->type == uartdrvUartTypeLeuart)
1634 uint32_t reg = handle->peripheral.leuart->STATUS;
1659 #if defined(LEUART_STATUS_TXIDLE)
1667 #if defined(_SILICON_LABS_32B_SERIES_0)
1689 return (uint8_t)handle->rxQueue->used;
1716 uint32_t remaining = 0;
1718 if (handle->rxQueue->used > 0)
1720 retVal = GetTailBuffer(handle->rxQueue, &rxBuffer);
1728 *itemsRemaining = remaining;
1729 *buffer = rxBuffer->
data;
1733 *itemsRemaining = 0;
1753 return (uint8_t)handle->txQueue->used;
1779 uint32_t remaining = 0;
1781 if (handle->txQueue->used > 0)
1783 retVal = GetTailBuffer(handle->txQueue, &txBuffer);
1791 *itemsRemaining = remaining;
1792 *buffer = txBuffer->
data;
1796 *itemsRemaining = 0;
1818 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
1823 handle->fcSelfCfg = state;
1826 handle->fcSelfState = state;
1828 return FcApplyState(handle);
1854 if (handle->fcPeerState != state)
1856 handle->fcPeerState = state;
1881 return handle->fcPeerState;
1896 return handle->fcSelfState;
1911 handle->IgnoreRestrain =
true;
1938 retVal = CheckParams(handle, data, maxCount);
1945 while (handle->rxQueue->used > 0);
1947 if (handle->type == uartdrvUartTypeUart)
1951 else if (handle->type == uartdrvUartTypeLeuart)
1962 EnableReceiver(handle);
1965 if (handle->type == uartdrvUartTypeUart)
1969 *data = (uint8_t)handle->peripheral.uart->RXDATA;
1978 else if (handle->type == uartdrvUartTypeLeuart)
1982 *data = (uint8_t)handle->peripheral.leuart->RXDATA;
1995 DisableReceiver(handle);
2021 bool callDmaIrqHandler;
2023 retVal = CheckParams(handle, data, count);
2031 while((handle->txQueue->used > 0) && (!handle->txDmaPaused))
2033 if (callDmaIrqHandler)
2035 UART_DMA_IRQHANDLER();
2039 if (handle->type == uartdrvUartTypeUart)
2043 else if (handle->type == uartdrvUartTypeLeuart)
2054 EnableTransmitter(handle);
2057 handle->hasTransmitted =
true;
2059 if (handle->type == uartdrvUartTypeUart)
2063 USART_Tx(handle->peripheral.uart, *data++);
2070 else if (handle->type == uartdrvUartTypeLeuart)
2074 LEUART_Tx(handle->peripheral.leuart, *data++);
2082 DisableTransmitter(handle);
2104 bool active =
false;
2116 handle->txDmaPaused++;
2150 retVal = CheckParams(handle, data, count);
2155 outputBuffer.
data = data;
2161 retVal = EnqueueBuffer(handle->rxQueue, &outputBuffer, &queueBuffer);
2166 if (!(handle->rxDmaActive))
2168 EnableReceiver(handle);
2169 StartReceiveDma(handle, queueBuffer);
2170 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
2174 FcApplyState(handle);
2204 retVal = CheckParams(handle, data, count);
2209 inputBuffer.
data = data;
2215 retVal = EnqueueBuffer(handle->rxQueue, &inputBuffer, &queueBuffer);
2220 while (handle->rxQueue->used > 1)
2224 EnableReceiver(handle);
2225 #if (EMDRV_UARTDRV_FLOW_CONTROL_ENABLE)
2229 FcApplyState(handle);
2232 StartReceiveDma(handle, queueBuffer);
2233 while (handle->rxDmaActive)
2256 bool active =
false;
2266 handle->txDmaPaused--;
2299 retVal = CheckParams(handle, data, count);
2304 inputBuffer.
data = data;
2310 retVal = EnqueueBuffer(handle->txQueue, &inputBuffer, &queueBuffer);
2315 if (!(handle->txDmaActive))
2318 if (handle->txQueue->used > 0)
2320 StartTransmitDma(handle, queueBuffer);
2321 handle->hasTransmitted = true;
2351 retVal = CheckParams(handle, data, count);
2356 outputBuffer.
data = data;
2362 retVal = EnqueueBuffer(handle->txQueue, &outputBuffer, &queueBuffer);
2367 while (handle->txQueue->used > 1)
2371 StartTransmitDma(handle, queueBuffer);
2372 handle->hasTransmitted =
true;
2373 while (handle->txDmaActive)
void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)
Select reference clock/oscillator used for a clock branch.
USART_Stopbits_TypeDef stopbits
uint8_t portLocationRx
Location number for UART Rx pin.
#define USART_CMD_CLEARTX
#define UARTDRV_STATUS_RXDATAV
Data is available in receive buffer.
USART_TypeDef * port
The peripheral used for UART.
Ecode_t UARTDRV_Transmit(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count, UARTDRV_Callback_t callback)
Start a non-blocking transmit.
void LEUART_Tx(LEUART_TypeDef *leuart, uint8_t data)
Transmit one frame.
#define ECODE_EMDRV_UARTDRV_PARAM_ERROR
Illegal input parameter.
void USART_Tx(USART_TypeDef *usart, uint8_t data)
Transmit one 4-9 bit frame.
uint8_t UARTDRV_GetTransmitDepth(UARTDRV_Handle_t handle)
Returns the number of queued transmit operations.
uint8_t ctsPin
CTS pin number.
#define _USART_ROUTELOC1_RTSLOC_SHIFT
#define CORE_DECLARE_IRQ_STATE
enum UARTDRV_AbortType UARTDRV_AbortType_t
Transfer abort type.
#define USART_ROUTEPEN_CTSPEN
LEUART_Stopbits_TypeDef stopbits
Abort all current and queued operations.
#define _USART_ROUTELOC0_RXLOC_MASK
Ecode_t transferStatus
Completion status of transfer operation.
uint8_t ctsPin
CTS pin number.
GPIO_Port_TypeDef rtsPort
RTS pin port number.
#define _LEUART_ROUTELOC0_RXLOC_MASK
Ecode_t DMADRV_PeripheralMemory(unsigned int channelId, DMADRV_PeripheralSignal_t peripheralSignal, void *dst, void *src, bool dstInc, int len, DMADRV_DataSize_t size, DMADRV_Callback_t callback, void *cbUserParam)
Start a peripheral to memory DMA transfer.
#define ECODE_EMDRV_UARTDRV_QUEUE_EMPTY
UART operation queue is empty.
#define USART_STATUS_TXENS
uint32_t baudRate
UART baud rate.
UARTDRV_Buffer_FifoQueue_t * rxQueue
Receive operation queue.
USART_OVS_TypeDef oversampling
UARTDRV_Buffer_t fifo[]
FIFO of queue data.
Ecode_t DMADRV_TransferActive(unsigned int channelId, bool *active)
Check if a transfer is running.
#define LEUART_STATUS_TXBL
UARTDRV_FlowControlState_t UARTDRV_FlowControlGetSelfStatus(UARTDRV_Handle_t handle)
Checks the self's flow control status.
USART_Parity_TypeDef parity
Parity configuration.
__STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
Clear one or more pending USART interrupts.
USART_Stopbits_TypeDef stopBits
Number of stop bits.
#define _USART_ROUTELOC0_TXLOC_SHIFT
#define LEUART_STATUS_RXBLOCK
#define _USART_ROUTELOC1_CTSLOC_SHIFT
USART_Databits_TypeDef databits
#define USART_STATUS_RXDATAV
#define ECODE_EMDRV_UARTDRV_FRAME_ERROR
UART frame error. Data is ignored.
Ecode_t DMADRV_StopTransfer(unsigned int channelId)
Stop an ongoing DMA transfer.
#define LEUART_STATUS_TXC
#define USART_ROUTEPEN_TXPEN
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define LEUART_CMD_CLEARRX
#define USART_CTRLX_CTSEN
USART_Parity_TypeDef parity
volatile UARTDRV_Count_t itemsRemaining
Transfer items remaining.
#define ECODE_EMDRV_UARTDRV_OK
Success return value.
#define LEUART_STATUS_RXENS
#define _CMU_LFBPRESC0_LEUART0_MASK
#define LEUART_STATUS_TXIDLE
void GPIOINT_CallbackRegister(uint8_t pin, GPIOINT_IrqCallbackPtr_t callbackPtr)
Registers user callback for given pin number.
USART_Enable_TypeDef enable
#define UARTDRV_STATUS_RXBLOCK
Receiver is blocked; incoming frames will be discarded.
#define LEUART_ROUTEPEN_TXPEN
UARTDRV_FlowControlType_t fcType
Flow control mode.
Ecode_t UARTDRV_InitUart(UARTDRV_Handle_t handle, const UARTDRV_InitUart_t *initData)
Initialize a U(S)ART driver instance.
Ecode_t UARTDRV_FlowControlSet(UARTDRV_Handle_t handle, UARTDRV_FlowControlState_t state)
Set UART flow control state. Set nRTS pin if hardware flow control is enabled. Send XON/XOFF if softw...
uint32_t CMU_ClkDiv_TypeDef
uint32_t baudRate
UART baud rate.
#define _LEUART_ROUTELOC0_RXLOC_SHIFT
const uint16_t size
Size of FIFO.
uint8_t rtsPin
RTS pin number.
__STATIC_INLINE void LEUART_IntClear(LEUART_TypeDef *leuart, uint32_t flags)
Clear one or more pending LEUART interrupts.
GPIO_Port_TypeDef ctsPort
CTS pin port number.
This driver controls the state.
UARTDRV_Count_t transferCount
Transfer item count.
LEUART_Stopbits_TypeDef stopBits
Number of stop bits.
void LEUART_Init(LEUART_TypeDef *leuart, LEUART_Init_TypeDef const *init)
Init LEUART.
#define LEUART_CTRL_DATABITS_EIGHT
enum UARTDRV_FlowControlState UARTDRV_FlowControlState_t
Flow Control state.
Transfer operation FIFO queue typedef.
#define UARTDRV_STATUS_TXEN
Transmitter is enabled.
UARTDRV_HandleData_t * UARTDRV_Handle_t
Handle pointer.
#define LEUART_ROUTEPEN_RXPEN
Ecode_t DMADRV_TransferRemainingCount(unsigned int channelId, int *remaining)
Get number of items remaining in a transfer.
Ecode_t DMADRV_ResumeTransfer(unsigned int channelId)
Resume an ongoing DMA transfer.
UARTDRV_Buffer_FifoQueue_t * txQueue
Transmit operation queue.
uint8_t rtsPin
RTS pin number.
nRTS/nCTS hardware handshake
Ecode_t UARTDRV_ForceTransmit(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count)
Direct transmit without interrupts or callback. Blocking function that ignores flow control if enable...
LEUART_TypeDef * port
The peripheral used for LEUART.
#define UARTDRV_STATUS_TXC
Transmit operation is complete, no more data is available in the transmit buffer and shift register...
#define ECODE_EMDRV_UARTDRV_DMA_ALLOC_ERROR
Unable to allocated DMA channels.
#define ECODE_EMDRV_UARTDRV_CLOCK_ERROR
Unable to set desired baudrate.
#define CMU_STATUS_LFXOENS
#define CORE_ENTER_ATOMIC()
#define ECODE_EMDRV_UARTDRV_QUEUE_FULL
UART operation queue is full.
volatile uint16_t head
Index of next byte to send.
#define LEUART_STATUS_RXDATAV
#define CORE_ATOMIC_SECTION(yourcode)
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
uint8_t portLocationRts
Location number for UART RTS pin.
#define ECODE_EMDRV_UARTDRV_PARITY_ERROR
UART parity error frame. Data is ignored.
Ecode_t UARTDRV_ReceiveB(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count)
Start a blocking receive.
GPIO_Port_TypeDef rtsPort
RTS pin port number.
__STATIC_INLINE void EMU_EnterEM1(void)
Enter energy mode 1 (EM1).
General Purpose IO (GPIO) peripheral API.
uint32_t SystemLFXOClockGet(void)
Get low frequency crystal oscillator clock frequency for target system.
#define _LEUART_ROUTELOC0_TXLOC_SHIFT
uint8_t portLocationCts
Location number for UART CTS pin.
#define _CMU_LFBPRESC0_LEUART0_SHIFT
uint8_t portLocationTx
Location number for UART Tx pin.
uint32_t Ecode_t
Typedef for API function error code return values.
The UART peripheral controls nRTS/nCTS.
UARTDRV_Callback_t callback
Completion callback.
#define _USART_ROUTELOC0_TXLOC_MASK
#define DMADRV_MAX_XFER_COUNT
Maximum length of one DMA transfer.
__STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out register to 1.
Core interrupt handling API.
void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable)
Enable/disable a clock.
LEUART_Parity_TypeDef parity
Ecode_t DMADRV_Init(void)
Initialize DMADRV.
void LEUART_Enable(LEUART_TypeDef *leuart, LEUART_Enable_TypeDef enable)
Enable/disable LEUART receiver and/or transmitter.
volatile uint16_t used
Number of bytes queued.
UARTDRV_FlowControlType_t fcType
Flow control mode.
#define USART_STATUS_RXENS
#define LEUART_CMD_CLEARTX
volatile uint16_t tail
Index of where to enqueue next message.
void(* UARTDRV_Callback_t)(struct UARTDRV_HandleData *handle, Ecode_t transferStatus, uint8_t *data, UARTDRV_Count_t transferCount)
UARTDRV transfer completion callback function.
#define UARTDRV_STATUS_TXIDLE
Transmitter is idle.
void LEUART_Reset(LEUART_TypeDef *leuart)
Reset LEUART to same state as after a HW reset.
__STATIC_INLINE void GPIO_IntConfig(GPIO_Port_TypeDef port, unsigned int pin, bool risingEdge, bool fallingEdge, bool enable)
Configure GPIO interrupt.
#define UARTDRV_STATUS_TXBL
Transmit buffer is empty.
Ecode_t UARTDRV_Receive(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count, UARTDRV_Callback_t callback)
Start a non-blocking receive.
#define CORE_EXIT_ATOMIC()
Ecode_t UARTDRV_DeInit(UARTDRV_Handle_t handle)
Deinitialize a UART driver instance.
Abort current and queued receive operations.
#define ECODE_EMDRV_DMADRV_OK
Success return value.
LEUART_Parity_TypeDef parity
Parity configuration.
UARTDRV_Count_t UARTDRV_ForceReceive(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t maxCount)
Direct receive without interrupts or callback. Blocking function.
UARTDRV_Status_t UARTDRV_GetPeripheralStatus(UARTDRV_Handle_t handle)
Returns the status of the UART peripheral associated with a given handle.
bool CORE_IrqIsBlocked(IRQn_Type irqN)
Check if a specific interrupt is disabled or blocked.
#define LEUART_STATUS_TXENS
Ecode_t DMADRV_DeInit(void)
Deinitialize DMADRV.
#define UARTDRV_STATUS_RXEN
Receiver is enabled.
Energy management unit (EMU) peripheral API.
uint32_t UARTDRV_Count_t
UART transfer count.
#define ECODE_EMDRV_UARTDRV_WAITING
Operation is waiting in queue.
UARTDRV_Status_t UARTDRV_GetReceiveStatus(UARTDRV_Handle_t handle, uint8_t **buffer, UARTDRV_Count_t *itemsReceived, UARTDRV_Count_t *itemsRemaining)
Check the status of the UART and gather information about any ongoing receive operations.
Ecode_t UARTDRV_PauseTransmit(UARTDRV_Handle_t handle)
Pause an ongoing transmit operation.
Ecode_t DMADRV_AllocateChannel(unsigned int *channelId, void *capabilities)
Allocate (reserve) a DMA channel.
uint8_t UARTDRV_GetReceiveDepth(UARTDRV_Handle_t handle)
Returns the number of queued receive operations.
static volatile uint8_t rxBuffer[RXBUFSIZE]
#define USART_ROUTEPEN_RXPEN
void GPIOINT_Init(void)
Initialization of GPIOINT module.
Ecode_t DMADRV_MemoryPeripheral(unsigned int channelId, DMADRV_PeripheralSignal_t peripheralSignal, void *dst, void *src, bool srcInc, int len, DMADRV_DataSize_t size, DMADRV_Callback_t callback, void *cbUserParam)
Start a memory to peripheral DMA transfer.
uint8_t * data
Transfer data buffer.
GPIO_Port_TypeDef ctsPort
CTS pin port number.
uint8_t portLocationRx
Location number for LEUART Rx pin.
#define USART_INITASYNC_DEFAULT
#define ECODE_EMDRV_UARTDRV_ABORTED
UART transfer has been aborted.
#define USART_ROUTEPEN_RTSPEN
Ecode_t UARTDRV_Abort(UARTDRV_Handle_t handle, UARTDRV_AbortType_t type)
Abort ongoing UART transfers.
uint8_t portLocationTx
Location number for LEUART Tx pin.
UARTDRV_Status_t UARTDRV_GetTransmitStatus(UARTDRV_Handle_t handle, uint8_t **buffer, UARTDRV_Count_t *itemsSent, UARTDRV_Count_t *itemsRemaining)
Check the status of the UART and gather information about any ongoing transmit operations.
Ecode_t UARTDRV_InitLeuart(UARTDRV_Handle_t handle, const UARTDRV_InitLeuart_t *initData)
Initialize a LEUART driver instance.
UARTDRV_FlowControlState_t UARTDRV_FlowControlGetPeerStatus(UARTDRV_Handle_t handle)
Checks the peer's flow control status.
#define _LEUART_ROUTELOC0_TXLOC_MASK
UARTDRV_Buffer_FifoQueue_t * rxQueue
Receive operation queue.
Ecode_t UARTDRV_TransmitB(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count)
Start a blocking transmit.
__STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out port register to 0.
void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable)
Enable/disable USART/UART receiver and/or transmitter.
void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init)
Init USART/UART for normal asynchronous mode.
Ecode_t UARTDRV_FlowControlIgnoreRestrain(UARTDRV_Handle_t handle)
Enables transmission when restrained by flow control.
#define USART_FRAME_DATABITS_EIGHT
#define LEUART_INIT_DEFAULT
#define ECODE_EMDRV_UARTDRV_ILLEGAL_OPERATION
Illegal operation on UART port.
#define LEUART_SYNCBUSY_CMD
UARTDRV_Buffer_FifoQueue_t * txQueue
Transmit operation queue.
uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock)
Get clock frequency for a clock point.
__STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port, unsigned int pin)
Read the pad value for a single pin in a GPIO port.
#define ECODE_EMDRV_UARTDRV_ILLEGAL_HANDLE
Illegal UART handle.
Abort current and queued transmit operations.
#define USART_CMD_CLEARRX
#define ECODE_EMDRV_UARTDRV_IDLE
No UART transfer in progress.
uint32_t UARTDRV_Status_t
UART status return type. Bitfield of UARTDRV_STATUS_* values.
void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div)
Set clock divisor/prescaler.
Ecode_t DMADRV_PauseTransfer(unsigned int channelId)
Pause an ongoing DMA transfer.
Ecode_t UARTDRV_ResumeTransmit(UARTDRV_Handle_t handle)
Resume a paused transmit operation.
bool mvdis
Majority Vote Disable for 16x, 8x and 6x oversampling modes.
Ecode_t DMADRV_FreeChannel(unsigned int channelId)
Free an allocate (reserved) DMA channel.
LEUART_Databits_TypeDef databits
#define _USART_ROUTELOC0_RXLOC_SHIFT
USART_OVS_TypeDef oversampling
Oversampling mode.
Ecode_t UARTDRV_FlowControlSetPeerStatus(UARTDRV_Handle_t handle, UARTDRV_FlowControlState_t state)
Set peer UART flow control state. Pause/resume transmit accordingly. Only for manual software flow co...
LEUART_Enable_TypeDef enable