EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
em_usart.c
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1 /***************************************************************************/
34 #include "em_usart.h"
35 #if defined(USART_COUNT) && (USART_COUNT > 0)
36 
37 #include "em_cmu.h"
38 #include "em_bus.h"
39 #include "em_assert.h"
40 
41 /***************************************************************************/
46 /***************************************************************************/
51 /*******************************************************************************
52  ******************************* DEFINES ***********************************
53  ******************************************************************************/
54 
59 #if (USART_COUNT == 1) && defined(USART0)
60 #define USART_REF_VALID(ref) ((ref) == USART0)
61 
62 #elif (USART_COUNT == 1) && defined(USART1)
63 #define USART_REF_VALID(ref) ((ref) == USART1)
64 
65 #elif (USART_COUNT == 2) && defined(USART2)
66 #define USART_REF_VALID(ref) (((ref) == USART1) || ((ref) == USART2))
67 
68 #elif (USART_COUNT == 2)
69 #define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1))
70 
71 #elif (USART_COUNT == 3)
72 #define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) || \
73  ((ref) == USART2))
74 #elif (USART_COUNT == 4)
75 #define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) || \
76  ((ref) == USART2) || ((ref) == USART3))
77 #elif (USART_COUNT == 5)
78 #define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) || \
79  ((ref) == USART2) || ((ref) == USART3) || \
80  ((ref) == USART4))
81 #elif (USART_COUNT == 6)
82 #define USART_REF_VALID(ref) (((ref) == USART0) || ((ref) == USART1) || \
83  ((ref) == USART2) || ((ref) == USART3) || \
84  ((ref) == USART4) || ((ref) == USART5))
85 #else
86 #error "Undefined number of USARTs."
87 #endif
88 
89 #if defined(USARTRF_COUNT) && (USARTRF_COUNT > 0)
90 #if (USARTRF_COUNT == 1) && defined(USARTRF0)
91 #define USARTRF_REF_VALID(ref) ((ref) == USARTRF0)
92 #elif (USARTRF_COUNT == 1) && defined(USARTRF1)
93 #define USARTRF_REF_VALID(ref) ((ref) == USARTRF1)
94 #else
95 #define USARTRF_REF_VALID(ref) (0)
96 #endif
97 #else
98 #define USARTRF_REF_VALID(ref) (0)
99 #endif
100 
101 #if defined(_EZR32_HAPPY_FAMILY)
102 #define USART_IRDA_VALID(ref) ((ref) == USART0)
103 #elif defined(_EFM32_HAPPY_FAMILY)
104 #define USART_IRDA_VALID(ref) (((ref) == USART0) || ((ref) == USART1))
105 #elif defined(USART0)
106 #define USART_IRDA_VALID(ref) ((ref) == USART0)
107 #elif (USART_COUNT == 1) && defined(USART1)
108 #define USART_IRDA_VALID(ref) ((ref) == USART1)
109 #else
110 #define USART_IRDA_VALID(ref) (0)
111 #endif
112 
113 #if defined(_SILICON_LABS_32B_SERIES_1)
114  #define USART_I2S_VALID(ref) ((ref) == USART1)
115 #elif defined(_SILICON_LABS_32B_SERIES_0)
116  #if defined(_EZR32_HAPPY_FAMILY)
117  #define USART_I2S_VALID(ref) ((ref) == USART0)
118  #elif defined(_EFM32_HAPPY_FAMILY)
119  #define USART_I2S_VALID(ref) (((ref) == USART0) || ((ref) == USART1))
120  #elif defined(_EFM32_TINY_FAMILY) || defined(_EFM32_ZERO_FAMILY)
121  #define USART_I2S_VALID(ref) ((ref) == USART1)
122  #elif defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
123  #define USART_I2S_VALID(ref) (((ref) == USART1) || ((ref) == USART2))
124 #endif
125 #endif
126 
127 #if (UART_COUNT == 1)
128 #define UART_REF_VALID(ref) ((ref) == UART0)
129 #elif (UART_COUNT == 2)
130 #define UART_REF_VALID(ref) (((ref) == UART0) || ((ref) == UART1))
131 #else
132 #define UART_REF_VALID(ref) (0)
133 #endif
134 
138 /*******************************************************************************
139  ************************** GLOBAL FUNCTIONS *******************************
140  ******************************************************************************/
141 
142 /***************************************************************************/
165  uint32_t refFreq,
166  uint32_t baudrate,
167  USART_OVS_TypeDef ovs)
168 {
169  uint32_t clkdiv;
170  uint32_t oversample;
171 
172  /* Inhibit divide by 0 */
173  EFM_ASSERT(baudrate);
174 
175  /*
176  * We want to use integer division to avoid forcing in float division
177  * utils, and yet keep rounding effect errors to a minimum.
178  *
179  * CLKDIV in asynchronous mode is given by:
180  *
181  * CLKDIV = 256 * (fHFPERCLK/(oversample * br) - 1)
182  * or
183  * CLKDIV = (256 * fHFPERCLK)/(oversample * br) - 256
184  *
185  * The basic problem with integer division in the above formula is that
186  * the dividend (256 * fHFPERCLK) may become higher than max 32 bit
187  * integer. Yet, we want to evaluate dividend first before dividing in
188  * order to get as small rounding effects as possible. We do not want
189  * to make too harsh restrictions on max fHFPERCLK value either.
190  *
191  * One can possibly factorize 256 and oversample/br. However,
192  * since the last 6 or 3 bits of CLKDIV are don't care, we can base our
193  * integer arithmetic on the below formula
194  *
195  * CLKDIV / 64 = (4 * fHFPERCLK)/(oversample * br) - 4 (3 bits dont care)
196  * or
197  * CLKDIV / 8 = (32 * fHFPERCLK)/(oversample * br) - 32 (6 bits dont care)
198  *
199  * and calculate 1/64 of CLKDIV first. This allows for fHFPERCLK
200  * up to 1GHz without overflowing a 32 bit value!
201  */
202 
203  /* HFPERCLK used to clock all USART/UART peripheral modules */
204  if (!refFreq)
205  {
206  refFreq = CMU_ClockFreqGet(cmuClock_HFPER);
207  }
208 
209  /* Map oversampling */
210  switch (ovs)
211  {
212  case usartOVS16:
213  EFM_ASSERT(baudrate <= (refFreq / 16));
214  oversample = 16;
215  break;
216 
217  case usartOVS8:
218  EFM_ASSERT(baudrate <= (refFreq / 8));
219  oversample = 8;
220  break;
221 
222  case usartOVS6:
223  EFM_ASSERT(baudrate <= (refFreq / 6));
224  oversample = 6;
225  break;
226 
227  case usartOVS4:
228  EFM_ASSERT(baudrate <= (refFreq / 4));
229  oversample = 4;
230  break;
231 
232  default:
233  /* Invalid input */
234  EFM_ASSERT(0);
235  return;
236  }
237 
238  /* Calculate and set CLKDIV with fractional bits.
239  * The addend (oversample*baudrate)/2 in the first line is to round the
240  * divisor up by half the divisor before the division in order to reduce the
241  * integer division error, which consequently results in a higher baudrate
242  * than desired. */
243 #if defined(_USART_CLKDIV_DIV_MASK) && (_USART_CLKDIV_DIV_MASK >= 0x7FFFF8UL)
244  clkdiv = 32 * refFreq + (oversample * baudrate) / 2;
245  clkdiv /= (oversample * baudrate);
246  clkdiv -= 32;
247  clkdiv *= 8;
248 #else
249  clkdiv = 4 * refFreq + (oversample * baudrate) / 2;
250  clkdiv /= (oversample * baudrate);
251  clkdiv -= 4;
252  clkdiv *= 64;
253 #endif
254 
255  /* Verify that resulting clock divider is within limits */
256  EFM_ASSERT(clkdiv <= _USART_CLKDIV_DIV_MASK);
257 
258  /* If EFM_ASSERT is not enabled, make sure we don't write to reserved bits */
259  clkdiv &= _USART_CLKDIV_DIV_MASK;
260 
261  usart->CTRL &= ~_USART_CTRL_OVS_MASK;
262  usart->CTRL |= ovs;
263  usart->CLKDIV = clkdiv;
264 }
265 
266 
267 /***************************************************************************/
295 uint32_t USART_BaudrateCalc(uint32_t refFreq,
296  uint32_t clkdiv,
297  bool syncmode,
298  USART_OVS_TypeDef ovs)
299 {
300  uint32_t oversample;
301  uint64_t divisor;
302  uint64_t factor;
303  uint64_t remainder;
304  uint64_t quotient;
305  uint32_t br;
306 
307  /* Out of bound clkdiv ? */
308  EFM_ASSERT(clkdiv <= _USART_CLKDIV_DIV_MASK);
309 
310  /* Mask out unused bits */
311  clkdiv &= _USART_CLKDIV_DIV_MASK;
312 
313  /* We want to use integer division to avoid forcing in float division */
314  /* utils, and yet keep rounding effect errors to a minimum. */
315 
316  /* Baudrate calculation depends on if synchronous or asynchronous mode */
317  if (syncmode)
318  {
319  /*
320  * Baudrate is given by:
321  *
322  * br = fHFPERCLK/(2 * (1 + (CLKDIV / 256)))
323  *
324  * which can be rewritten to
325  *
326  * br = (128 * fHFPERCLK)/(256 + CLKDIV)
327  */
328  oversample = 1; /* Not used in sync mode, ie 1 */
329  factor = 128;
330  }
331  else
332  {
333  /*
334  * Baudrate in asynchronous mode is given by:
335  *
336  * br = fHFPERCLK/(oversample * (1 + (CLKDIV / 256)))
337  *
338  * which can be rewritten to
339  *
340  * br = (256 * fHFPERCLK)/(oversample * (256 + CLKDIV))
341  *
342  * First of all we can reduce the 256 factor of the dividend with
343  * (part of) oversample part of the divisor.
344  */
345 
346  switch (ovs)
347  {
348  case usartOVS16:
349  oversample = 1;
350  factor = 256 / 16;
351  break;
352 
353  case usartOVS8:
354  oversample = 1;
355  factor = 256 / 8;
356  break;
357 
358  case usartOVS6:
359  oversample = 3;
360  factor = 256 / 2;
361  break;
362 
363  default:
364  oversample = 1;
365  factor = 256 / 4;
366  break;
367  }
368  }
369 
370  /*
371  * The basic problem with integer division in the above formula is that
372  * the dividend (factor * fHFPERCLK) may become larger than a 32 bit
373  * integer. Yet we want to evaluate dividend first before dividing in
374  * order to get as small rounding effects as possible. We do not want
375  * to make too harsh restrictions on max fHFPERCLK value either.
376  *
377  * For division a/b, we can write
378  *
379  * a = qb + r
380  *
381  * where q is the quotient and r is the remainder, both integers.
382  *
383  * The orignal baudrate formula can be rewritten as
384  *
385  * br = xa / b = x(qb + r)/b = xq + xr/b
386  *
387  * where x is 'factor', a is 'refFreq' and b is 'divisor', referring to
388  * variable names.
389  */
390 
391  /*
392  * Divisor will never exceed max 32 bit value since
393  * clkdiv <= _USART_CLKDIV_DIV_MASK (currently 0x1FFFC0 or 0x7FFFF8)
394  * and 'oversample' has been reduced to <= 3.
395  */
396  divisor = oversample * (256 + clkdiv);
397 
398  quotient = refFreq / divisor;
399  remainder = refFreq % divisor;
400 
401  /* factor <= 128 and since divisor >= 256, the below cannot exceed max */
402  /* 32 bit value. However, factor * remainder can become larger than 32-bit */
403  /* because of the size of _USART_CLKDIV_DIV_MASK on some families. */
404  br = (uint32_t)(factor * quotient);
405 
406  /*
407  * factor <= 128 and remainder < (oversample*(256 + clkdiv)), which
408  * means dividend (factor * remainder) worst case is
409  * 128 * (3 * (256 + _USART_CLKDIV_DIV_MASK)) = 0x1_8001_7400.
410  */
411  br += (uint32_t)((factor * remainder) / divisor);
412 
413  return br;
414 }
415 
416 
417 /***************************************************************************/
432 {
433  uint32_t freq;
434  USART_OVS_TypeDef ovs;
435  bool syncmode;
436 
437  if (usart->CTRL & USART_CTRL_SYNC)
438  {
439  syncmode = true;
440  }
441  else
442  {
443  syncmode = false;
444  }
445 
446  /* HFPERCLK used to clock all USART/UART peripheral modules */
448  ovs = (USART_OVS_TypeDef)(usart->CTRL & _USART_CTRL_OVS_MASK);
449  return USART_BaudrateCalc(freq, usart->CLKDIV, syncmode, ovs);
450 }
451 
452 
453 /***************************************************************************/
480 void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
481 {
482  uint32_t clkdiv;
483 
484  /* Inhibit divide by 0 */
485  EFM_ASSERT(baudrate);
486 
487  /*
488  * CLKDIV in synchronous mode is given by:
489  *
490  * CLKDIV = 256 * (fHFPERCLK/(2 * br) - 1)
491  */
492 
493  /* HFPERCLK used to clock all USART/UART peripheral modules */
494  if (!refFreq)
495  {
496  refFreq = CMU_ClockFreqGet(cmuClock_HFPER);
497  }
498 
499  clkdiv = (refFreq - 1) / (2 * baudrate);
500  clkdiv = clkdiv << 8;
501 
502  /* Verify that resulting clock divider is within limits */
503  EFM_ASSERT(!(clkdiv & ~_USART_CLKDIV_DIV_MASK));
504 
505  /* If EFM_ASSERT is not enabled, make sure we don't write to reserved bits */
506  clkdiv &= _USART_CLKDIV_DIV_MASK;
507 
509 }
510 
511 
512 /***************************************************************************/
528 {
529  uint32_t tmp;
530 
531  /* Make sure the module exists on the selected chip */
532  EFM_ASSERT( USART_REF_VALID(usart)
533  || USARTRF_REF_VALID(usart)
534  || UART_REF_VALID(usart) );
535 
536  /* Disable as specified */
537  tmp = ~((uint32_t) (enable));
539  usart->CMD = tmp << 1;
540 
541  /* Enable as specified */
542  usart->CMD = (uint32_t) (enable);
543 }
544 
545 
546 /***************************************************************************/
570 {
571  /* Make sure the module exists on the selected chip */
572  EFM_ASSERT( USART_REF_VALID(usart)
573  || USARTRF_REF_VALID(usart)
574  || UART_REF_VALID(usart) );
575 
576  /* Init USART registers to HW reset state. */
577  USART_Reset(usart);
578 
579 #if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
580  /* Disable majority vote if specified. */
581  if (init->mvdis)
582  {
583  usart->CTRL |= USART_CTRL_MVDIS;
584  }
585 
586  /* Configure PRS input mode. */
587  if (init->prsRxEnable)
588  {
589  usart->INPUT = (uint32_t) init->prsRxCh | USART_INPUT_RXPRS;
590  }
591 #endif
592 
593  /* Configure databits, stopbits and parity */
594  usart->FRAME = (uint32_t)init->databits
595  | (uint32_t)init->stopbits
596  | (uint32_t)init->parity;
597 
598  /* Configure baudrate */
599  USART_BaudrateAsyncSet(usart, init->refFreq, init->baudrate, init->oversampling);
600 
601 #if defined(_USART_TIMING_CSHOLD_MASK)
602  usart->TIMING = ((init->autoCsHold << _USART_TIMING_CSHOLD_SHIFT)
606  if (init->autoCsEnable)
607  {
608  usart->CTRL |= USART_CTRL_AUTOCS;
609  }
610 #endif
611  /* Finally enable (as specified) */
612  usart->CMD = (uint32_t)init->enable;
613 }
614 
615 
616 /***************************************************************************/
641 {
642  /* Make sure the module exists on the selected chip */
643  EFM_ASSERT( USART_REF_VALID(usart) || USARTRF_REF_VALID(usart) );
644 
645  /* Init USART registers to HW reset state. */
646  USART_Reset(usart);
647 
648  /* Set bits for synchronous mode */
649  usart->CTRL |= (USART_CTRL_SYNC)
650  | (uint32_t)init->clockMode
651  | (init->msbf ? USART_CTRL_MSBF : 0);
652 
653 #if defined(_USART_CTRL_AUTOTX_MASK)
654  usart->CTRL |= init->autoTx ? USART_CTRL_AUTOTX : 0;
655 #endif
656 
657 #if defined(_USART_INPUT_RXPRS_MASK)
658  /* Configure PRS input mode. */
659  if (init->prsRxEnable)
660  {
661  usart->INPUT = (uint32_t)init->prsRxCh | USART_INPUT_RXPRS;
662  }
663 #endif
664 
665  /* Configure databits, leave stopbits and parity at reset default (not used) */
666  usart->FRAME = (uint32_t)init->databits
669 
670  /* Configure baudrate */
671  USART_BaudrateSyncSet(usart, init->refFreq, init->baudrate);
672 
673  /* Finally enable (as specified) */
674  if (init->master)
675  {
676  usart->CMD = USART_CMD_MASTEREN;
677  }
678 
679 #if defined(_USART_TIMING_CSHOLD_MASK)
680  usart->TIMING = ((init->autoCsHold << _USART_TIMING_CSHOLD_SHIFT)
684  if (init->autoCsEnable)
685  {
686  usart->CTRL |= USART_CTRL_AUTOCS;
687  }
688 #endif
689 
690  usart->CMD = (uint32_t)init->enable;
691 }
692 
693 /***************************************************************************/
722 {
723  EFM_ASSERT(USART_IRDA_VALID(usart));
724 
725  /* Init USART as async device */
726  USART_InitAsync(usart, &(init->async));
727 
728  /* Set IrDA modulation to RZI (return-to-zero-inverted) */
729  usart->CTRL |= USART_CTRL_TXINV;
730 
731  /* Invert Rx signal before demodulator if enabled */
732  if (init->irRxInv)
733  {
734  usart->CTRL |= USART_CTRL_RXINV;
735  }
736 
737  /* Configure IrDA */
738  usart->IRCTRL |= (uint32_t)init->irPw
739  | (uint32_t)init->irPrsSel
740  | ((uint32_t)init->irFilt << _USART_IRCTRL_IRFILT_SHIFT)
741  | ((uint32_t)init->irPrsEn << _USART_IRCTRL_IRPRSEN_SHIFT);
742 
743  /* Enable IrDA */
744  usart->IRCTRL |= USART_IRCTRL_IREN;
745 }
746 
747 #if defined(_USART_I2SCTRL_MASK)
748 /***************************************************************************/
778 {
779  USART_Enable_TypeDef enable;
780 
781  /* Make sure the module exists on the selected chip */
782  EFM_ASSERT(USART_I2S_VALID(usart));
783 
784  /* Override the enable setting. */
785  enable = init->sync.enable;
786  init->sync.enable = usartDisable;
787 
788  /* Init USART as a sync device. */
789  USART_InitSync(usart, &init->sync);
790 
791  /* Configure and enable I2CCTRL register acording to selected mode. */
792  usart->I2SCTRL = (uint32_t)init->format
793  | (uint32_t)init->justify
794  | (init->delay ? USART_I2SCTRL_DELAY : 0)
795  | (init->dmaSplit ? USART_I2SCTRL_DMASPLIT : 0)
796  | (init->mono ? USART_I2SCTRL_MONO : 0)
798 
799  if (enable != usartDisable)
800  {
801  USART_Enable(usart, enable);
802  }
803 }
804 #endif
805 
806 
807 /***************************************************************************/
817 {
818  uint32_t trigctrl;
819 
820  /* Clear values that will be reconfigured */
821  trigctrl = usart->TRIGCTRL & ~(_USART_TRIGCTRL_RXTEN_MASK
823 #if defined(USART_TRIGCTRL_AUTOTXTEN)
825 #endif
827 
828 #if defined(USART_TRIGCTRL_AUTOTXTEN)
829  if (init->autoTxTriggerEnable)
830  {
831  trigctrl |= USART_TRIGCTRL_AUTOTXTEN;
832  }
833 #endif
834  if (init->txTriggerEnable)
835  {
836  trigctrl |= USART_TRIGCTRL_TXTEN;
837  }
838  if (init->rxTriggerEnable)
839  {
840  trigctrl |= USART_TRIGCTRL_RXTEN;
841  }
842  trigctrl |= init->prsTriggerChannel;
843 
844  /* Enable new configuration */
845  usart->TRIGCTRL = trigctrl;
846 }
847 
848 
849 /***************************************************************************/
857 {
858  /* Make sure the module exists on the selected chip */
859  EFM_ASSERT( USART_REF_VALID(usart)
860  || USARTRF_REF_VALID(usart)
861  || UART_REF_VALID(usart) );
862 
863  /* Make sure disabled first, before resetting other registers */
867  usart->CTRL = _USART_CTRL_RESETVALUE;
871  usart->IEN = _USART_IEN_RESETVALUE;
872  usart->IFC = _USART_IFC_MASK;
873 #if defined(_USART_ROUTEPEN_MASK) || defined(_UART_ROUTEPEN_MASK)
877 #else
878  usart->ROUTE = _USART_ROUTE_RESETVALUE;
879 #endif
880 
881  if (USART_IRDA_VALID(usart))
882  {
884  }
885 
886 #if defined(_USART_INPUT_RESETVALUE)
888 #endif
889 
890 #if defined(_USART_I2SCTRL_RESETVALUE)
891  if (USART_I2S_VALID(usart))
892  {
894  }
895 #endif
896 }
897 
898 
899 /***************************************************************************/
923 uint8_t USART_Rx(USART_TypeDef *usart)
924 {
925  while (!(usart->STATUS & USART_STATUS_RXDATAV))
926  ;
927 
928  return (uint8_t)usart->RXDATA;
929 }
930 
931 
932 /***************************************************************************/
957 {
958  while (!(usart->STATUS & USART_STATUS_RXFULL))
959  ;
960 
961  return (uint16_t)usart->RXDOUBLE;
962 }
963 
964 
965 /***************************************************************************/
990 {
991  while (!(usart->STATUS & USART_STATUS_RXFULL))
992  ;
993 
994  return usart->RXDOUBLEX;
995 }
996 
997 
998 /***************************************************************************/
1022 uint16_t USART_RxExt(USART_TypeDef *usart)
1023 {
1024  while (!(usart->STATUS & USART_STATUS_RXDATAV))
1025  ;
1026 
1027  return (uint16_t)usart->RXDATAX;
1028 }
1029 
1030 
1031 /***************************************************************************/
1050 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data)
1051 {
1052  while (!(usart->STATUS & USART_STATUS_TXBL))
1053  ;
1054  usart->TXDATA = (uint32_t)data;
1055  while (!(usart->STATUS & USART_STATUS_TXC))
1056  ;
1057  return (uint8_t)usart->RXDATA;
1058 }
1059 
1060 
1061 /***************************************************************************/
1084 void USART_Tx(USART_TypeDef *usart, uint8_t data)
1085 {
1086  /* Check that transmit buffer is empty */
1087  while (!(usart->STATUS & USART_STATUS_TXBL))
1088  ;
1089  usart->TXDATA = (uint32_t)data;
1090 }
1091 
1092 
1093 /***************************************************************************/
1120 void USART_TxDouble(USART_TypeDef *usart, uint16_t data)
1121 {
1122  /* Check that transmit buffer is empty */
1123  while (!(usart->STATUS & USART_STATUS_TXBL))
1124  ;
1125  usart->TXDOUBLE = (uint32_t)data;
1126 }
1127 
1128 
1129 /***************************************************************************/
1156 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data)
1157 {
1158  /* Check that transmit buffer is empty */
1159  while (!(usart->STATUS & USART_STATUS_TXBL))
1160  ;
1161  usart->TXDOUBLEX = data;
1162 }
1163 
1164 
1165 /***************************************************************************/
1184 void USART_TxExt(USART_TypeDef *usart, uint16_t data)
1185 {
1186  /* Check that transmit buffer is empty */
1187  while (!(usart->STATUS & USART_STATUS_TXBL))
1188  ;
1189  usart->TXDATAX = (uint32_t)data;
1190 }
1191 
1192 
1195 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
Clock management unit (CMU) API.
#define _USART_ROUTEPEN_RESETVALUE
USART_Stopbits_TypeDef stopbits
Definition: em_usart.h:317
USART_I2sJustify_TypeDef justify
Definition: em_usart.h:622
#define _USART_ROUTELOC0_RESETVALUE
#define USART_CMD_CLEARTX
#define _USART_TIMING_CSSETUP_MASK
void USART_Tx(USART_TypeDef *usart, uint8_t data)
Transmit one 4-9 bit frame.
Definition: em_usart.c:1084
__IOM uint32_t TRIGCTRL
#define USART_STATUS_RXFULL
#define USART_FRAME_PARITY_DEFAULT
#define USART_STATUS_TXBL
#define USART_TRIGCTRL_TXTEN
Emlib peripheral API "assert" implementation.
USART_PrsTriggerCh_TypeDef prsTriggerChannel
Definition: em_usart.h:351
__IOM uint32_t TXDATAX
__IOM uint32_t TXDATA
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init)
Init USART for synchronous mode.
Definition: em_usart.c:640
__IOM uint32_t ROUTELOC0
USART_OVS_TypeDef oversampling
Definition: em_usart.h:307
RAM and peripheral bit-field set and clear API.
#define _USART_CMD_TXEN_MASK
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to spe...
Definition: em_usart.c:480
#define USART_I2SCTRL_EN
__IM uint32_t RXDATAX
#define _USART_TIMING_CSHOLD_MASK
USART_Databits_TypeDef databits
Definition: em_usart.h:311
#define USART_STATUS_RXDATAV
uint8_t USART_Rx(USART_TypeDef *usart)
Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Definition: em_usart.c:923
USART_InitAsync_TypeDef async
Definition: em_usart.h:515
void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data)
Transmit two 4-9 bit frames, or one 10-16 bit frame with extended control.
Definition: em_usart.c:1156
USART_InitSync_TypeDef sync
Definition: em_usart.h:608
uint32_t USART_RxDoubleExt(USART_TypeDef *usart)
Receive two 4-9 bit frames, or one 10-16 bit frame with extended information.
Definition: em_usart.c:989
uint32_t USART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv, bool syncmode, USART_OVS_TypeDef ovs)
Calculate baudrate for USART/UART given reference frequency, clock division and oversampling rate (if...
Definition: em_usart.c:295
USART_PrsRxCh_TypeDef prsRxCh
Definition: em_usart.h:449
USART_IrDAPw_Typedef irPw
Definition: em_usart.h:525
USART_Parity_TypeDef parity
Definition: em_usart.h:314
Universal synchronous/asynchronous receiver/transmitter (USART/UART) peripheral API.
#define _USART_TRIGCTRL_RESETVALUE
#define _USART_IRCTRL_RESETVALUE
__IOM uint32_t CTRL
USART_Enable_TypeDef enable
Definition: em_usart.h:295
#define _USART_TRIGCTRL_TSEL_MASK
#define USART_CMD_TXDIS
#define _USART_FRAME_RESETVALUE
#define USART_INPUT_RXPRS
#define USART_STATUS_TXC
USART_I2sFormat_TypeDef format
Definition: em_usart.h:611
#define USART_CTRL_AUTOCS
__IOM uint32_t TXDOUBLE
#define _USART_CTRL_RESETVALUE
__IM uint32_t RXDATA
#define USART_I2SCTRL_DELAY
#define USART_CTRL_MSBF
#define _USART_TIMING_CSSETUP_SHIFT
#define USART_I2SCTRL_MONO
#define USART_CTRL_MVDIS
uint16_t USART_RxExt(USART_TypeDef *usart)
Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended information.
Definition: em_usart.c:1022
__IOM uint32_t I2SCTRL
#define USART_TRIGCTRL_RXTEN
#define USART_CMD_MASTERDIS
#define USART_CMD_MASTEREN
#define _USART_CLKDIV_RESETVALUE
#define _USART_IFC_MASK
#define USART_CTRL_TXINV
#define _USART_ROUTELOC1_RESETVALUE
__IOM uint32_t TIMING
#define _USART_IRCTRL_IRPRSEN_SHIFT
__IOM uint32_t IRCTRL
USART_IrDAPrsSel_Typedef irPrsSel
Definition: em_usart.h:533
__IOM uint32_t IFC
__IOM uint32_t TXDOUBLEX
__IM uint32_t RXDOUBLE
__IOM uint32_t ROUTEPEN
USART_ClockMode_TypeDef clockMode
Definition: em_usart.h:442
__IM uint32_t RXDOUBLEX
void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init)
Init USART for asynchronous IrDA mode.
Definition: em_usart.c:721
#define _USART_TRIGCTRL_TXTEN_MASK
#define USART_CMD_TXTRIDIS
__IOM uint32_t CLKDIV
#define USART_CTRL_RXINV
USART_Enable_TypeDef enable
Definition: em_usart.h:421
__IOM uint32_t ROUTELOC1
#define _USART_CTRL_OVS_MASK
void USART_TxExt(USART_TypeDef *usart, uint16_t data)
Transmit one 4-9 bit frame with extended control.
Definition: em_usart.c:1184
USART_Databits_TypeDef databits
Definition: em_usart.h:433
void USART_Reset(USART_TypeDef *usart)
Reset USART/UART to same state as after a HW reset.
Definition: em_usart.c:856
#define _USART_CMD_RXEN_MASK
__IOM uint32_t INPUT
uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data)
Perform one 8 bit frame SPI transfer.
Definition: em_usart.c:1050
#define USART_CTRL_AUTOTX
USART_OVS_TypeDef
Definition: em_usart.h:141
__STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, uint32_t mask, uint32_t val)
Perform peripheral register masked clear and value write.
Definition: em_bus.h:288
void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init)
Init USART for I2S mode.
Definition: em_usart.c:777
#define USART_FRAME_STOPBITS_DEFAULT
USART_Enable_TypeDef
Definition: em_usart.h:124
#define USART_IRCTRL_IREN
#define _USART_TRIGCTRL_AUTOTXTEN_MASK
#define _USART_CLKDIV_DIV_MASK
void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable)
Enable/disable USART/UART receiver and/or transmitter.
Definition: em_usart.c:527
void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init)
Initialize automatic transmissions using PRS channel as trigger.
Definition: em_usart.c:816
void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init)
Init USART/UART for normal asynchronous mode.
Definition: em_usart.c:569
#define _USART_IEN_RESETVALUE
#define USART_TRIGCTRL_AUTOTXTEN
uint16_t USART_RxDouble(USART_TypeDef *usart)
Receive two 4-8 bit frames, or one 10-16 bit frame.
Definition: em_usart.c:956
#define USART_CTRL_SYNC
__IOM uint32_t FRAME
uint32_t USART_BaudrateGet(USART_TypeDef *usart)
Get current baudrate for USART/UART.
Definition: em_usart.c:431
#define _USART_IRCTRL_IRFILT_SHIFT
uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock)
Get clock frequency for a clock point.
Definition: em_cmu.c:1550
#define _USART_I2SCTRL_RESETVALUE
#define _USART_TIMING_CSHOLD_SHIFT
#define USART_CMD_RXDIS
__IOM uint32_t CMD
__IM uint32_t STATUS
__IOM uint32_t IEN
#define USART_CMD_CLEARRX
#define USART_I2SCTRL_DMASPLIT
#define _USART_TRIGCTRL_RXTEN_MASK
void USART_TxDouble(USART_TypeDef *usart, uint16_t data)
Transmit two 4-9 bit frames, or one 10-16 bit frame.
Definition: em_usart.c:1120
#define USART_CMD_RXBLOCKDIS
USART_PrsRxCh_TypeDef prsRxCh
Definition: em_usart.h:327
#define _USART_INPUT_RESETVALUE
void USART_BaudrateAsyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate, USART_OVS_TypeDef ovs)
Configure USART/UART operating in asynchronous mode to use a given baudrate (or as close as possible ...
Definition: em_usart.c:164