28 #if defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
29 #define SPI_DMA_IRQ DMA_IRQn
31 #elif defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
32 #define SPI_DMA_IRQ LDMA_IRQn
35 #error "No valid SPIDRV DMA engine defined."
38 static bool spidrvIsInitialized =
false;
42 int itemsTransferred );
46 static bool RxDMAComplete(
unsigned int channel,
47 unsigned int sequenceNo,
50 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
81 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
107 if ( handle == NULL )
112 if ( initData == NULL )
121 #if defined( USART0 )
129 #if defined( USART1 )
137 #if defined( USART2 )
139 else if ( initData->
port == USART2 )
141 handle->usartClock = cmuClock_USART2;
142 handle->txDMASignal = dmadrvPeripheralSignal_USART2_TXBL;
143 handle->rxDMASignal = dmadrvPeripheralSignal_USART2_RXDATAV;
145 #if defined( USART3 )
147 else if ( initData->
port == USART3 )
149 handle->usartClock = cmuClock_USART3;
150 handle->txDMASignal = dmadrvPeripheralSignal_USART3_TXBL;
151 handle->rxDMASignal = dmadrvPeripheralSignal_USART3_RXDATAV;
153 #if defined( USART4 )
155 else if ( initData->
port == USART4 )
157 handle->usartClock = cmuClock_USART4;
158 handle->txDMASignal = dmadrvPeripheralSignal_USART4_TXBL;
159 handle->rxDMASignal = dmadrvPeripheralSignal_USART4_RXDATAV;
161 #if defined( USART5 )
163 else if ( initData->
port == USART5 )
165 handle->usartClock = cmuClock_USART5;
166 handle->txDMASignal = dmadrvPeripheralSignal_USART5_TXBL;
167 handle->rxDMASignal = dmadrvPeripheralSignal_USART5_RXDATAV;
169 #if defined( USARTRF0 )
171 else if ( initData->
port == USARTRF0 )
173 handle->usartClock = cmuClock_USARTRF0;
174 handle->txDMASignal = dmadrvPeripheralSignal_USARTRF0_TXBL;
175 handle->rxDMASignal = dmadrvPeripheralSignal_USARTRF0_RXDATAV;
177 #if defined( USARTRF1 )
179 else if ( initData->
port == USARTRF1 )
181 handle->usartClock = cmuClock_USARTRF1;
182 handle->txDMASignal = dmadrvPeripheralSignal_USARTRF1_TXBL;
183 handle->rxDMASignal = dmadrvPeripheralSignal_USARTRF1_RXDATAV;
191 handle->initData = *initData;
195 usartInit.
msbf =
true;
243 #if defined( USART_ROUTEPEN_TXPEN )
244 initData->
port->ROUTEPEN = USART_ROUTEPEN_TXPEN
245 | USART_ROUTEPEN_RXPEN
246 | USART_ROUTEPEN_CLKPEN
247 | USART_ROUTEPEN_CSPEN;
249 initData->
port->ROUTELOC0 = ( initData->
port->ROUTELOC0 &
250 ~( _USART_ROUTELOC0_TXLOC_MASK
251 | _USART_ROUTELOC0_RXLOC_MASK
252 | _USART_ROUTELOC0_CLKLOC_MASK
253 | _USART_ROUTELOC0_CSLOC_MASK ) )
254 | ( initData->portLocationTx << _USART_ROUTELOC0_TXLOC_SHIFT )
255 | ( initData->portLocationRx << _USART_ROUTELOC0_RXLOC_SHIFT )
256 | ( initData->portLocationClk << _USART_ROUTELOC0_CLKLOC_SHIFT )
257 | ( initData->portLocationCs << _USART_ROUTELOC0_CSLOC_SHIFT );
270 #if defined( USART_ROUTEPEN_TXPEN )
271 initData->
port->ROUTEPEN = USART_ROUTEPEN_TXPEN
272 | USART_ROUTEPEN_RXPEN
273 | USART_ROUTEPEN_CLKPEN;
275 initData->
port->ROUTELOC0 = ( initData->
port->ROUTELOC0 &
276 ~( _USART_ROUTELOC0_TXLOC_MASK
277 | _USART_ROUTELOC0_RXLOC_MASK
278 | _USART_ROUTELOC0_CLKLOC_MASK ) )
279 | ( initData->portLocationTx << _USART_ROUTELOC0_TXLOC_SHIFT )
280 | ( initData->portLocationRx << _USART_ROUTELOC0_RXLOC_SHIFT )
281 | ( initData->portLocationClk << _USART_ROUTELOC0_CLKLOC_SHIFT );
297 if ( ! spidrvIsInitialized )
299 spidrvIsInitialized =
true;
302 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
311 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
349 if ( handle == NULL )
358 ConfigGPIO( handle,
false );
360 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
392 if ( handle == NULL )
398 if ( handle->state == spidrvStateIdle )
404 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
416 handle->state = spidrvStateIdle;
418 handle->blockingCompleted =
true;
420 if ( handle->userCallback != NULL )
422 handle->userCallback( handle,
424 handle->transferCount - handle->remaining );
445 if ( handle == NULL )
450 if ( bitRate == NULL )
474 if ( handle == NULL )
479 if ( frameLength == NULL )
484 *frameLength = handle->initData.frameLength;
508 int *itemsTransferred,
509 int *itemsRemaining )
513 if ( handle == NULL )
518 if ( ( itemsTransferred == NULL ) || ( itemsRemaining == NULL ) )
524 if ( handle->state == spidrvStateIdle )
526 remaining = handle->remaining;
530 DMADRV_TransferRemainingCount( handle->rxDMACh, &remaining );
534 *itemsTransferred = handle->transferCount - remaining;
535 *itemsRemaining = remaining;
571 if ( ( retVal = TransferApiPrologue( handle, buffer, count ) )
577 StartReceiveDMA( handle, buffer, count, callback );
613 if ( ( retVal = TransferApiBlockingPrologue( handle, buffer, count ) )
619 StartReceiveDMA( handle, buffer, count, BlockingComplete );
621 WaitForTransferCompletion( handle );
623 return handle->transferStatus;
645 const void *txBuffer,
657 if ( ( retVal = TransferApiPrologue( handle, (
void*)txBuffer, count ) )
663 if ( rxBuffer == NULL )
668 StartTransferDMA( handle, txBuffer, rxBuffer, count, callback );
695 const void *txBuffer,
706 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)txBuffer, count ))
712 if ( rxBuffer == NULL )
717 StartTransferDMA( handle, txBuffer, rxBuffer, count, BlockingComplete );
719 WaitForTransferCompletion( handle );
721 return handle->transferStatus;
751 if ( handle == NULL )
762 if ( handle->state != spidrvStateIdle )
767 handle->state = spidrvStateTransferring;
770 if ( ( pRx = rxValue ) == NULL )
775 StartTransferDMA( handle, &txValue, pRx, 1, BlockingComplete );
777 WaitForTransferCompletion( handle );
779 return handle->transferStatus;
813 if ( ( retVal = TransferApiPrologue( handle, (
void*)buffer, count ) )
819 StartTransmitDMA( handle, buffer, count, callback );
854 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)buffer, count ) )
860 StartTransmitDMA( handle, buffer, count, BlockingComplete );
862 WaitForTransferCompletion( handle );
864 return handle->transferStatus;
883 if ( handle == NULL )
889 if ( handle->state != spidrvStateIdle )
895 handle->initData.bitRate = bitRate;
918 if ( handle == NULL )
931 if ( handle->state != spidrvStateIdle )
937 handle->initData.frameLength = frameLength + 3;
938 handle->initData.port->FRAME = ( handle->initData.port->FRAME
947 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
982 if ( ( retVal = TransferApiPrologue( handle, buffer, count ) )
1005 StartReceiveDMA( handle, buffer, count, callback );
1045 if ( ( retVal = TransferApiBlockingPrologue( handle, buffer, count ) )
1068 StartReceiveDMA( handle, buffer, count, BlockingComplete );
1070 WaitForTransferCompletion( handle );
1072 return handle->transferStatus;
1096 const void *txBuffer,
1109 if ( ( retVal = TransferApiPrologue( handle, (
void*)txBuffer, count ) )
1115 if ( rxBuffer == NULL )
1137 StartTransferDMA( handle, txBuffer, rxBuffer, count, callback );
1167 const void *txBuffer,
1179 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)txBuffer, count ))
1185 if ( rxBuffer == NULL )
1207 StartTransferDMA( handle, txBuffer, rxBuffer, count, BlockingComplete );
1209 WaitForTransferCompletion( handle );
1211 return handle->transferStatus;
1248 if ( ( retVal = TransferApiPrologue( handle, (
void*)buffer, count ) )
1271 StartTransmitDMA( handle, buffer, count, callback );
1311 if ( ( retVal = TransferApiBlockingPrologue( handle, (
void*)buffer, count ) )
1334 StartTransmitDMA( handle, buffer, count, BlockingComplete );
1336 WaitForTransferCompletion( handle );
1338 return handle->transferStatus;
1352 int itemsTransferred )
1354 (void)itemsTransferred;
1356 handle->transferStatus = transferStatus;
1357 handle->blockingCompleted =
true;
1365 #if defined( _USART_ROUTELOC0_MASK )
1370 int mosiPin, misoPin, clkPin;
1371 int mosiPort, misoPort, clkPort;
1373 #if defined( _USART_ROUTELOC0_MASK )
1374 initData = &handle->initData;
1378 #if defined( USART0 )
1380 else if ( handle->initData.port ==
USART0 )
1382 mosiPort = AF_USART0_TX_PORT( initData->portLocationTx );
1383 misoPort = AF_USART0_RX_PORT( initData->portLocationRx );
1384 clkPort = AF_USART0_CLK_PORT( initData->portLocationClk );
1385 handle->csPort = AF_USART0_CS_PORT( initData->portLocationCs );
1386 mosiPin = AF_USART0_TX_PIN( initData->portLocationTx );
1387 misoPin = AF_USART0_RX_PIN( initData->portLocationRx );
1388 clkPin = AF_USART0_CLK_PIN( initData->portLocationClk );
1389 handle->csPin = AF_USART0_CS_PIN( initData->portLocationCs );
1391 #if defined( USART1 )
1393 else if ( handle->initData.port ==
USART1 )
1395 mosiPort = AF_USART1_TX_PORT( initData->portLocationTx );
1396 misoPort = AF_USART1_RX_PORT( initData->portLocationRx );
1397 clkPort = AF_USART1_CLK_PORT( initData->portLocationClk );
1398 handle->csPort = AF_USART1_CS_PORT( initData->portLocationCs );
1399 mosiPin = AF_USART1_TX_PIN( initData->portLocationTx );
1400 misoPin = AF_USART1_RX_PIN( initData->portLocationRx );
1401 clkPin = AF_USART1_CLK_PIN( initData->portLocationClk );
1402 handle->csPin = AF_USART1_CS_PIN( initData->portLocationCs );
1404 #if defined( USART2 )
1406 else if ( handle->initData.port == USART2 )
1408 mosiPort = AF_USART2_TX_PORT( initData->portLocationTx );
1409 misoPort = AF_USART2_RX_PORT( initData->portLocationRx );
1410 clkPort = AF_USART2_CLK_PORT( initData->portLocationClk );
1411 handle->csPort = AF_USART2_CS_PORT( initData->portLocationCs );
1412 mosiPin = AF_USART2_TX_PIN( initData->portLocationTx );
1413 misoPin = AF_USART2_RX_PIN( initData->portLocationRx );
1414 clkPin = AF_USART2_CLK_PIN( initData->portLocationClk );
1415 handle->csPin = AF_USART2_CS_PIN( initData->portLocationCs );
1417 #if defined( USART3 )
1419 else if ( handle->initData.port == USART3 )
1421 mosiPort = AF_USART3_TX_PORT( initData->portLocationTx );
1422 misoPort = AF_USART3_RX_PORT( initData->portLocationRx );
1423 clkPort = AF_USART3_CLK_PORT( initData->portLocationClk );
1424 handle->csPort = AF_USART3_CS_PORT( initData->portLocationCs );
1425 mosiPin = AF_USART3_TX_PIN( initData->portLocationTx );
1426 misoPin = AF_USART3_RX_PIN( initData->portLocationRx );
1427 clkPin = AF_USART3_CLK_PIN( initData->portLocationClk );
1428 handle->csPin = AF_USART3_CS_PIN( initData->portLocationCs );
1430 #if defined( USART4 )
1432 else if ( handle->initData.port == USART4 )
1434 mosiPort = AF_USART4_TX_PORT( initData->portLocationTx );
1435 misoPort = AF_USART4_RX_PORT( initData->portLocationRx );
1436 clkPort = AF_USART4_CLK_PORT( initData->portLocationClk );
1437 handle->csPort = AF_USART4_CS_PORT( initData->portLocationCs );
1438 mosiPin = AF_USART4_TX_PIN( initData->portLocationTx );
1439 misoPin = AF_USART4_RX_PIN( initData->portLocationRx );
1440 clkPin = AF_USART4_CLK_PIN( initData->portLocationClk );
1441 handle->csPin = AF_USART4_CS_PIN( initData->portLocationCs );
1443 #if defined( USART5 )
1445 else if ( handle->initData.port == USART5 )
1447 mosiPort = AF_USART5_TX_PORT( initData->portLocationTx );
1448 misoPort = AF_USART5_RX_PORT( initData->portLocationRx );
1449 clkPort = AF_USART5_CLK_PORT( initData->portLocationClk );
1450 handle->csPort = AF_USART5_CS_PORT( initData->portLocationCs );
1451 mosiPin = AF_USART5_TX_PIN( initData->portLocationTx );
1452 misoPin = AF_USART5_RX_PIN( initData->portLocationRx );
1453 clkPin = AF_USART5_CLK_PIN( initData->portLocationClk );
1454 handle->csPin = AF_USART5_CS_PIN( initData->portLocationCs );
1456 #if defined( USARTRF0 )
1458 else if ( handle->initData.port == USARTRF0 )
1460 mosiPort = AF_USARTRF0_TX_PORT( initData->portLocationTx );
1461 misoPort = AF_USARTRF0_RX_PORT( initData->portLocationRx );
1462 clkPort = AF_USARTRF0_CLK_PORT( initData->portLocationClk );
1463 handle->csPort = AF_USARTRF0_CS_PORT( initData->portLocationCs );
1464 mosiPin = AF_USARTRF0_TX_PIN( initData->portLocationTx );
1465 misoPin = AF_USARTRF0_RX_PIN( initData->portLocationRx );
1466 clkPin = AF_USARTRF0_CLK_PIN( initData->portLocationClk );
1467 handle->csPin = AF_USARTRF0_CS_PIN( initData->portLocationCs );
1469 #if defined( USARTRF1 )
1471 else if ( handle->initData.port == USARTRF1 )
1473 mosiPort = AF_USARTRF1_TX_PORT( initData->portLocationTx );
1474 misoPort = AF_USARTRF1_RX_PORT( initData->portLocationRx );
1475 clkPort = AF_USARTRF1_CLK_PORT( initData->portLocationClk );
1476 handle->csPort = AF_USARTRF1_CS_PORT( initData->portLocationCs );
1477 mosiPin = AF_USARTRF1_TX_PIN( initData->portLocationTx );
1478 misoPin = AF_USARTRF1_RX_PIN( initData->portLocationRx );
1479 clkPin = AF_USARTRF1_CLK_PIN( initData->portLocationClk );
1480 handle->csPin = AF_USARTRF1_CS_PIN( initData->portLocationCs );
1489 location = handle->initData.portLocation;
1493 #if defined( USART0 )
1495 else if ( handle->initData.port ==
USART0 )
1497 mosiPort = AF_USART0_TX_PORT( location );
1498 misoPort = AF_USART0_RX_PORT( location );
1499 clkPort = AF_USART0_CLK_PORT( location );
1500 handle->csPort = AF_USART0_CS_PORT( location );
1501 mosiPin = AF_USART0_TX_PIN( location );
1502 misoPin = AF_USART0_RX_PIN( location );
1503 clkPin = AF_USART0_CLK_PIN( location );
1504 handle->csPin = AF_USART0_CS_PIN( location );
1506 #if defined( USART1 )
1508 else if ( handle->initData.port ==
USART1 )
1510 mosiPort = AF_USART1_TX_PORT( location );
1511 misoPort = AF_USART1_RX_PORT( location );
1512 clkPort = AF_USART1_CLK_PORT( location );
1513 handle->csPort = AF_USART1_CS_PORT( location );
1514 mosiPin = AF_USART1_TX_PIN( location );
1515 misoPin = AF_USART1_RX_PIN( location );
1516 clkPin = AF_USART1_CLK_PIN( location );
1517 handle->csPin = AF_USART1_CS_PIN( location );
1519 #if defined( USART2 )
1521 else if ( handle->initData.port == USART2 )
1523 mosiPort = AF_USART2_TX_PORT( location );
1524 misoPort = AF_USART2_RX_PORT( location );
1525 clkPort = AF_USART2_CLK_PORT( location );
1526 handle->csPort = AF_USART2_CS_PORT( location );
1527 mosiPin = AF_USART2_TX_PIN( location );
1528 misoPin = AF_USART2_RX_PIN( location );
1529 clkPin = AF_USART2_CLK_PIN( location );
1530 handle->csPin = AF_USART2_CS_PIN( location );
1532 #if defined( USARTRF0 )
1534 else if ( handle->initData.port == USARTRF0 )
1536 mosiPort = AF_USARTRF0_TX_PORT( location );
1537 misoPort = AF_USARTRF0_RX_PORT( location );
1538 clkPort = AF_USARTRF0_CLK_PORT( location );
1539 handle->csPort = AF_USARTRF0_CS_PORT( location );
1540 mosiPin = AF_USARTRF0_TX_PIN( location );
1541 misoPin = AF_USARTRF0_RX_PIN( location );
1542 clkPin = AF_USARTRF0_CLK_PIN( location );
1543 handle->csPin = AF_USARTRF0_CS_PIN( location );
1545 #if defined( USARTRF1 )
1547 else if ( handle->initData.port == USARTRF1 )
1549 mosiPort = AF_USARTRF1_TX_PORT( location );
1550 misoPort = AF_USARTRF1_RX_PORT( location );
1551 clkPort = AF_USARTRF1_CLK_PORT( location );
1552 handle->csPort = AF_USARTRF1_CS_PORT( location );
1553 mosiPin = AF_USARTRF1_TX_PIN( location );
1554 misoPin = AF_USARTRF1_RX_PIN( location );
1555 clkPin = AF_USARTRF1_CLK_PIN( location );
1556 handle->csPin = AF_USARTRF1_CS_PIN( location );
1646 static bool RxDMAComplete(
unsigned int channel,
1647 unsigned int sequenceNo,
1660 handle->state = spidrvStateIdle;
1661 handle->remaining = 0;
1663 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
1670 if ( handle->userCallback != NULL )
1679 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
1685 bool active, pending;
1691 if ( handle->state == spidrvStateTransferring )
1710 handle->remaining = handle->transferCount;
1713 handle->state = spidrvStateIdle;
1715 if ( handle->userCallback != NULL )
1717 handle->userCallback( handle,
1719 handle->transferCount - handle->remaining );
1733 void *rxPort, *txPort;
1734 DMADRV_DataSize_t size;
1736 handle->blockingCompleted =
false;
1737 handle->transferCount = count;
1739 handle->userCallback = callback;
1741 if ( handle->initData.frameLength > 8 )
1750 if ( handle->initData.frameLength > 8 )
1752 rxPort = (
void *)&(handle->initData.port->RXDOUBLE);
1753 txPort = (
void *)&(handle->initData.port->TXDOUBLE);
1757 rxPort = (
void *)&(handle->initData.port->RXDATA);
1758 txPort = (
void *)&(handle->initData.port->TXDATA);
1763 handle->rxDMASignal,
1774 handle->txDMASignal,
1776 (
void *)&(handle->initData.dummyTxValue),
1788 const void *txBuffer,
1793 void *rxPort, *txPort;
1794 DMADRV_DataSize_t size;
1796 handle->blockingCompleted =
false;
1797 handle->transferCount = count;
1799 handle->userCallback = callback;
1801 if ( handle->initData.frameLength > 8 )
1810 if ( handle->initData.frameLength > 8 )
1812 rxPort = (
void *)&(handle->initData.port->RXDOUBLE);
1813 txPort = (
void *)&(handle->initData.port->TXDOUBLE);
1817 rxPort = (
void *)&(handle->initData.port->RXDATA);
1818 txPort = (
void *)&(handle->initData.port->TXDATA);
1823 handle->rxDMASignal,
1834 handle->txDMASignal,
1852 void *rxPort, *txPort;
1853 DMADRV_DataSize_t size;
1855 handle->blockingCompleted =
false;
1856 handle->transferCount = count;
1858 handle->userCallback = callback;
1860 if ( handle->initData.frameLength > 8 )
1869 if ( handle->initData.frameLength > 8 )
1871 rxPort = (
void *)&(handle->initData.port->RXDOUBLE);
1872 txPort = (
void *)&(handle->initData.port->TXDOUBLE);
1876 rxPort = (
void *)&(handle->initData.port->RXDATA);
1877 txPort = (
void *)&(handle->initData.port->TXDATA);
1883 handle->rxDMASignal,
1894 handle->txDMASignal,
1913 if ( handle == NULL )
1924 if ( handle->state != spidrvStateIdle )
1929 handle->state = spidrvStateTransferring;
1944 if ( handle == NULL )
1955 if ( handle->state != spidrvStateIdle )
1960 handle->state = spidrvStateTransferring;
1974 while ( handle->blockingCompleted ==
false )
1976 #if defined( DMA_PRESENT ) && ( DMA_COUNT == 1 )
1978 #elif defined( LDMA_PRESENT ) && ( LDMA_COUNT == 1 )
1981 #error "No valid SPIDRV DMA engine defined."
1987 while ( handle->blockingCompleted ==
false );
1991 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
1998 && ( handle->state != spidrvStateIdle ) );
2000 if ( handle->state == spidrvStateIdle )
2002 return handle->transferStatus;
#define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE
Illegal SPI handle.
#define USART_CMD_CLEARRX
Ecode_t SPIDRV_GetTransferStatus(SPIDRV_Handle_t handle, int *itemsTransferred, int *itemsRemaining)
Get the status of a SPI transfer.
SPIDRV_Type_t type
SPI type, master or slave.
Ecode_t SPIDRV_DeInit(SPIDRV_Handle_t handle)
Deinitialize a SPI driver instance.
Ecode_t SPIDRV_AbortTransfer(SPIDRV_Handle_t handle)
Abort an ongoing SPI transfer.
#define CORE_DECLARE_IRQ_STATE
uint32_t RTCDRV_TimerID_t
Timer ID.
#define ECODE_EMDRV_RTCDRV_OK
Success return value.
#define USART_ROUTE_TXPEN
Ecode_t SPIDRV_STransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, int timeoutMs)
Start a SPI slave blocking transfer.
Ecode_t DMADRV_PeripheralMemory(unsigned int channelId, DMADRV_PeripheralSignal_t peripheralSignal, void *dst, void *src, bool dstInc, int len, DMADRV_DataSize_t size, DMADRV_Callback_t callback, void *cbUserParam)
Start a peripheral to memory DMA transfer.
Ecode_t SPIDRV_GetBitrate(SPIDRV_Handle_t handle, uint32_t *bitRate)
Get current SPI bus bitrate.
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init)
Init USART for synchronous mode.
#define ECODE_EMDRV_SPIDRV_ABORTED
SPI transfer has been aborted.
Ecode_t SPIDRV_MTransmitB(SPIDRV_Handle_t handle, const void *buffer, int count)
Start a SPI master blocking transmit transfer.
Ecode_t DMADRV_TransferActive(unsigned int channelId, bool *active)
Check if a transfer is running.
#define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR
Unable to allocated timeout timer.
#define ECODE_EMDRV_SPIDRV_MODE_ERROR
SPI master used slave API or vica versa.
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to spe...
MSB bit is transmitted first.
Ecode_t SPIDRV_MTransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transfer.
void DMA_IRQHandler(void)
Interrupt handler for DMA cycle completion handling.
Ecode_t SPIDRV_MReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master receive transfer.
SPIDRV_BitOrder_t bitOrder
Bit order on SPI bus, MSB or LSB first.
USART_TypeDef * port
The USART used for SPI.
Ecode_t SPIDRV_MTransferSingleItemB(SPIDRV_Handle_t handle, uint32_t txValue, void *rxValue)
Start a SPI master blocking single item (frame) transfer.
Ecode_t DMADRV_StopTransfer(unsigned int channelId)
Stop an ongoing DMA transfer.
Ecode_t RTCDRV_AllocateTimer(RTCDRV_TimerID_t *id)
Allocate timer.
#define _USART_FRAME_DATABITS_MASK
#define ECODE_EMDRV_SPIDRV_IDLE
No SPI transfer in progress.
Ecode_t SPIDRV_MTransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count)
Start a SPI master blocking transfer.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
Universal synchronous/asynchronous receiver/transmitter (USART/UART) peripheral API.
#define USART_CMD_CLEARTX
#define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR
Unable to allocated DMA channels.
SPI mode 2: CLKPOL=1, CLKPHA=0.
#define ECODE_EMDRV_SPIDRV_PARAM_ERROR
Illegal input parameter.
uint8_t portLocation
Location number for SPI pins.
uint32_t bitRate
SPI bitrate.
#define ECODE_EMDRV_SPIDRV_BUSY
The SPI port is busy.
#define ECODE_EMDRV_SPIDRV_OK
Success return value.
Ecode_t SPIDRV_SetFramelength(SPIDRV_Handle_t handle, uint32_t frameLength)
Set SPI framelength.
Ecode_t DMADRV_TransferRemainingCount(unsigned int channelId, int *remaining)
Get number of items remaining in a transfer.
SPI mode 1: CLKPOL=0, CLKPHA=1.
Ecode_t RTCDRV_StopTimer(RTCDRV_TimerID_t id)
Stop a given timer.
Ecode_t RTCDRV_Init(void)
Initialize RTCDRV driver.
#define _USART_FRAME_DATABITS_SHIFT
#define CORE_ENTER_ATOMIC()
#define CORE_ATOMIC_SECTION(yourcode)
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
#define USART_ROUTE_CSPEN
Transfer is started when bus is idle (CS deasserted).
General Purpose IO (GPIO) peripheral API.
#define _USART_FRAME_DATABITS_SIXTEEN
Ecode_t RTCDRV_FreeTimer(RTCDRV_TimerID_t id)
Free timer.
uint32_t Ecode_t
Typedef for API function error code return values.
#define _USART_ROUTE_LOCATION_SHIFT
#define DMADRV_MAX_XFER_COUNT
Maximum length of one DMA transfer.
Core interrupt handling API.
void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable)
Enable/disable a clock.
Ecode_t DMADRV_Init(void)
Initialize DMADRV.
Ecode_t SPIDRV_SetBitrate(SPIDRV_Handle_t handle, uint32_t bitRate)
Set SPI bus bitrate.
USART_ClockMode_TypeDef clockMode
Ecode_t SPIDRV_MTransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transmit transfer.
#define _USART_FRAME_DATABITS_FOUR
#define CORE_EXIT_ATOMIC()
#define ECODE_EMDRV_DMADRV_OK
Success return value.
void USART_Reset(USART_TypeDef *usart)
Reset USART/UART to same state as after a HW reset.
bool CORE_IrqIsBlocked(IRQn_Type irqN)
Check if a specific interrupt is disabled or blocked.
Ecode_t DMADRV_DeInit(void)
Deinitialize DMADRV.
Ecode_t DMADRV_AllocateChannel(unsigned int *channelId, void *capabilities)
Allocate (reserve) a DMA channel.
Ecode_t RTCDRV_StartTimer(RTCDRV_TimerID_t id, RTCDRV_TimerType_t type, uint32_t timeout, RTCDRV_Callback_t callback, void *user)
Start a timer.
static volatile uint8_t rxBuffer[RXBUFSIZE]
Ecode_t SPIDRV_STransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transfer.
Ecode_t SPIDRV_STransmitB(SPIDRV_Handle_t handle, const void *buffer, int count, int timeoutMs)
Start a SPI slave blocking transmit transfer.
#define USART_CTRL_AUTOCS
Ecode_t DMADRV_MemoryPeripheral(unsigned int channelId, DMADRV_PeripheralSignal_t peripheralSignal, void *dst, void *src, bool srcInc, int len, DMADRV_DataSize_t size, DMADRV_Callback_t callback, void *cbUserParam)
Start a memory to peripheral DMA transfer.
SPI mode 0: CLKPOL=0, CLKPHA=0.
Ecode_t SPIDRV_GetFramelength(SPIDRV_Handle_t handle, uint32_t *frameLength)
Get current SPI framelength.
Ecode_t SPIDRV_Init(SPIDRV_Handle_t handle, SPIDRV_Init_t *initData)
Initialize a SPI driver instance.
Ecode_t SPIDRV_STransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transmit transfer.
#define ECODE_EMDRV_SPIDRV_TIMEOUT
SPI transfer timeout.
Ecode_t DMADRV_TransferCompletePending(unsigned int channelId, bool *pending)
Check if a transfer complete is pending.
CS controlled by SPI driver.
Ecode_t SPIDRV_SReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave receive transfer.
#define USART_INITSYNC_DEFAULT
uint32_t USART_BaudrateGet(USART_TypeDef *usart)
Get current baudrate for USART/UART.
__STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port, unsigned int pin)
Read the pad value for a single pin in a GPIO port.
#define USART_ROUTE_CLKPEN
void(* SPIDRV_Callback_t)(struct SPIDRV_HandleData *handle, Ecode_t transferStatus, int itemsTransferred)
SPIDRV transfer completion callback function.
SPI mode 3: CLKPOL=1, CLKPHA=1.
Ecode_t SPIDRV_SReceiveB(SPIDRV_Handle_t handle, void *buffer, int count, int timeoutMs)
Start a SPI slave blocking receive transfer.
SPIDRV_HandleData_t * SPIDRV_Handle_t
SPI driver instance handle.
SPIDRV_CsControl_t csControl
Select master mode chip select (CS) control scheme.
#define USART_ROUTE_RXPEN
SPIDRV_ClockMode_t clockMode
SPI mode, CLKPOL/CLKPHASE setting.
Ecode_t SPIDRV_MReceiveB(SPIDRV_Handle_t handle, void *buffer, int count)
Start a SPI master blocking receive transfer.
Ecode_t DMADRV_FreeChannel(unsigned int channelId)
Free an allocate (reserved) DMA channel.