EZR32 Wonder Gecko Software Documentation
ezr32wg-doc-5.1.2
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#define ACMP0 ((ACMP_TypeDef *) ACMP0_BASE) |
ACMP0 base pointer
Definition at line 420 of file ezr32wg330f256r69.h.
Referenced by CAPLESENSE_setupACMP().
#define ACMP1 ((ACMP_TypeDef *) ACMP1_BASE) |
ACMP1 base pointer
Definition at line 421 of file ezr32wg330f256r69.h.
Referenced by CAPLESENSE_setupACMP().
#define ADC0 ((ADC_TypeDef *) ADC0_BASE) |
ADC0 base pointer
Definition at line 434 of file ezr32wg330f256r69.h.
Referenced by ADC0_IRQHandler(), ADC_Init(), adcInit(), getAdcSample(), MIC_init(), MIC_start(), TOUCH_GetPos(), and TOUCH_Init().
#define AES ((AES_TypeDef *) AES_BASE) |
AES base pointer
Definition at line 403 of file ezr32wg330f256r69.h.
Referenced by AES_CBC128(), AES_CBC256(), AES_CFB128(), AES_CFB256(), AES_CTR128(), AES_CTR256(), AES_DecryptKey128(), AES_DecryptKey256(), AES_ECB128(), AES_ECB256(), AES_IntClear(), AES_IntDisable(), AES_IntEnable(), AES_IntGet(), AES_IntGetEnabled(), AES_IntSet(), AES_OFB128(), and AES_OFB256().
#define BURTC ((BURTC_TypeDef *) BURTC_BASE) |
BURTC base pointer
Definition at line 436 of file ezr32wg330f256r69.h.
Referenced by BURTC_ClockFreqGet(), BURTC_CompareGet(), BURTC_CompareSet(), BURTC_CounterGet(), BURTC_CounterReset(), BURTC_Enable(), BURTC_FreezeEnable(), BURTC_Init(), BURTC_IntClear(), BURTC_IntDisable(), BURTC_IntEnable(), BURTC_IntGet(), BURTC_IntGetEnabled(), BURTC_IntSet(), BURTC_Lock(), BURTC_Powerdown(), BURTC_RetRegGet(), BURTC_RetRegSet(), BURTC_Status(), BURTC_StatusClear(), BURTC_TimestampGet(), and BURTC_Unlock().
#define CALIBRATE ((CALIBRATE_TypeDef *) CALIBRATE_BASE) |
CALIBRATE base pointer
Definition at line 439 of file ezr32wg330f256r69.h.
#define CMU ((CMU_TypeDef *) CMU_BASE) |
CMU base pointer
Definition at line 408 of file ezr32wg330f256r69.h.
Referenced by adcDeInit(), BSP_TraceSwoSetup(), CAPSENSE_Init(), CHIP_Init(), CMU_AUXHFRCOBandGet(), CMU_AUXHFRCOBandSet(), CMU_Calibrate(), CMU_CalibrateConfig(), CMU_CalibrateCont(), CMU_CalibrateCountGet(), CMU_CalibrateStart(), CMU_CalibrateStop(), CMU_ClockDivGet(), CMU_ClockDivSet(), CMU_ClockEnable(), CMU_ClockFreqGet(), CMU_ClockSelectGet(), CMU_ClockSelectSet(), CMU_FreezeEnable(), CMU_HFRCOBandGet(), CMU_HFRCOBandSet(), CMU_HFRCOStartupDelayGet(), CMU_HFRCOStartupDelaySet(), CMU_HFXOInit(), CMU_IntClear(), CMU_IntDisable(), CMU_IntEnable(), CMU_IntGet(), CMU_IntGetEnabled(), CMU_IntSet(), CMU_LCDClkFDIVGet(), CMU_LCDClkFDIVSet(), CMU_LFXOInit(), CMU_Lock(), CMU_OscillatorEnable(), CMU_OscillatorTuningGet(), CMU_OscillatorTuningSet(), CMU_PCNTClockExternalGet(), CMU_PCNTClockExternalSet(), CMU_Unlock(), EMU_EnterEM3(), MIC_init(), SegmentLCD_Disable(), SegmentLCD_Init(), SystemCoreClockGet(), SystemHFClockGet(), SystemHFXOClockSet(), SystemLFXOClockSet(), UARTDRV_InitLeuart(), UDELAY_Calibrate(), USBD_Init(), USBD_Stop(), USBH_Init(), USBH_Stop(), and USBH_WaitForDeviceConnectionB().
#define DAC0 ((DAC_TypeDef *) DAC0_BASE) |
DAC0 base pointer
Definition at line 435 of file ezr32wg330f256r69.h.
#define DEVINFO ((DEVINFO_TypeDef *) DEVINFO_BASE) |
DEVINFO base pointer
Definition at line 440 of file ezr32wg330f256r69.h.
Referenced by CMU_AUXHFRCOBandSet(), CMU_HFRCOBandSet(), DAC_Init(), DAC_Reset(), EMU_DCDCOutputVoltageSet(), GetProdRev(), OPAMP_Enable(), SYSTEM_GetCalibrationTemperature(), SYSTEM_GetFamily(), SYSTEM_GetFlashPageSize(), SYSTEM_GetFlashSize(), SYSTEM_GetPartNumber(), SYSTEM_GetProdRev(), SYSTEM_GetSRAMSize(), SYSTEM_GetUnique(), and TEMPDRV_Init().
#define DMA ((DMA_TypeDef *) DMA_BASE) |
DMA base pointer
Definition at line 402 of file ezr32wg330f256r69.h.
Referenced by CDC_StateChangeEvent(), DMA_ActivateAuto(), DMA_ActivateBasic(), DMA_ActivatePingPong(), DMA_ActivateScatterGather(), DMA_CfgChannel(), DMA_CfgDescr(), DMA_CfgLoop(), DMA_CfgRect(), DMA_ChannelEnable(), DMA_ChannelEnabled(), DMA_ChannelRequestEnable(), DMA_Init(), DMA_IntClear(), DMA_IntDisable(), DMA_IntEnable(), DMA_IntGet(), DMA_IntGetEnabled(), DMA_IntSet(), DMA_IRQHandler(), DMA_RefreshPingPong(), DMA_Reset(), DMA_ResetLoop(), DMA_ResetRect(), DMADRV_DeInit(), DMADRV_TransferCompletePending(), DMADRV_TransferDone(), and DMADRV_TransferRemainingCount().
#define EMU ((EMU_TypeDef *) EMU_BASE) |
EMU base pointer
Definition at line 406 of file ezr32wg330f256r69.h.
Referenced by CMU_HFXOInit(), CMU_LFXOInit(), EMU_BUPDInit(), EMU_BUPinEnable(), EMU_BUReady(), EMU_BUThresholdSet(), EMU_BUThresRangeSet(), EMU_DCDCConductionModeSet(), EMU_DCDCInit(), EMU_DCDCLnRcoBandSet(), EMU_DCDCModeSet(), EMU_DCDCOptimizeSlice(), EMU_DCDCOutputVoltageSet(), EMU_DCDCPowerOff(), EMU_EM23Init(), EMU_EM2Block(), EMU_EM2UnBlock(), EMU_EM4Init(), EMU_EM4Lock(), EMU_EnterEM4(), EMU_IntClear(), EMU_IntDisable(), EMU_IntEnable(), EMU_IntGet(), EMU_IntGetEnabled(), EMU_IntSet(), EMU_Lock(), EMU_MemPwrDown(), EMU_RamPowerDown(), EMU_Unlock(), GPIO_EM4SetPinRetention(), MSC_ErasePage(), MSC_Init(), RMU_ResetCauseClear(), TEMPDRV_GetTemp(), and updateInterrupts().
#define ETM ((ETM_TypeDef *) ETM_BASE) |
ETM base pointer
Definition at line 438 of file ezr32wg330f256r69.h.
#define FPUEH ((FPUEH_TypeDef *) FPUEH_BASE) |
FPUEH base pointer
Definition at line 410 of file ezr32wg330f256r69.h.
#define GPIO ((GPIO_TypeDef *) GPIO_BASE) |
GPIO base pointer
Definition at line 431 of file ezr32wg330f256r69.h.
Referenced by BSP_TraceSwoSetup(), CHIP_Init(), GPIO_DbgLocationSet(), GPIO_DbgSWDClkEnable(), GPIO_DbgSWDIOEnable(), GPIO_DbgSWOEnable(), GPIO_DriveModeSet(), GPIO_EM4DisablePinWakeup(), GPIO_EM4EnablePinWakeup(), GPIO_EM4GetPinWakeupCause(), GPIO_EM4SetPinRetention(), GPIO_ExtIntConfig(), GPIO_InputSenseSet(), GPIO_IntClear(), GPIO_IntDisable(), GPIO_IntEnable(), GPIO_IntGet(), GPIO_IntGetEnabled(), GPIO_IntSet(), GPIO_Lock(), GPIO_PinInGet(), GPIO_PinModeGet(), GPIO_PinModeSet(), GPIO_PinOutClear(), GPIO_PinOutGet(), GPIO_PinOutSet(), GPIO_PinOutToggle(), GPIO_PortInGet(), GPIO_PortOutClear(), GPIO_PortOutGet(), GPIO_PortOutSet(), GPIO_PortOutSetVal(), GPIO_PortOutToggle(), GPIO_Unlock(), MICROSD_Deselect(), and MICROSD_Select().
#define I2C0 ((I2C_TypeDef *) I2C0_BASE) |
I2C0 base pointer
Definition at line 429 of file ezr32wg330f256r69.h.
Referenced by I2C_Transfer(), I2C_TransferInit(), I2CSPM_Init(), performI2CTransfer(), and setupI2C().
#define I2C1 ((I2C_TypeDef *) I2C1_BASE) |
I2C1 base pointer
Definition at line 430 of file ezr32wg330f256r69.h.
Referenced by I2C_Transfer(), I2C_TransferInit(), and I2CSPM_Init().
#define LESENSE ((LESENSE_TypeDef *) LESENSE_BASE) |
LESENSE base pointer
Definition at line 409 of file ezr32wg330f256r69.h.
Referenced by CAPLESENSE_setupLESENSE(), LESENSE_AltExConfig(), LESENSE_ChannelActiveGet(), LESENSE_ChannelConfig(), LESENSE_ChannelEnable(), LESENSE_ChannelEnableMask(), LESENSE_ChannelThresSet(), LESENSE_ChannelTimingSet(), LESENSE_ClkDivSet(), LESENSE_DecoderStart(), LESENSE_DecoderStateConfig(), LESENSE_DecoderStateGet(), LESENSE_DecoderStateSet(), LESENSE_DecoderStop(), LESENSE_Init(), LESENSE_IntClear(), LESENSE_IntDisable(), LESENSE_IntEnable(), LESENSE_IntGet(), LESENSE_IntGetEnabled(), LESENSE_IntSet(), LESENSE_RAMPowerDown(), LESENSE_Reset(), LESENSE_ResultBufferClear(), LESENSE_ScanFreqSet(), LESENSE_ScanModeSet(), LESENSE_ScanResultDataBufferGet(), LESENSE_ScanResultDataGet(), LESENSE_ScanResultGet(), LESENSE_ScanStart(), LESENSE_ScanStop(), LESENSE_SensorStateGet(), LESENSE_StartDelaySet(), LESENSE_StatusGet(), and LESENSE_StatusWait().
#define LETIMER0 ((LETIMER_TypeDef *) LETIMER0_BASE) |
LETIMER0 base pointer
Definition at line 425 of file ezr32wg330f256r69.h.
#define LEUART0 ((LEUART_TypeDef *) LEUART0_BASE) |
LEUART0 base pointer
Definition at line 422 of file ezr32wg330f256r69.h.
Referenced by LEUART_BaudrateGet(), LEUART_BaudrateSet(), and UARTDRV_InitLeuart().
#define LEUART1 ((LEUART_TypeDef *) LEUART1_BASE) |
LEUART1 base pointer
Definition at line 423 of file ezr32wg330f256r69.h.
Referenced by LEUART_BaudrateGet(), LEUART_BaudrateSet(), and UARTDRV_InitLeuart().
#define MSC ((MSC_TypeDef *) MSC_BASE) |
MSC base pointer
Definition at line 405 of file ezr32wg330f256r69.h.
Referenced by CHIP_Init(), MSC_BusStrategy(), MSC_Deinit(), MSC_EnableAutoCacheFlush(), MSC_EnableCache(), MSC_EnableCacheIRQs(), MSC_ErasePage(), MSC_ExecConfigSet(), MSC_FlushCache(), MSC_GetCacheMeasurement(), MSC_Init(), MSC_IntClear(), MSC_IntDisable(), MSC_IntEnable(), MSC_IntGet(), MSC_IntGetEnabled(), MSC_IntSet(), MSC_MassErase(), and MSC_StartCacheMeasurement().
#define PCNT0 ((PCNT_TypeDef *) PCNT0_BASE) |
PCNT0 base pointer
Definition at line 426 of file ezr32wg330f256r69.h.
Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().
#define PCNT1 ((PCNT_TypeDef *) PCNT1_BASE) |
PCNT1 base pointer
Definition at line 427 of file ezr32wg330f256r69.h.
Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().
#define PCNT2 ((PCNT_TypeDef *) PCNT2_BASE) |
PCNT2 base pointer
Definition at line 428 of file ezr32wg330f256r69.h.
Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().
#define PRS ((PRS_TypeDef *) PRS_BASE) |
PRS base pointer
Definition at line 433 of file ezr32wg330f256r69.h.
Referenced by BOARD_init(), CAPSENSE_Init(), ezradio_hal_GpioInit(), PRS_LevelSet(), PRS_PulseTrigger(), PRS_SourceAsyncSignalSet(), and PRS_SourceSignalSet().
#define RMU ((RMU_TypeDef *) RMU_BASE) |
RMU base pointer
Definition at line 407 of file ezr32wg330f256r69.h.
Referenced by BURTC_Reset(), EMU_BUPDInit(), RMU_ResetCauseClear(), RMU_ResetCauseGet(), and RMU_ResetControl().
#define ROMTABLE ((ROMTABLE_TypeDef *) ROMTABLE_BASE) |
ROMTABLE base pointer
Definition at line 441 of file ezr32wg330f256r69.h.
Referenced by SYSTEM_ChipRevisionGet().
#define RTC ((RTC_TypeDef *) RTC_BASE) |
RTC base pointer
Definition at line 424 of file ezr32wg330f256r69.h.
Referenced by RTC_CompareGet(), RTC_CompareSet(), RTC_CounterGet(), RTC_CounterSet(), RTC_Enable(), RTC_FreezeEnable(), RTC_Init(), RTC_IntClear(), RTC_IntDisable(), RTC_IntEnable(), RTC_IntGet(), RTC_IntGetEnabled(), RTC_IntSet(), RTC_Reset(), and UDELAY_Calibrate().
#define TIMER0 ((TIMER_TypeDef *) TIMER0_BASE) |
TIMER0 base pointer
Definition at line 416 of file ezr32wg330f256r69.h.
Referenced by CAPSENSE_Init(), CAPSENSE_Measure(), TIMER0_IRQHandler(), TIMER_ClearDTIFault(), TIMER_EnableDTI(), TIMER_GetDTIFault(), TIMER_InitDTI(), TIMER_Lock(), TIMER_Unlock(), and TIMER_Valid().
#define TIMER1 ((TIMER_TypeDef *) TIMER1_BASE) |
TIMER1 base pointer
Definition at line 417 of file ezr32wg330f256r69.h.
Referenced by CAPSENSE_Init(), CAPSENSE_Measure(), TIMER0_IRQHandler(), and TIMER_Valid().
#define TIMER2 ((TIMER_TypeDef *) TIMER2_BASE) |
TIMER2 base pointer
Definition at line 418 of file ezr32wg330f256r69.h.
Referenced by TIMER_Valid().
#define TIMER3 ((TIMER_TypeDef *) TIMER3_BASE) |
TIMER3 base pointer
Definition at line 419 of file ezr32wg330f256r69.h.
Referenced by TIMER_Valid().
#define UART0 ((USART_TypeDef *) UART0_BASE) |
UART0 base pointer
Definition at line 414 of file ezr32wg330f256r69.h.
Referenced by UARTDRV_InitUart().
#define UART1 ((USART_TypeDef *) UART1_BASE) |
UART1 base pointer
Definition at line 415 of file ezr32wg330f256r69.h.
Referenced by UARTDRV_InitUart().
#define USART1 ((USART_TypeDef *) USART1_BASE) |
USART1 base pointer
Definition at line 412 of file ezr32wg330f256r69.h.
Referenced by SPI_TFT_Init(), SPI_TFT_WriteRegister(), SPIDRV_Init(), and UARTDRV_InitUart().
#define USART2 ((USART_TypeDef *) USART2_BASE) |
USART2 base pointer
Definition at line 413 of file ezr32wg330f256r69.h.
Referenced by SPIDRV_Init(), and UARTDRV_InitUart().
#define USARTRF0 ((USART_TypeDef *) USARTRF0_BASE) |
USARTRF0 base pointer
Definition at line 411 of file ezr32wg330f256r69.h.
Referenced by SPIDRV_Init().
#define USB ((USB_TypeDef *) USB_BASE) |
#define VCMP ((VCMP_TypeDef *) VCMP_BASE) |
VCMP base pointer
Definition at line 432 of file ezr32wg330f256r69.h.
Referenced by VCMP_Disable(), VCMP_Enable(), VCMP_Init(), VCMP_IntClear(), VCMP_IntDisable(), VCMP_IntEnable(), VCMP_IntGet(), VCMP_IntGetEnabled(), VCMP_IntSet(), VCMP_LowPowerRefSet(), VCMP_Ready(), VCMP_TriggerSet(), VCMP_VDDHigher(), and VCMP_VDDLower().
#define WDOG ((WDOG_TypeDef *) WDOG_BASE) |
WDOG base pointer
Definition at line 437 of file ezr32wg330f256r69.h.