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EZR32 Wonder Gecko Software Documentation
ezr32wg-doc-5.1.2
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EZR32 Wonder Gecko Software Documentation
ezr32wg-doc-5.1.2
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Macros | |
| #define | ACMP0_BASE (0x40001000UL) |
| #define | ACMP1_BASE (0x40001400UL) |
| #define | ADC0_BASE (0x40002000UL) |
| #define | AES_BASE (0x400E0000UL) |
| #define | BURTC_BASE (0x40081000UL) |
| #define | CALIBRATE_BASE (0x0FE08000UL) |
| #define | CMU_BASE (0x400C8000UL) |
| #define | DAC0_BASE (0x40004000UL) |
| #define | DEVINFO_BASE (0x0FE081A8UL) |
| #define | DMA_BASE (0x400C2000UL) |
| #define | EMU_BASE (0x400C6000UL) |
| #define | ETM_BASE (0xE0041000UL) |
| #define | FPUEH_BASE (0x400C1C00UL) |
| #define | GPIO_BASE (0x40006000UL) |
| #define | I2C0_BASE (0x4000A000UL) |
| #define | I2C1_BASE (0x4000A400UL) |
| #define | LESENSE_BASE (0x4008C000UL) |
| #define | LETIMER0_BASE (0x40082000UL) |
| #define | LEUART0_BASE (0x40084000UL) |
| #define | LEUART1_BASE (0x40084400UL) |
| #define | LOCKBITS_BASE (0x0FE04000UL) |
| #define | MSC_BASE (0x400C0000UL) |
| #define | PCNT0_BASE (0x40086000UL) |
| #define | PCNT1_BASE (0x40086400UL) |
| #define | PCNT2_BASE (0x40086800UL) |
| #define | PRS_BASE (0x400CC000UL) |
| #define | RMU_BASE (0x400CA000UL) |
| #define | ROMTABLE_BASE (0xE00FFFD0UL) |
| #define | RTC_BASE (0x40080000UL) |
| #define | TIMER0_BASE (0x40010000UL) |
| #define | TIMER1_BASE (0x40010400UL) |
| #define | TIMER2_BASE (0x40010800UL) |
| #define | TIMER3_BASE (0x40010C00UL) |
| #define | UART0_BASE (0x4000E000UL) |
| #define | UART1_BASE (0x4000E400UL) |
| #define | USART1_BASE (0x4000C400UL) |
| #define | USART2_BASE (0x4000C800UL) |
| #define | USARTRF0_BASE (0x4000C000UL) |
| #define | USB_BASE (0x400C4000UL) |
| #define | USERDATA_BASE (0x0FE00000UL) |
| #define | VCMP_BASE (0x40000000UL) |
| #define | WDOG_BASE (0x40088000UL) |
| #define ACMP0_BASE (0x40001000UL) |
ACMP0 base address
Definition at line 370 of file ezr32wg330f256r69.h.
| #define ACMP1_BASE (0x40001400UL) |
ACMP1 base address
Definition at line 371 of file ezr32wg330f256r69.h.
| #define ADC0_BASE (0x40002000UL) |
ADC0 base address
Definition at line 384 of file ezr32wg330f256r69.h.
| #define AES_BASE (0x400E0000UL) |
AES base address
Definition at line 353 of file ezr32wg330f256r69.h.
| #define BURTC_BASE (0x40081000UL) |
BURTC base address
Definition at line 386 of file ezr32wg330f256r69.h.
| #define CALIBRATE_BASE (0x0FE08000UL) |
CALIBRATE base address
Definition at line 389 of file ezr32wg330f256r69.h.
| #define CMU_BASE (0x400C8000UL) |
CMU base address
Definition at line 358 of file ezr32wg330f256r69.h.
| #define DAC0_BASE (0x40004000UL) |
DAC0 base address
Definition at line 385 of file ezr32wg330f256r69.h.
| #define DEVINFO_BASE (0x0FE081A8UL) |
DEVINFO base address
Definition at line 390 of file ezr32wg330f256r69.h.
Referenced by SYSTEM_GetCalibrationValue().
| #define DMA_BASE (0x400C2000UL) |
DMA base address
Definition at line 352 of file ezr32wg330f256r69.h.
| #define EMU_BASE (0x400C6000UL) |
EMU base address
Definition at line 356 of file ezr32wg330f256r69.h.
Referenced by CHIP_Init(), EMU_EnterEM4(), and RMU_ResetCauseGet().
| #define ETM_BASE (0xE0041000UL) |
ETM base address
Definition at line 388 of file ezr32wg330f256r69.h.
| #define FPUEH_BASE (0x400C1C00UL) |
FPUEH base address
Definition at line 360 of file ezr32wg330f256r69.h.
| #define GPIO_BASE (0x40006000UL) |
GPIO base address
Definition at line 381 of file ezr32wg330f256r69.h.
| #define I2C0_BASE (0x4000A000UL) |
I2C0 base address
Definition at line 379 of file ezr32wg330f256r69.h.
| #define I2C1_BASE (0x4000A400UL) |
I2C1 base address
Definition at line 380 of file ezr32wg330f256r69.h.
| #define LESENSE_BASE (0x4008C000UL) |
LESENSE base address
Definition at line 359 of file ezr32wg330f256r69.h.
| #define LETIMER0_BASE (0x40082000UL) |
LETIMER0 base address
Definition at line 375 of file ezr32wg330f256r69.h.
| #define LEUART0_BASE (0x40084000UL) |
LEUART0 base address
Definition at line 372 of file ezr32wg330f256r69.h.
| #define LEUART1_BASE (0x40084400UL) |
LEUART1 base address
Definition at line 373 of file ezr32wg330f256r69.h.
| #define LOCKBITS_BASE (0x0FE04000UL) |
Lock-bits page base address
Definition at line 392 of file ezr32wg330f256r69.h.
| #define MSC_BASE (0x400C0000UL) |
MSC base address
Definition at line 355 of file ezr32wg330f256r69.h.
| #define PCNT0_BASE (0x40086000UL) |
PCNT0 base address
Definition at line 376 of file ezr32wg330f256r69.h.
| #define PCNT1_BASE (0x40086400UL) |
PCNT1 base address
Definition at line 377 of file ezr32wg330f256r69.h.
| #define PCNT2_BASE (0x40086800UL) |
PCNT2 base address
Definition at line 378 of file ezr32wg330f256r69.h.
| #define PRS_BASE (0x400CC000UL) |
PRS base address
Definition at line 383 of file ezr32wg330f256r69.h.
| #define RMU_BASE (0x400CA000UL) |
RMU base address
Definition at line 357 of file ezr32wg330f256r69.h.
| #define ROMTABLE_BASE (0xE00FFFD0UL) |
ROMTABLE base address
Definition at line 391 of file ezr32wg330f256r69.h.
| #define RTC_BASE (0x40080000UL) |
RTC base address
Definition at line 374 of file ezr32wg330f256r69.h.
| #define TIMER0_BASE (0x40010000UL) |
TIMER0 base address
Definition at line 366 of file ezr32wg330f256r69.h.
| #define TIMER1_BASE (0x40010400UL) |
TIMER1 base address
Definition at line 367 of file ezr32wg330f256r69.h.
| #define TIMER2_BASE (0x40010800UL) |
TIMER2 base address
Definition at line 368 of file ezr32wg330f256r69.h.
| #define TIMER3_BASE (0x40010C00UL) |
TIMER3 base address
Definition at line 369 of file ezr32wg330f256r69.h.
| #define UART0_BASE (0x4000E000UL) |
UART0 base address
Definition at line 364 of file ezr32wg330f256r69.h.
| #define UART1_BASE (0x4000E400UL) |
UART1 base address
Definition at line 365 of file ezr32wg330f256r69.h.
| #define USART1_BASE (0x4000C400UL) |
USART1 base address
Definition at line 362 of file ezr32wg330f256r69.h.
| #define USART2_BASE (0x4000C800UL) |
USART2 base address
Definition at line 363 of file ezr32wg330f256r69.h.
| #define USARTRF0_BASE (0x4000C000UL) |
USARTRF0 base address
Definition at line 361 of file ezr32wg330f256r69.h.
| #define USB_BASE (0x400C4000UL) |
USB base address
Definition at line 354 of file ezr32wg330f256r69.h.
| #define USERDATA_BASE (0x0FE00000UL) |
User data page base address
Definition at line 393 of file ezr32wg330f256r69.h.
| #define VCMP_BASE (0x40000000UL) |
VCMP base address
Definition at line 382 of file ezr32wg330f256r69.h.
| #define WDOG_BASE (0x40088000UL) |
WDOG base address
Definition at line 387 of file ezr32wg330f256r69.h.
1.8.10 
