Detailed Description

Core interrupt handling API.

Version: 5.1.2

License

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

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Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no obligation to support this Software. Silicon Labs is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Labs will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file em_core.c.

#include "em_core.h"
#include "em_assert.h"

Go to the source code of this file.

Macros
#define	CORE_ATOMIC_BASE_PRIORITY_LEVEL 3

#define	CORE_ATOMIC_METHOD CORE_ATOMIC_METHOD_PRIMASK

#define	CORE_INTERRUPT_ENTRY()

#define	CORE_INTERRUPT_EXIT()

Functions
void	CORE_AtomicDisableIrq (void)
	Disable interrupts. More...

void	CORE_AtomicEnableIrq (void)
	Enable interrupts. More...

void	CORE_CriticalDisableIrq (void)
	Disable interrupts. More...

void	CORE_CriticalEnableIrq (void)
	Enable interrupts. More...

CORE_irqState_t	CORE_EnterAtomic (void)
	Enter an ATOMIC section. More...

CORE_irqState_t	CORE_EnterCritical (void)
	Enter a CRITICAL section. More...

void	CORE_EnterNvicMask (CORE_nvicMask_t nvicState, const CORE_nvicMask_t disable)
	Enter a NVIC mask section. More...

void	CORE_ExitAtomic (CORE_irqState_t irqState)
	Exit an ATOMIC section. More...

void	CORE_ExitCritical (CORE_irqState_t irqState)
	Exit a CRITICAL section. More...

void	CORE_GetNvicEnabledMask (CORE_nvicMask_t *mask)
	Get current NVIC enable mask state. More...

bool	CORE_GetNvicMaskDisableState (const CORE_nvicMask_t *mask)
	Get NVIC disable state for a given mask. More...

void *	CORE_GetNvicRamTableHandler (IRQn_Type irqN)
	Utility function to get the handler for a specific interrupt. More...

bool	CORE_InIrqContext (void)
	Check if current cpu operation mode is handler mode. More...

void	CORE_InitNvicVectorTable (uint32_t sourceTable, uint32_t sourceSize, uint32_t targetTable, uint32_t targetSize, void *defaultHandler, bool overwriteActive)
	Initialize an interrupt vector table by copying table entries from a source to a target table. More...

bool	CORE_IrqIsBlocked (IRQn_Type irqN)
	Check if a specific interrupt is disabled or blocked. More...

bool	CORE_IrqIsDisabled (void)
	Check if interrupts are disabled. More...

void	CORE_NvicDisableMask (const CORE_nvicMask_t *disable)
	Disable NVIC interrupts. More...

void	CORE_NvicEnableMask (const CORE_nvicMask_t *enable)
	Set current NVIC interrupt enable mask. More...

bool	CORE_NvicIRQDisabled (IRQn_Type irqN)
	Check if a NVIC interrupt is disabled. More...

void	CORE_NvicMaskClearIRQ (IRQn_Type irqN, CORE_nvicMask_t *mask)
	Utility function to clear an IRQn bit in a NVIC enable/disable mask. More...

void	CORE_NvicMaskSetIRQ (IRQn_Type irqN, CORE_nvicMask_t *mask)
	Utility function to set an IRQn bit in a NVIC enable/disable mask. More...

void	CORE_SetNvicRamTableHandler (IRQn_Type irqN, void *handler)
	Utility function to set the handler for a specific interrupt. More...

void	CORE_YieldAtomic (void)
	Brief interrupt enable/disable sequence to allow handling of pending interrupts. More...

void	CORE_YieldCritical (void)
	Brief interrupt enable/disable sequence to allow handling of pending interrupts. More...

void	CORE_YieldNvicMask (const CORE_nvicMask_t *enable)
	Brief NVIC interrupt enable/disable sequence to allow handling of pending interrupts. More...

Detailed Description

License

Macros

Functions