37 #if defined(EBI_COUNT) && (EBI_COUNT > 0)
75 #define EBI_BANK0 (uint32_t)(1 << 1)
76 #define EBI_BANK1 (uint32_t)(1 << 2)
77 #define EBI_BANK2 (uint32_t)(1 << 3)
78 #define EBI_BANK3 (uint32_t)(1 << 4)
80 #define EBI_CS0 (uint32_t)(1 << 1)
81 #define EBI_CS1 (uint32_t)(1 << 2)
82 #define EBI_CS2 (uint32_t)(1 << 3)
83 #define EBI_CS3 (uint32_t)(1 << 4)
98 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
100 ebiModeD16 = EBI_CTRL_MODE_D16,
126 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
130 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
144 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
149 ebiALowA0 = EBI_ROUTE_ALB_A0,
151 ebiALowA8 = EBI_ROUTE_ALB_A8,
153 ebiALowA16 = EBI_ROUTE_ALB_A16,
155 ebiALowA24 = EBI_ROUTE_ALB_A24,
162 ebiAHighA0 = EBI_ROUTE_APEN_A0,
164 ebiAHighA5 = EBI_ROUTE_APEN_A5,
166 ebiAHighA6 = EBI_ROUTE_APEN_A6,
168 ebiAHighA7 = EBI_ROUTE_APEN_A7,
170 ebiAHighA8 = EBI_ROUTE_APEN_A8,
172 ebiAHighA9 = EBI_ROUTE_APEN_A9,
174 ebiAHighA10 = EBI_ROUTE_APEN_A10,
176 ebiAHighA11 = EBI_ROUTE_APEN_A11,
178 ebiAHighA12 = EBI_ROUTE_APEN_A12,
180 ebiAHighA13 = EBI_ROUTE_APEN_A13,
182 ebiAHighA14 = EBI_ROUTE_APEN_A14,
184 ebiAHighA15 = EBI_ROUTE_APEN_A15,
186 ebiAHighA16 = EBI_ROUTE_APEN_A16,
188 ebiAHighA17 = EBI_ROUTE_APEN_A17,
190 ebiAHighA18 = EBI_ROUTE_APEN_A18,
192 ebiAHighA19 = EBI_ROUTE_APEN_A19,
194 ebiAHighA20 = EBI_ROUTE_APEN_A20,
196 ebiAHighA21 = EBI_ROUTE_APEN_A21,
198 ebiAHighA22 = EBI_ROUTE_APEN_A22,
200 ebiAHighA23 = EBI_ROUTE_APEN_A23,
202 ebiAHighA24 = EBI_ROUTE_APEN_A24,
204 ebiAHighA25 = EBI_ROUTE_APEN_A25,
206 ebiAHighA26 = EBI_ROUTE_APEN_A26,
208 ebiAHighA27 = EBI_ROUTE_APEN_A27,
210 ebiAHighA28 = EBI_ROUTE_APEN_A28,
216 ebiLocation0 = EBI_ROUTE_LOCATION_LOC0,
218 ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
220 ebiLocation2 = EBI_ROUTE_LOCATION_LOC2
221 } EBI_Location_TypeDef;
225 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
230 ebiTFTBank0 = EBI_TFTCTRL_BANKSEL_BANK0,
232 ebiTFTBank1 = EBI_TFTCTRL_BANKSEL_BANK1,
234 ebiTFTBank2 = EBI_TFTCTRL_BANKSEL_BANK2,
236 ebiTFTBank3 = EBI_TFTCTRL_BANKSEL_BANK3
237 } EBI_TFTBank_TypeDef;
243 ebiTFTColorSrcMem = EBI_TFTCTRL_COLOR1SRC_MEM,
245 ebiTFTColorSrcPixel1 = EBI_TFTCTRL_COLOR1SRC_PIXEL1,
246 } EBI_TFTColorSrc_TypeDef;
252 ebiTFTInterleaveUnlimited = EBI_TFTCTRL_INTERLEAVE_UNLIMITED,
254 ebiTFTInterleaveOnePerDClk = EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK,
256 ebiTFTInterleavePorch = EBI_TFTCTRL_INTERLEAVE_PORCH,
257 } EBI_TFTInterleave_TypeDef;
263 ebiTFTFrameBufTriggerVSync = EBI_TFTCTRL_FBCTRIG_VSYNC,
265 ebiTFTFrameBufTriggerHSync = EBI_TFTCTRL_FBCTRIG_HSYNC,
266 } EBI_TFTFrameBufTrigger_TypeDef;
272 ebiTFTMBDisabled = EBI_TFTCTRL_MASKBLEND_DISABLED,
274 ebiTFTMBIMask = EBI_TFTCTRL_MASKBLEND_IMASK,
276 ebiTFTMBIAlpha = EBI_TFTCTRL_MASKBLEND_IALPHA,
278 ebiTFTMBIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IMASKIALPHA,
280 ebiTFTMBEMask = EBI_TFTCTRL_MASKBLEND_EMASK,
282 ebiTFTMBEAlpha = EBI_TFTCTRL_MASKBLEND_EALPHA,
284 ebiTFTMBEMaskAlpha = EBI_TFTCTRL_MASKBLEND_EMASKEALPHA,
285 } EBI_TFTMaskBlend_TypeDef;
291 ebiTFTDDModeDisabled = EBI_TFTCTRL_DD_DISABLED,
293 ebiTFTDDModeInternal = EBI_TFTCTRL_DD_INTERNAL,
295 ebiTFTDDModeExternal = EBI_TFTCTRL_DD_EXTERNAL,
296 } EBI_TFTDDMode_TypeDef;
302 ebiTFTWidthByte = EBI_TFTCTRL_WIDTH_BYTE,
304 ebiTFTWidthHalfWord = EBI_TFTCTRL_WIDTH_HALFWORD,
305 } EBI_TFTWidth_TypeDef;
328 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
348 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
358 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
372 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
374 bool writeBufferDisable;
378 EBI_ALow_TypeDef aLow;
380 EBI_AHigh_TypeDef aHigh;
382 EBI_Location_TypeDef location;
389 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
390 #define EBI_INIT_DEFAULT \
425 #define EBI_INIT_DEFAULT \
449 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
455 EBI_TFTBank_TypeDef bank;
457 EBI_TFTWidth_TypeDef width;
459 EBI_TFTColorSrc_TypeDef colSrc;
461 EBI_TFTInterleave_TypeDef interleave;
463 EBI_TFTFrameBufTrigger_TypeDef fbTrigger;
467 EBI_TFTMaskBlend_TypeDef maskBlend;
469 EBI_TFTDDMode_TypeDef driveMode;
497 uint32_t addressOffset;
506 } EBI_TFTInit_TypeDef;
509 #define EBI_TFTINIT_DEFAULT \
512 ebiTFTWidthHalfWord, \
514 ebiTFTInterleaveUnlimited, \
515 ebiTFTFrameBufTriggerVSync, \
518 ebiTFTDDModeExternal, \
549 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
550 void EBI_TFTInit(
const EBI_TFTInit_TypeDef *ebiTFTInit);
551 void EBI_TFTSizeSet(uint32_t horizontal, uint32_t vertical);
552 void EBI_TFTHPorchSet(
int front,
int back,
int pulseWidth);
553 void EBI_TFTVPorchSet(
int front,
int back,
int pulseWidth);
554 void EBI_TFTTimingSet(
int dclkPeriod,
int start,
int setup,
int hold);
557 #if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
559 void EBI_BankReadTimingSet(uint32_t bank,
int setupCycles,
int strobeCycles,
int holdCycles);
560 void EBI_BankReadTimingConfig(uint32_t bank,
bool pageMode,
bool prefetch,
bool halfRE);
562 void EBI_BankWriteTimingSet(uint32_t bank,
int setupCycles,
int strobeCycles,
int holdCycles);
563 void EBI_BankWriteTimingConfig(uint32_t bank,
bool writeBufDisable,
bool halfWE);
565 void EBI_BankAddressTimingSet(uint32_t bank,
int setupCycles,
int holdCycles);
566 void EBI_BankAddressTimingConfig(uint32_t bank,
bool halfALE);
569 void EBI_BankByteLaneEnable(uint32_t bank,
bool enable);
570 void EBI_AltMapEnable(
bool enable);
579 __STATIC_INLINE
void EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)
581 EBI->TFTCTRL = (
EBI->TFTCTRL & ~(_EBI_TFTCTRL_DD_MASK)) | (uint32_t) mode;
592 __STATIC_INLINE
void EBI_TFTFrameBaseSet(uint32_t address)
594 EBI->TFTFRAMEBASE = (uint32_t) address;
606 __STATIC_INLINE
void EBI_TFTPixelSet(
int pixel, uint32_t color)
608 EFM_ASSERT(pixel == 0 || pixel == 1);
612 EBI->TFTPIXEL0 = color;
616 EBI->TFTPIXEL1 = color;
627 __STATIC_INLINE
void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
629 EBI->TFTCTRL = (
EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;
639 __STATIC_INLINE
void EBI_TFTAlphaBlendSet(uint8_t alpha)
641 EBI->TFTALPHA = alpha;
650 __STATIC_INLINE
void EBI_TFTMaskSet(uint32_t mask)
661 __STATIC_INLINE uint32_t EBI_TFTVCount(
void)
663 return((
EBI->TFTSTATUS & _EBI_TFTSTATUS_VCNT_MASK) >> _EBI_TFTSTATUS_VCNT_SHIFT);
672 __STATIC_INLINE uint32_t EBI_TFTHCount(
void)
674 return((
EBI->TFTSTATUS & _EBI_TFTSTATUS_HCNT_MASK) >> _EBI_TFTSTATUS_HCNT_SHIFT);
688 __STATIC_INLINE
void EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)
690 EBI->TFTCTRL = ((
EBI->TFTCTRL & ~_EBI_TFTCTRL_FBCTRIG_MASK)|sync);
701 __STATIC_INLINE
void EBI_TFTHStrideSet(uint32_t nbytes)
703 EFM_ASSERT(nbytes < 0x1000);
705 EBI->TFTSTRIDE = (
EBI->TFTSTRIDE & ~(_EBI_TFTSTRIDE_HSTRIDE_MASK))|
706 (nbytes<<_EBI_TFTSTRIDE_HSTRIDE_SHIFT);
717 __STATIC_INLINE
void EBI_IntClear(uint32_t flags)
731 __STATIC_INLINE
void EBI_IntSet(uint32_t flags)
745 __STATIC_INLINE
void EBI_IntDisable(uint32_t flags)
747 EBI->IEN &= ~(flags);
759 __STATIC_INLINE
void EBI_IntEnable(uint32_t flags)
776 __STATIC_INLINE uint32_t EBI_IntGet(
void)
796 __STATIC_INLINE uint32_t EBI_IntGetEnabled(
void)
801 return EBI->IF & ien;
809 __STATIC_INLINE
void EBI_StartNandEccGen(
void)
811 EBI->CMD = EBI_CMD_ECCSTART | EBI_CMD_ECCCLEAR;
822 __STATIC_INLINE uint32_t EBI_StopNandEccGen(
void )
824 EBI->CMD = EBI_CMD_ECCSTOP;
825 return EBI->ECCPARITY;
Emlib peripheral API "assert" implementation.
void EBI_WriteTimingSet(int setupCycles, int strobeCycles, int holdCycles)
Configure timing values of write bus accesses.
#define EBI_CTRL_MODE_D16A16ALE
uint32_t EBI_BankAddress(uint32_t bank)
Return base address of EBI bank.
EBI_Polarity_TypeDef csPolarity
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
void EBI_PolaritySet(EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity)
Configure EBI pin polarity.
void EBI_AddressTimingSet(int setupCycles, int holdCycles)
Configure timing values of address latch bus accesses.
void EBI_BankEnable(uint32_t banks, bool enable)
Enable or disable EBI Bank.
void EBI_ChipSelectEnable(uint32_t banks, bool enable)
Enable or disable EBI Chip Select.
void EBI_Init(const EBI_Init_TypeDef *ebiInit)
Configure and enable External Bus Interface.
#define EBI_CTRL_MODE_D8A8
void EBI_ReadTimingSet(int setupCycles, int strobeCycles, int holdCycles)
Configure timing values of read bus accesses.
#define EBI_CTRL_MODE_D8A24ALE
EBI_Polarity_TypeDef rePolarity
EBI_Polarity_TypeDef alePolarity
void EBI_Disable(void)
Disable External Bus Interface.
EBI_Polarity_TypeDef wePolarity
EBI_Polarity_TypeDef ardyPolarity