efm32g/html/efm32g__ebi_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t CTRL;

   __IOM uint32_t ADDRTIMING;

   __IOM uint32_t RDTIMING;

   __IOM uint32_t WRTIMING;

   __IOM uint32_t POLARITY;

   __IOM uint32_t ROUTE;

 } EBI_TypeDef;

 /**************************************************************************/

 /* Bit fields for EBI CTRL */

 #define _EBI_CTRL_RESETVALUE                 0x00000000UL

 #define _EBI_CTRL_MASK                       0x00030F03UL

 #define _EBI_CTRL_MODE_SHIFT                 0

 #define _EBI_CTRL_MODE_MASK                  0x3UL

 #define _EBI_CTRL_MODE_DEFAULT               0x00000000UL

 #define _EBI_CTRL_MODE_D8A8                  0x00000000UL

 #define _EBI_CTRL_MODE_D16A16ALE             0x00000001UL

 #define _EBI_CTRL_MODE_D8A24ALE              0x00000002UL

 #define EBI_CTRL_MODE_DEFAULT                (_EBI_CTRL_MODE_DEFAULT << 0)

 #define EBI_CTRL_MODE_D8A8                   (_EBI_CTRL_MODE_D8A8 << 0)

 #define EBI_CTRL_MODE_D16A16ALE              (_EBI_CTRL_MODE_D16A16ALE << 0)

 #define EBI_CTRL_MODE_D8A24ALE               (_EBI_CTRL_MODE_D8A24ALE << 0)

 #define EBI_CTRL_BANK0EN                     (0x1UL << 8)

 #define _EBI_CTRL_BANK0EN_SHIFT              8

 #define _EBI_CTRL_BANK0EN_MASK               0x100UL

 #define _EBI_CTRL_BANK0EN_DEFAULT            0x00000000UL

 #define EBI_CTRL_BANK0EN_DEFAULT             (_EBI_CTRL_BANK0EN_DEFAULT << 8)

 #define EBI_CTRL_BANK1EN                     (0x1UL << 9)

 #define _EBI_CTRL_BANK1EN_SHIFT              9

 #define _EBI_CTRL_BANK1EN_MASK               0x200UL

 #define _EBI_CTRL_BANK1EN_DEFAULT            0x00000000UL

 #define EBI_CTRL_BANK1EN_DEFAULT             (_EBI_CTRL_BANK1EN_DEFAULT << 9)

 #define EBI_CTRL_BANK2EN                     (0x1UL << 10)

 #define _EBI_CTRL_BANK2EN_SHIFT              10

 #define _EBI_CTRL_BANK2EN_MASK               0x400UL

 #define _EBI_CTRL_BANK2EN_DEFAULT            0x00000000UL

 #define EBI_CTRL_BANK2EN_DEFAULT             (_EBI_CTRL_BANK2EN_DEFAULT << 10)

 #define EBI_CTRL_BANK3EN                     (0x1UL << 11)

 #define _EBI_CTRL_BANK3EN_SHIFT              11

 #define _EBI_CTRL_BANK3EN_MASK               0x800UL

 #define _EBI_CTRL_BANK3EN_DEFAULT            0x00000000UL

 #define EBI_CTRL_BANK3EN_DEFAULT             (_EBI_CTRL_BANK3EN_DEFAULT << 11)

 #define EBI_CTRL_ARDYEN                      (0x1UL << 16)

 #define _EBI_CTRL_ARDYEN_SHIFT               16

 #define _EBI_CTRL_ARDYEN_MASK                0x10000UL

 #define _EBI_CTRL_ARDYEN_DEFAULT             0x00000000UL

 #define EBI_CTRL_ARDYEN_DEFAULT              (_EBI_CTRL_ARDYEN_DEFAULT << 16)

 #define EBI_CTRL_ARDYTODIS                   (0x1UL << 17)

 #define _EBI_CTRL_ARDYTODIS_SHIFT            17

 #define _EBI_CTRL_ARDYTODIS_MASK             0x20000UL

 #define _EBI_CTRL_ARDYTODIS_DEFAULT          0x00000000UL

 #define EBI_CTRL_ARDYTODIS_DEFAULT           (_EBI_CTRL_ARDYTODIS_DEFAULT << 17)

 /* Bit fields for EBI ADDRTIMING */

 #define _EBI_ADDRTIMING_RESETVALUE           0x00000100UL

 #define _EBI_ADDRTIMING_MASK                 0x00000303UL

 #define _EBI_ADDRTIMING_ADDRSETUP_SHIFT      0

 #define _EBI_ADDRTIMING_ADDRSETUP_MASK       0x3UL

 #define _EBI_ADDRTIMING_ADDRSETUP_DEFAULT    0x00000000UL

 #define EBI_ADDRTIMING_ADDRSETUP_DEFAULT     (_EBI_ADDRTIMING_ADDRSETUP_DEFAULT << 0)

 #define _EBI_ADDRTIMING_ADDRHOLD_SHIFT       8

 #define _EBI_ADDRTIMING_ADDRHOLD_MASK        0x300UL

 #define _EBI_ADDRTIMING_ADDRHOLD_DEFAULT     0x00000001UL

 #define EBI_ADDRTIMING_ADDRHOLD_DEFAULT      (_EBI_ADDRTIMING_ADDRHOLD_DEFAULT << 8)

 /* Bit fields for EBI RDTIMING */

 #define _EBI_RDTIMING_RESETVALUE             0x00000000UL

 #define _EBI_RDTIMING_MASK                   0x00030F03UL

 #define _EBI_RDTIMING_RDSETUP_SHIFT          0

 #define _EBI_RDTIMING_RDSETUP_MASK           0x3UL

 #define _EBI_RDTIMING_RDSETUP_DEFAULT        0x00000000UL

 #define EBI_RDTIMING_RDSETUP_DEFAULT         (_EBI_RDTIMING_RDSETUP_DEFAULT << 0)

 #define _EBI_RDTIMING_RDSTRB_SHIFT           8

 #define _EBI_RDTIMING_RDSTRB_MASK            0xF00UL

 #define _EBI_RDTIMING_RDSTRB_DEFAULT         0x00000000UL

 #define EBI_RDTIMING_RDSTRB_DEFAULT          (_EBI_RDTIMING_RDSTRB_DEFAULT << 8)

 #define _EBI_RDTIMING_RDHOLD_SHIFT           16

 #define _EBI_RDTIMING_RDHOLD_MASK            0x30000UL

 #define _EBI_RDTIMING_RDHOLD_DEFAULT         0x00000000UL

 #define EBI_RDTIMING_RDHOLD_DEFAULT          (_EBI_RDTIMING_RDHOLD_DEFAULT << 16)

 /* Bit fields for EBI WRTIMING */

 #define _EBI_WRTIMING_RESETVALUE             0x00010000UL

 #define _EBI_WRTIMING_MASK                   0x00030F03UL

 #define _EBI_WRTIMING_WRSETUP_SHIFT          0

 #define _EBI_WRTIMING_WRSETUP_MASK           0x3UL

 #define _EBI_WRTIMING_WRSETUP_DEFAULT        0x00000000UL

 #define EBI_WRTIMING_WRSETUP_DEFAULT         (_EBI_WRTIMING_WRSETUP_DEFAULT << 0)

 #define _EBI_WRTIMING_WRSTRB_SHIFT           8

 #define _EBI_WRTIMING_WRSTRB_MASK            0xF00UL

 #define _EBI_WRTIMING_WRSTRB_DEFAULT         0x00000000UL

 #define EBI_WRTIMING_WRSTRB_DEFAULT          (_EBI_WRTIMING_WRSTRB_DEFAULT << 8)

 #define _EBI_WRTIMING_WRHOLD_SHIFT           16

 #define _EBI_WRTIMING_WRHOLD_MASK            0x30000UL

 #define _EBI_WRTIMING_WRHOLD_DEFAULT         0x00000001UL

 #define EBI_WRTIMING_WRHOLD_DEFAULT          (_EBI_WRTIMING_WRHOLD_DEFAULT << 16)

 /* Bit fields for EBI POLARITY */

 #define _EBI_POLARITY_RESETVALUE             0x00000000UL

 #define _EBI_POLARITY_MASK                   0x0000001FUL

 #define EBI_POLARITY_CSPOL                   (0x1UL << 0)

 #define _EBI_POLARITY_CSPOL_SHIFT            0

 #define _EBI_POLARITY_CSPOL_MASK             0x1UL

 #define _EBI_POLARITY_CSPOL_DEFAULT          0x00000000UL

 #define _EBI_POLARITY_CSPOL_ACTIVELOW        0x00000000UL

 #define _EBI_POLARITY_CSPOL_ACTIVEHIGH       0x00000001UL

 #define EBI_POLARITY_CSPOL_DEFAULT           (_EBI_POLARITY_CSPOL_DEFAULT << 0)

 #define EBI_POLARITY_CSPOL_ACTIVELOW         (_EBI_POLARITY_CSPOL_ACTIVELOW << 0)

 #define EBI_POLARITY_CSPOL_ACTIVEHIGH        (_EBI_POLARITY_CSPOL_ACTIVEHIGH << 0)

 #define EBI_POLARITY_REPOL                   (0x1UL << 1)

 #define _EBI_POLARITY_REPOL_SHIFT            1

 #define _EBI_POLARITY_REPOL_MASK             0x2UL

 #define _EBI_POLARITY_REPOL_DEFAULT          0x00000000UL

 #define _EBI_POLARITY_REPOL_ACTIVELOW        0x00000000UL

 #define _EBI_POLARITY_REPOL_ACTIVEHIGH       0x00000001UL

 #define EBI_POLARITY_REPOL_DEFAULT           (_EBI_POLARITY_REPOL_DEFAULT << 1)

 #define EBI_POLARITY_REPOL_ACTIVELOW         (_EBI_POLARITY_REPOL_ACTIVELOW << 1)

 #define EBI_POLARITY_REPOL_ACTIVEHIGH        (_EBI_POLARITY_REPOL_ACTIVEHIGH << 1)

 #define EBI_POLARITY_WEPOL                   (0x1UL << 2)

 #define _EBI_POLARITY_WEPOL_SHIFT            2

 #define _EBI_POLARITY_WEPOL_MASK             0x4UL

 #define _EBI_POLARITY_WEPOL_DEFAULT          0x00000000UL

 #define _EBI_POLARITY_WEPOL_ACTIVELOW        0x00000000UL

 #define _EBI_POLARITY_WEPOL_ACTIVEHIGH       0x00000001UL

 #define EBI_POLARITY_WEPOL_DEFAULT           (_EBI_POLARITY_WEPOL_DEFAULT << 2)

 #define EBI_POLARITY_WEPOL_ACTIVELOW         (_EBI_POLARITY_WEPOL_ACTIVELOW << 2)

 #define EBI_POLARITY_WEPOL_ACTIVEHIGH        (_EBI_POLARITY_WEPOL_ACTIVEHIGH << 2)

 #define EBI_POLARITY_ALEPOL                  (0x1UL << 3)

 #define _EBI_POLARITY_ALEPOL_SHIFT           3

 #define _EBI_POLARITY_ALEPOL_MASK            0x8UL

 #define _EBI_POLARITY_ALEPOL_DEFAULT         0x00000000UL

 #define _EBI_POLARITY_ALEPOL_ACTIVELOW       0x00000000UL

 #define _EBI_POLARITY_ALEPOL_ACTIVEHIGH      0x00000001UL

 #define EBI_POLARITY_ALEPOL_DEFAULT          (_EBI_POLARITY_ALEPOL_DEFAULT << 3)

 #define EBI_POLARITY_ALEPOL_ACTIVELOW        (_EBI_POLARITY_ALEPOL_ACTIVELOW << 3)

 #define EBI_POLARITY_ALEPOL_ACTIVEHIGH       (_EBI_POLARITY_ALEPOL_ACTIVEHIGH << 3)

 #define EBI_POLARITY_ARDYPOL                 (0x1UL << 4)

 #define _EBI_POLARITY_ARDYPOL_SHIFT          4

 #define _EBI_POLARITY_ARDYPOL_MASK           0x10UL

 #define _EBI_POLARITY_ARDYPOL_DEFAULT        0x00000000UL

 #define _EBI_POLARITY_ARDYPOL_ACTIVELOW      0x00000000UL

 #define _EBI_POLARITY_ARDYPOL_ACTIVEHIGH     0x00000001UL

 #define EBI_POLARITY_ARDYPOL_DEFAULT         (_EBI_POLARITY_ARDYPOL_DEFAULT << 4)

 #define EBI_POLARITY_ARDYPOL_ACTIVELOW       (_EBI_POLARITY_ARDYPOL_ACTIVELOW << 4)

 #define EBI_POLARITY_ARDYPOL_ACTIVEHIGH      (_EBI_POLARITY_ARDYPOL_ACTIVEHIGH << 4)

 /* Bit fields for EBI ROUTE */

 #define _EBI_ROUTE_RESETVALUE                0x00000000UL

 #define _EBI_ROUTE_MASK                      0x0000007FUL

 #define EBI_ROUTE_EBIPEN                     (0x1UL << 0)

 #define _EBI_ROUTE_EBIPEN_SHIFT              0

 #define _EBI_ROUTE_EBIPEN_MASK               0x1UL

 #define _EBI_ROUTE_EBIPEN_DEFAULT            0x00000000UL

 #define EBI_ROUTE_EBIPEN_DEFAULT             (_EBI_ROUTE_EBIPEN_DEFAULT << 0)

 #define EBI_ROUTE_CS0PEN                     (0x1UL << 1)

 #define _EBI_ROUTE_CS0PEN_SHIFT              1

 #define _EBI_ROUTE_CS0PEN_MASK               0x2UL

 #define _EBI_ROUTE_CS0PEN_DEFAULT            0x00000000UL

 #define EBI_ROUTE_CS0PEN_DEFAULT             (_EBI_ROUTE_CS0PEN_DEFAULT << 1)

 #define EBI_ROUTE_CS1PEN                     (0x1UL << 2)

 #define _EBI_ROUTE_CS1PEN_SHIFT              2

 #define _EBI_ROUTE_CS1PEN_MASK               0x4UL

 #define _EBI_ROUTE_CS1PEN_DEFAULT            0x00000000UL

 #define EBI_ROUTE_CS1PEN_DEFAULT             (_EBI_ROUTE_CS1PEN_DEFAULT << 2)

 #define EBI_ROUTE_CS2PEN                     (0x1UL << 3)

 #define _EBI_ROUTE_CS2PEN_SHIFT              3

 #define _EBI_ROUTE_CS2PEN_MASK               0x8UL

 #define _EBI_ROUTE_CS2PEN_DEFAULT            0x00000000UL

 #define EBI_ROUTE_CS2PEN_DEFAULT             (_EBI_ROUTE_CS2PEN_DEFAULT << 3)

 #define EBI_ROUTE_CS3PEN                     (0x1UL << 4)

 #define _EBI_ROUTE_CS3PEN_SHIFT              4

 #define _EBI_ROUTE_CS3PEN_MASK               0x10UL

 #define _EBI_ROUTE_CS3PEN_DEFAULT            0x00000000UL

 #define EBI_ROUTE_CS3PEN_DEFAULT             (_EBI_ROUTE_CS3PEN_DEFAULT << 4)

 #define EBI_ROUTE_ALEPEN                     (0x1UL << 5)

 #define _EBI_ROUTE_ALEPEN_SHIFT              5

 #define _EBI_ROUTE_ALEPEN_MASK               0x20UL

 #define _EBI_ROUTE_ALEPEN_DEFAULT            0x00000000UL

 #define EBI_ROUTE_ALEPEN_DEFAULT             (_EBI_ROUTE_ALEPEN_DEFAULT << 5)

 #define EBI_ROUTE_ARDYPEN                    (0x1UL << 6)

 #define _EBI_ROUTE_ARDYPEN_SHIFT             6

 #define _EBI_ROUTE_ARDYPEN_MASK              0x40UL

 #define _EBI_ROUTE_ARDYPEN_DEFAULT           0x00000000UL

 #define EBI_ROUTE_ARDYPEN_DEFAULT            (_EBI_ROUTE_ARDYPEN_DEFAULT << 6)

EBI_TypeDef::POLARITY
__IOM uint32_t POLARITY
Definition: efm32g_ebi.h:47

EBI_TypeDef::WRTIMING
__IOM uint32_t WRTIMING
Definition: efm32g_ebi.h:46

EBI_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efm32g_ebi.h:43

EBI_TypeDef
Definition: efm32g_ebi.h:41

EBI_TypeDef::RDTIMING
__IOM uint32_t RDTIMING
Definition: efm32g_ebi.h:45

EBI_TypeDef::ROUTE
__IOM uint32_t ROUTE
Definition: efm32g_ebi.h:48

EBI_TypeDef::ADDRTIMING
__IOM uint32_t ADDRTIMING
Definition: efm32g_ebi.h:44