37 #if defined(MSC_COUNT) && (MSC_COUNT > 0)
110 #define MSC_PROGRAM_TIMEOUT 10000000ul
124 #if defined(DOXY_DOC_ONLY)
125 #define EM_MSC_RUN_FROM_FLASH
143 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
147 mscBusStrategyCPU = MSC_READCTRL_BUSSTRATEGY_CPU,
148 mscBusStrategyDMA = MSC_READCTRL_BUSSTRATEGY_DMA,
149 mscBusStrategyDMAEM1 = MSC_READCTRL_BUSSTRATEGY_DMAEM1,
150 mscBusStrategyNone = MSC_READCTRL_BUSSTRATEGY_NONE
151 } MSC_BusStrategy_Typedef;
166 #define MSC_EXECCONFIG_DEFAULT \
178 #define mscBusStrategy_Typedef MSC_BusStrategy_Typedef
179 #define msc_Return_TypeDef MSC_Status_TypeDef
206 MSC->IEN &= ~(flags);
265 return MSC->IF & ien;
283 #if defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF )
291 __STATIC_INLINE
void MSC_StartCacheMeasurement(
void)
294 MSC->IFC = MSC_IF_CHOF | MSC_IF_CMOF;
297 #if defined( _MSC_CACHECMD_MASK )
298 MSC->CACHECMD = MSC_CACHECMD_STARTPC;
300 MSC->CMD = MSC_CMD_STARTPC;
352 __STATIC_INLINE int32_t MSC_GetCacheMeasurement(
void)
357 #if defined( _MSC_CACHECMD_MASK )
358 MSC->CACHECMD = MSC_CACHECMD_STOPPC;
360 MSC->CMD = MSC_CMD_STOPPC;
364 if (
MSC->IF & (MSC_IF_CHOF | MSC_IF_CMOF))
369 hits =
MSC->CACHEHITS;
370 total =
MSC->CACHEMISSES + hits;
378 return (hits * 100) / total;
386 __STATIC_INLINE
void MSC_FlushCache(
void)
388 #if defined( _MSC_CACHECMD_MASK )
389 MSC->CACHECMD = MSC_CACHECMD_INVCACHE;
391 MSC->CMD = MSC_CMD_INVCACHE;
402 __STATIC_INLINE
void MSC_EnableCache(
bool enable)
408 #if defined( MSC_READCTRL_ICCDIS )
415 __STATIC_INLINE
void MSC_EnableCacheIRQs(
bool enable)
428 __STATIC_INLINE
void MSC_EnableAutoCacheFlush(
bool enable)
435 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
442 __STATIC_INLINE
void MSC_BusStrategy(mscBusStrategy_Typedef mode)
444 MSC->READCTRL = (
MSC->READCTRL & ~(_MSC_READCTRL_BUSSTRATEGY_MASK)) | mode;
457 #if defined(EM_MSC_RUN_FROM_FLASH)
459 #define MSC_RAMFUNC_DECLARATOR
461 #define MSC_RAMFUNC_DEFINITION_BEGIN
463 #define MSC_RAMFUNC_DEFINITION_END
465 #define MSC_RAMFUNC_DECLARATOR SL_RAMFUNC_DECLARATOR
466 #define MSC_RAMFUNC_DEFINITION_BEGIN SL_RAMFUNC_DEFINITION_BEGIN
467 #define MSC_RAMFUNC_DEFINITION_END SL_RAMFUNC_DEFINITION_END
475 #if !defined( _EFM32_GECKO_FAMILY )
477 MSC_WriteWordFast(uint32_t *address,
486 #if defined( _MSC_MASSLOCK_MASK )
__STATIC_INLINE uint32_t MSC_IntGetEnabled(void)
Get enabled and pending MSC interrupt flags. Useful for handling more interrupt sources in the same i...
RAM and peripheral bit-field set and clear API.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
void MSC_Init(void)
Enables the flash controller for writing.
void MSC_Deinit(void)
Disables the flash controller for writing.
__STATIC_INLINE void MSC_IntSet(uint32_t flags)
Set one or more pending MSC interrupts from SW.
void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig)
Set MSC code execution configuration.
#define MSC_RAMFUNC_DECLARATOR
Expands to SL_RAMFUNC_DECLARATOR if EM_MSC_RUN_FROM_FLASH is undefined and to nothing if EM_MSC_RUN_F...
__STATIC_INLINE void MSC_IntEnable(uint32_t flags)
Enable one or more MSC interrupts.
MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef MSC_WriteWord(uint32_t *address, void const *data, uint32_t numBytes)
Writes data to flash memory. This function is interrupt safe, but slower than MSC_WriteWordFast(), which writes to flash with interrupts disabled. Write data must be aligned to words and contain a number of bytes that is divisable by four.
__STATIC_INLINE uint32_t MSC_IntGet(void)
Get pending MSC interrupt flags.
__STATIC_INLINE void MSC_IntClear(uint32_t flags)
Clear one or more pending MSC interrupts.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
__STATIC_INLINE void MSC_IntDisable(uint32_t flags)
Disable one or more MSC interrupts.
MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef MSC_ErasePage(uint32_t *startAddress)
Erases a page in flash memory.