EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
Data Structures | Macros | Enumerations | Functions
LDMA
EMLIB

Detailed Description

Linked Direct Memory Access (LDMA) Peripheral API.

The LDMA API functions provide full support for the LDMA peripheral.

The LDMA supports these DMA transfer types:

The LDMA supports linked lists of DMA descriptors allowing:

The LDMA has some advanced features:

A basic understanding of the LDMA controller is assumed. Please refer to the reference manual for further details. The LDMA examples described in the reference manual are particularly helpful in understanding LDMA operations.

In order to use the DMA controller, the initialization function LDMA_Init() must have been executed once (normally during system init).

DMA transfers are initiated by a call to LDMA_StartTransfer(), the transfer properties are controlled by the contents of LDMA_TransferCfg_t and LDMA_Descriptor_t structure parameters. The LDMA_Descriptor_t structure parameter may be a pointer to an array of descriptors, the descriptors in the array should be linked together as needed.

Transfer and descriptor initialization macros are provided for the most common transfer types. Due to the flexibility of the LDMA peripheral only a small subset of all possible initializer macros are provided, the user should create new one's when needed.

Examples of LDMA usage:

A simple memory to memory transfer:

/* A single transfer of 4 half words. */
static const LDMA_TransferCfg_t transferCfg = LDMA_TRANSFER_CFG_MEMORY();
static const LDMA_Descriptor_t desc = LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dst, 4);
void ldmaTransfer(void)
{
/* Initialize the LDMA with default values. */
LDMA_Init_t init = LDMA_INIT_DEFAULT;
LDMA_Init(&init);
/* Start the memory transfer */
LDMA_StartTransfer(0, &transferCfg, &desc);
}


A linked list of three memory to memory transfers:

/* A transfer consisting of 3 descriptors linked together and each descriptor
* transfers 4 words from the source to the destination. */
static const LDMA_TransferCfg_t transferCfg1 = LDMA_TRANSFER_CFG_MEMORY();
static const LDMA_Descriptor_t descList[] =
{
LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dst, 4, 1),
LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src + 4, dst + 4, 4, 1),
LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src + 8, dst + 8, 4)
};
void ldmaLinkedTransfer(void)
{
/* Initialize the LDMA with default values. */
LDMA_Init_t init = LDMA_INIT_DEFAULT;
LDMA_Init(&init);
/* Start the linked memory transfer */
LDMA_StartTransfer(0, &transferCfg1, &descList[0]);
}


DMA from serial port peripheral to memory:

/* The LDMA transfer should be triggered by the USART1 RX data available signal. */
static const LDMA_TransferCfg_t usart1RxTransfer =
LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_USART1_RXDATAV);
/* Transfer 4 bytes from the USART1 RX FIFO to memory. */
static const LDMA_Descriptor_t usart1RxDesc =
LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(&USART1->RXDATA, // Peripheral address
dst, // Destination (SRAM)
4); // Number of byte transfers
void ldmaPeripheralTransfer(void)
{
/* Initialize the LDMA with default values. */
LDMA_Init_t init = LDMA_INIT_DEFAULT;
LDMA_Init(&init);
/* Start the peripheral transfer which is triggered by the USART1
* peripheral RXDATAV signal. */
LDMA_StartTransfer(0, &usart1RxTransfer, &usart1RxDesc);
}


Ping pong DMA from serial port peripheral to memory:

/* Two buffers used in the ping-pong transfer from USART1. */
static volatile uint8_t buffer0[5];
static volatile uint8_t buffer1[5];
/* The LDMA transfer should be triggered by the USART1 RX data available signal. */
static const LDMA_TransferCfg_t usart1Transfer =
LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_USART1_RXDATAV);
/* Both descriptors transfer 5 bytes from the USART1 rx data register into
* one of the buffers. Note that the first descriptor uses a relative address
* of 1 to link to the next descriptor, while the last descriptor uses a
* relative address of -1 to link to the first descriptor. */
static const LDMA_Descriptor_t rxLoop[] =
{
LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&USART1->RXDATA, buffer0, 5, 1),
LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&USART1->RXDATA, buffer1, 5, -1)
};
void ldmaPingPongTransfer(void)
{
/* Initialize the LDMA with default values. */
LDMA_Init_t init = LDMA_INIT_DEFAULT;
LDMA_Init(&init);
/* Start the peripheral transfer which is triggered by the USART1
* peripheral RXDATAV signal. */
LDMA_StartTransfer(0, &usart1Transfer, &rxLoop[0]);
}
Note
The LDMA module does not implement the LDMA interrupt handler. A template for an LDMA IRQ handler is include here as an example.
/* Template for an LDMA IRQ handler. */
void LDMA_IRQHandler(void)
{
uint32_t ch;
/* Get all pending and enabled interrupts. */
uint32_t pending = LDMA_IntGetEnabled();
/* Loop here on an LDMA error to enable debugging. */
while (pending & LDMA_IF_ERROR)
{
}
/* Iterate over all LDMA channels. */
for (ch = 0; ch < DMA_CHAN_COUNT; ch++)
{
uint32_t mask = 0x1 << ch;
if (pending & mask)
{
/* Clear interrupt flag. */
LDMA->IFC = mask;
/* Do more stuff here, execute callbacks etc. */
}
}
}

Data Structures

union  LDMA_Descriptor_t
 DMA descriptor. More...
 
struct  LDMA_Init_t
 LDMA initialization configuration structure. More...
 
struct  LDMA_TransferCfg_t
 DMA transfer configuration structure. More...
 

Macros

#define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE(src, dest, count)
 DMA descriptor initializer for linked memory to memory byte transfer. More...
 
#define LDMA_DESCRIPTOR_LINKABS_M2M_HALF(src, dest, count)
 DMA descriptor initializer for linked memory to memory half-word transfer. More...
 
#define LDMA_DESCRIPTOR_LINKABS_M2M_WORD(src, dest, count)
 DMA descriptor initializer for linked memory to memory word transfer. More...
 
#define LDMA_DESCRIPTOR_LINKABS_SYNC(set, clr, matchValue, matchEnable)
 DMA descriptor initializer for SYNC transfer. More...
 
#define LDMA_DESCRIPTOR_LINKABS_WRITE(value, address)
 DMA descriptor initializer for Immediate WRITE transfer. More...
 
#define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE(src, dest, count, linkjmp)
 DMA descriptor initializer for linked memory to memory byte transfer. More...
 
#define LDMA_DESCRIPTOR_LINKREL_M2M_HALF(src, dest, count, linkjmp)
 DMA descriptor initializer for linked memory to memory half-word transfer. More...
 
#define LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dest, count, linkjmp)
 DMA descriptor initializer for linked memory to memory word transfer. More...
 
#define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE(src, dest, count, linkjmp)
 DMA descriptor initializer for byte transfers from memory to a peripheral. More...
 
#define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(src, dest, count, linkjmp)
 DMA descriptor initializer for byte transfers from a peripheral to memory. More...
 
#define LDMA_DESCRIPTOR_LINKREL_SYNC(set, clr, matchValue, matchEnable, linkjmp)
 DMA descriptor initializer for SYNC transfer. More...
 
#define LDMA_DESCRIPTOR_LINKREL_WRITE(value, address, linkjmp)
 DMA descriptor initializer for Immediate WRITE transfer. More...
 
#define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE(src, dest, count)
 DMA descriptor initializer for single memory to memory byte transfer. More...
 
#define LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dest, count)
 DMA descriptor initializer for single memory to memory half-word transfer. More...
 
#define LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src, dest, count)
 DMA descriptor initializer for single memory to memory word transfer. More...
 
#define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(src, dest, count)
 DMA descriptor initializer for byte transfers from memory to a peripheral. More...
 
#define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(src, dest, count)
 DMA descriptor initializer for byte transfers from a peripheral to memory. More...
 
#define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(src, dest, count)
 DMA descriptor initializer for byte transfers from a peripheral to a peripheral. More...
 
#define LDMA_DESCRIPTOR_SINGLE_SYNC(set, clr, matchValue, matchEnable)
 DMA descriptor initializer for SYNC transfer. More...
 
#define LDMA_DESCRIPTOR_SINGLE_WRITE(value, address)
 DMA descriptor initializer for Immediate WRITE transfer. More...
 
#define LDMA_INIT_DEFAULT
 Default DMA initialization structure. More...
 
#define LDMA_TRANSFER_CFG_MEMORY()
 Generic DMA transfer configuration for memory to memory transfers. More...
 
#define LDMA_TRANSFER_CFG_MEMORY_LOOP(loopCnt)
 Generic DMA transfer configuration for looped memory to memory transfers. More...
 
#define LDMA_TRANSFER_CFG_PERIPHERAL(signal)
 Generic DMA transfer configuration for memory to/from peripheral transfers. More...
 
#define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP(signal, loopCnt)
 Generic DMA transfer configuration for looped memory to/from peripheral transfers. More...
 

Enumerations

enum  LDMA_CfgArbSlots_t {
  ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE,
  ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO,
  ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR,
  ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT
}
 
enum  LDMA_CfgDstIncSign_t {
  ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE,
  ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE
}
 
enum  LDMA_CfgSrcIncSign_t {
  ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE,
  ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE
}
 
enum  LDMA_CtrlBlockSize_t {
  ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1,
  ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2,
  ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3,
  ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4,
  ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6,
  ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8,
  ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16,
  ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32,
  ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64,
  ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128,
  ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256,
  ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512,
  ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024,
  ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL
}
 
enum  LDMA_CtrlDstAddrMode_t {
  ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE,
  ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE
}
 
enum  LDMA_CtrlDstInc_t {
  ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE,
  ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO,
  ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR,
  ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE
}
 
enum  LDMA_CtrlReqMode_t {
  ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK,
  ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL
}
 
enum  LDMA_CtrlSize_t {
  ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE,
  ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD,
  ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD
}
 
enum  LDMA_CtrlSrcAddrMode_t {
  ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE,
  ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE
}
 
enum  LDMA_CtrlSrcInc_t {
  ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE,
  ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO,
  ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR,
  ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE
}
 
enum  LDMA_CtrlStructType_t {
  ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER,
  ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE,
  ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE
}
 
enum  LDMA_LinkMode_t {
  ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE,
  ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE
}
 
enum  LDMA_PeripheralSignal_t {
  ldmaPeripheralSignal_NONE = LDMA_CH_REQSEL_SOURCESEL_NONE,
  ldmaPeripheralSignal_ADC0_SCAN = LDMA_CH_REQSEL_SIGSEL_ADC0SCAN | LDMA_CH_REQSEL_SOURCESEL_ADC0,
  ldmaPeripheralSignal_ADC0_SINGLE = LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE | LDMA_CH_REQSEL_SOURCESEL_ADC0,
  ldmaPeripheralSignal_CRYPTO_DATA0RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
  ldmaPeripheralSignal_CRYPTO_DATA0WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
  ldmaPeripheralSignal_CRYPTO_DATA0XWR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
  ldmaPeripheralSignal_CRYPTO_DATA1RD = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
  ldmaPeripheralSignal_CRYPTO_DATA1WR = LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR | LDMA_CH_REQSEL_SOURCESEL_CRYPTO,
  ldmaPeripheralSignal_I2C0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_I2C0,
  ldmaPeripheralSignal_I2C0_TXBL = LDMA_CH_REQSEL_SIGSEL_I2C0TXBL | LDMA_CH_REQSEL_SOURCESEL_I2C0,
  ldmaPeripheralSignal_LEUART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_LEUART0,
  ldmaPeripheralSignal_LEUART0_TXBL = LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL | LDMA_CH_REQSEL_SOURCESEL_LEUART0,
  ldmaPeripheralSignal_LEUART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_LEUART0,
  ldmaPeripheralSignal_MSC_WDATA = LDMA_CH_REQSEL_SIGSEL_MSCWDATA | LDMA_CH_REQSEL_SOURCESEL_MSC,
  ldmaPeripheralSignal_PRS_REQ0 = LDMA_CH_REQSEL_SIGSEL_PRSREQ0 | LDMA_CH_REQSEL_SOURCESEL_PRS,
  ldmaPeripheralSignal_PRS_REQ1 = LDMA_CH_REQSEL_SIGSEL_PRSREQ1 | LDMA_CH_REQSEL_SOURCESEL_PRS,
  ldmaPeripheralSignal_TIMER0_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
  ldmaPeripheralSignal_TIMER0_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
  ldmaPeripheralSignal_TIMER0_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
  ldmaPeripheralSignal_TIMER0_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER0,
  ldmaPeripheralSignal_TIMER1_CC0 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
  ldmaPeripheralSignal_TIMER1_CC1 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
  ldmaPeripheralSignal_TIMER1_CC2 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
  ldmaPeripheralSignal_TIMER1_CC3 = LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
  ldmaPeripheralSignal_TIMER1_UFOF = LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMA_CH_REQSEL_SOURCESEL_TIMER1,
  ldmaPeripheralSignal_USART0_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART0,
  ldmaPeripheralSignal_USART0_TXBL = LDMA_CH_REQSEL_SIGSEL_USART0TXBL | LDMA_CH_REQSEL_SOURCESEL_USART0,
  ldmaPeripheralSignal_USART0_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART0,
  ldmaPeripheralSignal_USART1_RXDATAV = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV | LDMA_CH_REQSEL_SOURCESEL_USART1,
  ldmaPeripheralSignal_USART1_RXDATAVRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1,
  ldmaPeripheralSignal_USART1_TXBL = LDMA_CH_REQSEL_SIGSEL_USART1TXBL | LDMA_CH_REQSEL_SOURCESEL_USART1,
  ldmaPeripheralSignal_USART1_TXBLRIGHT = LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT | LDMA_CH_REQSEL_SOURCESEL_USART1,
  ldmaPeripheralSignal_USART1_TXEMPTY = LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY | LDMA_CH_REQSEL_SOURCESEL_USART1
}
 

Functions

void LDMA_DeInit (void)
 De-initialize the LDMA controller. More...
 
void LDMA_EnableChannelRequest (int ch, bool enable)
 Enable or disable a LDMA channel request. More...
 
void LDMA_Init (const LDMA_Init_t *init)
 Initialize the LDMA controller. More...
 
__STATIC_INLINE void LDMA_IntClear (uint32_t flags)
 Clear one or more pending LDMA interrupts. More...
 
__STATIC_INLINE void LDMA_IntDisable (uint32_t flags)
 Disable one or more LDMA interrupts. More...
 
__STATIC_INLINE void LDMA_IntEnable (uint32_t flags)
 Enable one or more LDMA interrupts. More...
 
__STATIC_INLINE uint32_t LDMA_IntGet (void)
 Get pending LDMA interrupt flags. More...
 
__STATIC_INLINE uint32_t LDMA_IntGetEnabled (void)
 Get enabled and pending LDMA interrupt flags. Useful for handling more interrupt sources in the same interrupt handler. More...
 
__STATIC_INLINE void LDMA_IntSet (uint32_t flags)
 Set one or more pending LDMA interrupts. More...
 
void LDMA_StartTransfer (int ch, const LDMA_TransferCfg_t *transfer, const LDMA_Descriptor_t *descriptor)
 Start a DMA transfer. More...
 
void LDMA_StopTransfer (int ch)
 Stop a DMA transfer. More...
 
bool LDMA_TransferDone (int ch)
 Check if a DMA transfer has completed. More...
 
uint32_t LDMA_TransferRemainingCount (int ch)
 Get number of items remaining in a transfer. More...
 

Macro Definition Documentation

#define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}
ldmaLinkModeAbs
Definition: em_ldma.h:211
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for linked memory to memory byte transfer.

The link address must be an absolute address.

Note
The linkAddr member of the transfer descriptor is not initialized.
Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of bytes to transfer.

Definition at line 826 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKABS_M2M_HALF (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeHalf, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}
ldmaLinkModeAbs
Definition: em_ldma.h:211
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSizeHalf
Definition: em_ldma.h:181
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for linked memory to memory half-word transfer.

The link address must be an absolute address.

Note
The linkAddr member of the transfer descriptor is not initialized.
Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of half-words to transfer.

Definition at line 788 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKABS_M2M_WORD (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}
ldmaLinkModeAbs
Definition: em_ldma.h:211
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSizeWord
Definition: em_ldma.h:182
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for linked memory to memory word transfer.

The link address must be an absolute address.

Note
The linkAddr member of the transfer descriptor is not initialized.
Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of words to transfer.

Definition at line 750 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKABS_SYNC (   set,
  clr,
  matchValue,
  matchEnable 
)
Value:
{ \
.sync = \
{ \
.structType = ldmaCtrlStructTypeSync, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.syncSet = (set), \
.syncClr = (clr), \
.matchVal = (matchValue), \
.matchEn = (matchEnable), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}
ldmaLinkModeAbs
Definition: em_ldma.h:211
ldmaCtrlStructTypeSync
Definition: em_ldma.h:157

DMA descriptor initializer for SYNC transfer.

The link address must be an absolute address.

Note
The linkAddr member of the transfer descriptor is not initialized.
Parameters
[in]setSync pattern bits to set.
[in]clrSync pattern bits to clear.
[in]matchValueSync pattern to match.
[in]matchEnableSync pattern bits to enable for match.

Definition at line 1314 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKABS_WRITE (   value,
  address 
)
Value:
{ \
.wri = \
{ \
.structType = ldmaCtrlStructTypeWrite, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.immVal = (value), \
.dstAddr = (uint32_t)(address), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}
ldmaLinkModeAbs
Definition: em_ldma.h:211
ldmaCtrlStructTypeWrite
Definition: em_ldma.h:158

DMA descriptor initializer for Immediate WRITE transfer.

The link address must be an absolute address.

Note
The linkAddr member of the transfer descriptor is not initialized.
Parameters
[in]valueImmediate value to write.
[in]addressWrite sddress.

Definition at line 1202 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE (   src,
  dest,
  count,
  linkjmp 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaLinkModeRel
Definition: em_ldma.h:212
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for linked memory to memory byte transfer.

The link address is a relative address.

Note
The linkAddr member of the transfer descriptor is initialized to 4, assuming that the next descriptor immediately follows this descriptor (in memory).
Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of bytes to transfer.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 958 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_M2M_HALF (   src,
  dest,
  count,
  linkjmp 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeHalf, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSizeHalf
Definition: em_ldma.h:181
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaLinkModeRel
Definition: em_ldma.h:212
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for linked memory to memory half-word transfer.

The link address is a relative address.

Note
The linkAddr member of the transfer descriptor is initialized to 4, assuming that the next descriptor immediately follows this descriptor (in memory).
Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of half-words to transfer.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 914 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_M2M_WORD (   src,
  dest,
  count,
  linkjmp 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSizeWord
Definition: em_ldma.h:182
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaLinkModeRel
Definition: em_ldma.h:212
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for linked memory to memory word transfer.

The link address is a relative address.

Note
The linkAddr member of the transfer descriptor is initialized to 4, assuming that the next descriptor immediately follows this descriptor (in memory).
Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of words to transfer.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 870 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE (   src,
  dest,
  count,
  linkjmp 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncNone, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlReqModeBlock
Definition: em_ldma.h:164
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlDstIncNone
Definition: em_ldma.h:191
ldmaLinkModeRel
Definition: em_ldma.h:212

DMA descriptor initializer for byte transfers from memory to a peripheral.

Parameters
[in]srcSource data address.
[in]destPeripheral data register destination address.
[in]countNumber of bytes to transfer.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 1133 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE (   src,
  dest,
  count,
  linkjmp 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlReqModeBlock
Definition: em_ldma.h:164
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncNone
Definition: em_ldma.h:174
ldmaLinkModeRel
Definition: em_ldma.h:212
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for byte transfers from a peripheral to memory.

Parameters
[in]srcPeripheral data source register address.
[in]destDestination data address.
[in]countNumber of bytes to transfer.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 1095 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_SYNC (   set,
  clr,
  matchValue,
  matchEnable,
  linkjmp 
)
Value:
{ \
.sync = \
{ \
.structType = ldmaCtrlStructTypeSync, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.syncSet = (set), \
.syncClr = (clr), \
.matchVal = (matchValue), \
.matchEn = (matchEnable), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlStructTypeSync
Definition: em_ldma.h:157
ldmaLinkModeRel
Definition: em_ldma.h:212

DMA descriptor initializer for SYNC transfer.

Parameters
[in]setSync pattern bits to set.
[in]clrSync pattern bits to clear.
[in]matchValueSync pattern to match.
[in]matchEnableSync pattern bits to enable for match.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 1355 of file em_ldma.h.

#define LDMA_DESCRIPTOR_LINKREL_WRITE (   value,
  address,
  linkjmp 
)
Value:
{ \
.wri = \
{ \
.structType = ldmaCtrlStructTypeWrite, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.immVal = (value), \
.dstAddr = (uint32_t)(address), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * 4 \
} \
}
ldmaCtrlStructTypeWrite
Definition: em_ldma.h:158
ldmaLinkModeRel
Definition: em_ldma.h:212

DMA descriptor initializer for Immediate WRITE transfer.

Parameters
[in]valueImmediate value to write.
[in]addressWrite sddress.
[in]linkjmpAddress of descriptor to link to expressed as a signed number of descriptors from "here". 1=one descriptor forward in memory, 0=one this descriptor, -1=one descriptor back in memory.

Definition at line 1239 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for single memory to memory byte transfer.

Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of bytes to transfer.

Definition at line 712 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_M2M_HALF (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = ( count ) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeHalf, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSizeHalf
Definition: em_ldma.h:181
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for single memory to memory half-word transfer.

Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of half-words to transfer.

Definition at line 679 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_M2M_WORD (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = ( count ) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSizeWord
Definition: em_ldma.h:182
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlReqModeAll
Definition: em_ldma.h:165
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for single memory to memory word transfer.

Parameters
[in]srcSource data address.
[in]destDestination data address.
[in]countNumber of words to transfer.

Definition at line 646 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncNone, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlReqModeBlock
Definition: em_ldma.h:164
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncOne
Definition: em_ldma.h:171
ldmaCtrlDstIncNone
Definition: em_ldma.h:191

DMA descriptor initializer for byte transfers from memory to a peripheral.

Parameters
[in]srcSource data address.
[in]destPeripheral data register destination address.
[in]countNumber of bytes to transfer.

Definition at line 1057 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlReqModeBlock
Definition: em_ldma.h:164
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncNone
Definition: em_ldma.h:174
ldmaCtrlDstIncOne
Definition: em_ldma.h:188

DMA descriptor initializer for byte transfers from a peripheral to memory.

Parameters
[in]srcPeripheral data source register address.
[in]destDestination data address.
[in]countNumber of bytes to transfer.

Definition at line 991 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE (   src,
  dest,
  count 
)
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncNone, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlBlockSizeUnit1
Definition: em_ldma.h:137
ldmaCtrlSizeByte
Definition: em_ldma.h:180
ldmaCtrlSrcAddrModeAbs
Definition: em_ldma.h:197
ldmaCtrlDstAddrModeAbs
Definition: em_ldma.h:204
ldmaCtrlReqModeBlock
Definition: em_ldma.h:164
ldmaCtrlStructTypeXfer
Definition: em_ldma.h:156
ldmaCtrlSrcIncNone
Definition: em_ldma.h:174
ldmaCtrlDstIncNone
Definition: em_ldma.h:191

DMA descriptor initializer for byte transfers from a peripheral to a peripheral.

Parameters
[in]srcPeripheral data source register address.
[in]destPeripheral data destination register address.
[in]countNumber of bytes to transfer.

Definition at line 1024 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_SYNC (   set,
  clr,
  matchValue,
  matchEnable 
)
Value:
{ \
.sync = \
{ \
.structType = ldmaCtrlStructTypeSync, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 1, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.syncSet = (set), \
.syncClr = (clr), \
.matchVal = (matchValue), \
.matchEn = (matchEnable), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlStructTypeSync
Definition: em_ldma.h:157

DMA descriptor initializer for SYNC transfer.

Parameters
[in]setSync pattern bits to set.
[in]clrSync pattern bits to clear.
[in]matchValueSync pattern to match.
[in]matchEnableSync pattern bits to enable for match.

Definition at line 1273 of file em_ldma.h.

#define LDMA_DESCRIPTOR_SINGLE_WRITE (   value,
  address 
)
Value:
{ \
.wri = \
{ \
.structType = ldmaCtrlStructTypeWrite, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 1, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.immVal = (value), \
.dstAddr = (uint32_t)(address), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}
ldmaCtrlStructTypeWrite
Definition: em_ldma.h:158

DMA descriptor initializer for Immediate WRITE transfer.

Parameters
[in]valueImmediate value to write.
[in]addressWrite sddress.

Definition at line 1165 of file em_ldma.h.

#define LDMA_INIT_DEFAULT
Value:
{ \
.ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT, /* Fixed priority arbitration. */ \
.ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
.ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
.ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
}
_LDMA_CTRL_NUMFIXED_DEFAULT
#define _LDMA_CTRL_NUMFIXED_DEFAULT
Definition: efr32mg1p_ldma.h:84

Default DMA initialization structure.

Definition at line 586 of file em_ldma.h.

Referenced by DMADRV_Init().

#define LDMA_TRANSFER_CFG_MEMORY ( )
Value:
{ \
0, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
}
ldmaCfgArbSlotsAs1
Definition: em_ldma.h:218
ldmaCfgDstIncSignPos
Definition: em_ldma.h:234
ldmaCfgSrcIncSignPos
Definition: em_ldma.h:227

Generic DMA transfer configuration for memory to memory transfers.

Definition at line 598 of file em_ldma.h.

#define LDMA_TRANSFER_CFG_MEMORY_LOOP (   loopCnt)
Value:
{ \
0, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
loopCnt \
}
ldmaCfgArbSlotsAs1
Definition: em_ldma.h:218
ldmaCfgDstIncSignPos
Definition: em_ldma.h:234
ldmaCfgSrcIncSignPos
Definition: em_ldma.h:227

Generic DMA transfer configuration for looped memory to memory transfers.

Definition at line 609 of file em_ldma.h.

#define LDMA_TRANSFER_CFG_PERIPHERAL (   signal)
Value:
{ \
signal, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
}
ldmaCfgArbSlotsAs1
Definition: em_ldma.h:218
ldmaCfgDstIncSignPos
Definition: em_ldma.h:234
ldmaCfgSrcIncSignPos
Definition: em_ldma.h:227

Generic DMA transfer configuration for memory to/from peripheral transfers.

Definition at line 621 of file em_ldma.h.

#define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP (   signal,
  loopCnt 
)
Value:
{ \
signal, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
}
ldmaCfgArbSlotsAs1
Definition: em_ldma.h:218
ldmaCfgDstIncSignPos
Definition: em_ldma.h:234
ldmaCfgSrcIncSignPos
Definition: em_ldma.h:227

Generic DMA transfer configuration for looped memory to/from peripheral transfers.

Definition at line 632 of file em_ldma.h.

Enumeration Type Documentation

enum LDMA_CfgArbSlots_t

Insert extra arbitration slots to increase channel arbitration priority.

Enumerator
ldmaCfgArbSlotsAs1 

One arbitration slot selected.

ldmaCfgArbSlotsAs2 

Two arbitration slots selected.

ldmaCfgArbSlotsAs4 

Four arbitration slots selected.

ldmaCfgArbSlotsAs8 

Eight arbitration slots selected.

Definition at line 216 of file em_ldma.h.

enum LDMA_CfgDstIncSign_t

Destination address increment sign.

Enumerator
ldmaCfgDstIncSignPos 

Increment destination address.

ldmaCfgDstIncSignNeg 

Decrement destination address.

Definition at line 232 of file em_ldma.h.

enum LDMA_CfgSrcIncSign_t

Source address increment sign.

Enumerator
ldmaCfgSrcIncSignPos 

Increment source address.

ldmaCfgSrcIncSignNeg 

Decrement source address.

Definition at line 225 of file em_ldma.h.

enum LDMA_CtrlBlockSize_t

This value controls the number of unit data transfers per arbitration cycle, providing a means to balance DMA channels' load on the controller.

Enumerator
ldmaCtrlBlockSizeUnit1 

One transfer per arbitration.

ldmaCtrlBlockSizeUnit2 

Two transfers per arbitration.

ldmaCtrlBlockSizeUnit3 

Three transfers per arbitration.

ldmaCtrlBlockSizeUnit4 

Four transfers per arbitration.

ldmaCtrlBlockSizeUnit6 

Six transfers per arbitration.

ldmaCtrlBlockSizeUnit8 

Eight transfers per arbitration.

ldmaCtrlBlockSizeUnit16 

16 transfers per arbitration.

ldmaCtrlBlockSizeUnit32 

32 transfers per arbitration.

ldmaCtrlBlockSizeUnit64 

64 transfers per arbitration.

ldmaCtrlBlockSizeUnit128 

128 transfers per arbitration.

ldmaCtrlBlockSizeUnit256 

256 transfers per arbitration.

ldmaCtrlBlockSizeUnit512 

512 transfers per arbitration.

ldmaCtrlBlockSizeUnit1024 

1024 transfers per arbitration.

ldmaCtrlBlockSizeAll 

Lock arbitration during transfer.

Definition at line 135 of file em_ldma.h.

enum LDMA_CtrlDstAddrMode_t

Destination addressing mode.

Enumerator
ldmaCtrlDstAddrModeAbs 

Address fetched from a linked structure is absolute.

ldmaCtrlDstAddrModeRel 

Address fetched from a linked structure is relative.

Definition at line 202 of file em_ldma.h.

enum LDMA_CtrlDstInc_t

Destination address increment unit size.

Enumerator
ldmaCtrlDstIncOne 

Increment destination address by one unit data size.

ldmaCtrlDstIncTwo 

Increment destination address by two unit data sizes.

ldmaCtrlDstIncFour 

Increment destination address by four unit data sizes.

ldmaCtrlDstIncNone 

Do not increment the destination address.

Definition at line 186 of file em_ldma.h.

enum LDMA_CtrlReqMode_t

DMA transfer block or cycle selector.

Enumerator
ldmaCtrlReqModeBlock 

Each DMA request trigger transfer of one block.

ldmaCtrlReqModeAll 

A DMA request trigger transfer of a complete cycle.

Definition at line 162 of file em_ldma.h.

enum LDMA_CtrlSize_t

DMA transfer unit size.

Enumerator
ldmaCtrlSizeByte 

Each unit transfer is a byte.

ldmaCtrlSizeHalf 

Each unit transfer is a half-word.

ldmaCtrlSizeWord 

Each unit transfer is a word.

Definition at line 178 of file em_ldma.h.

enum LDMA_CtrlSrcAddrMode_t

Source addressing mode.

Enumerator
ldmaCtrlSrcAddrModeAbs 

Address fetched from a linked structure is absolute.

ldmaCtrlSrcAddrModeRel 

Address fetched from a linked structure is relative.

Definition at line 195 of file em_ldma.h.

enum LDMA_CtrlSrcInc_t

Source address increment unit size.

Enumerator
ldmaCtrlSrcIncOne 

Increment source address by one unit data size.

ldmaCtrlSrcIncTwo 

Increment source address by two unit data sizes.

ldmaCtrlSrcIncFour 

Increment source address by four unit data sizes.

ldmaCtrlSrcIncNone 

Do not increment the source address.

Definition at line 169 of file em_ldma.h.

enum LDMA_CtrlStructType_t

DMA structure type.

Enumerator
ldmaCtrlStructTypeXfer 

TRANSFER transfer type.

ldmaCtrlStructTypeSync 

SYNCHRONIZE transfer type.

ldmaCtrlStructTypeWrite 

WRITE transfer type.

Definition at line 154 of file em_ldma.h.

enum LDMA_LinkMode_t

DMA linkload address mode.

Enumerator
ldmaLinkModeAbs 

Link address is an absolute address value.

ldmaLinkModeRel 

Link address is a two's complement releative address.

Definition at line 209 of file em_ldma.h.

enum LDMA_PeripheralSignal_t

Peripherals that can trigger LDMA transfers.

Enumerator
ldmaPeripheralSignal_NONE 

No peripheral selected for DMA triggering.

ldmaPeripheralSignal_ADC0_SCAN 

Trig on ADC0_SCAN.

ldmaPeripheralSignal_ADC0_SINGLE 

Trig on ADC0_SINGLE.

ldmaPeripheralSignal_CRYPTO_DATA0RD 

Trig on CRYPTO_DATA0RD.

ldmaPeripheralSignal_CRYPTO_DATA0WR 

Trig on CRYPTO_DATA0WR.

ldmaPeripheralSignal_CRYPTO_DATA0XWR 

Trig on CRYPTO_DATA0XWR.

ldmaPeripheralSignal_CRYPTO_DATA1RD 

Trig on CRYPTO_DATA1RD.

ldmaPeripheralSignal_CRYPTO_DATA1WR 

Trig on CRYPTO_DATA1WR.

ldmaPeripheralSignal_I2C0_RXDATAV 

Trig on I2C0_RXDATAV.

ldmaPeripheralSignal_I2C0_TXBL 

Trig on I2C0_TXBL.

ldmaPeripheralSignal_LEUART0_RXDATAV 

Trig on LEUART0_RXDATAV.

ldmaPeripheralSignal_LEUART0_TXBL 

Trig on LEUART0_TXBL.

ldmaPeripheralSignal_LEUART0_TXEMPTY 

Trig on LEUART0_TXEMPTY.

ldmaPeripheralSignal_MSC_WDATA 

Trig on MSC_WDATA.

ldmaPeripheralSignal_PRS_REQ0 

Trig on PRS_REQ0.

ldmaPeripheralSignal_PRS_REQ1 

Trig on PRS_REQ1.

ldmaPeripheralSignal_TIMER0_CC0 

Trig on TIMER0_CC0.

ldmaPeripheralSignal_TIMER0_CC1 

Trig on TIMER0_CC1.

ldmaPeripheralSignal_TIMER0_CC2 

Trig on TIMER0_CC2.

ldmaPeripheralSignal_TIMER0_UFOF 

Trig on TIMER0_UFOF.

ldmaPeripheralSignal_TIMER1_CC0 

Trig on TIMER1_CC0.

ldmaPeripheralSignal_TIMER1_CC1 

Trig on TIMER1_CC1.

ldmaPeripheralSignal_TIMER1_CC2 

Trig on TIMER1_CC2.

ldmaPeripheralSignal_TIMER1_CC3 

Trig on TIMER1_CC3.

ldmaPeripheralSignal_TIMER1_UFOF 

Trig on TIMER1_UFOF.

ldmaPeripheralSignal_USART0_RXDATAV 

Trig on USART0_RXDATAV.

ldmaPeripheralSignal_USART0_TXBL 

Trig on USART0_TXBL.

ldmaPeripheralSignal_USART0_TXEMPTY 

Trig on USART0_TXEMPTY.

ldmaPeripheralSignal_USART1_RXDATAV 

Trig on USART1_RXDATAV.

ldmaPeripheralSignal_USART1_RXDATAVRIGHT 

Trig on USART1_RXDATAVRIGHT.

ldmaPeripheralSignal_USART1_TXBL 

Trig on USART1_TXBL.

ldmaPeripheralSignal_USART1_TXBLRIGHT 

Trig on USART1_TXBLRIGHT.

ldmaPeripheralSignal_USART1_TXEMPTY 

Trig on USART1_TXEMPTY.

Definition at line 239 of file em_ldma.h.

Function Documentation

void LDMA_DeInit ( void  )

De-initialize the LDMA controller.

LDMA interrupts are disabled and the LDMA clock is stopped.

Definition at line 90 of file em_ldma.c.

References CMU_ClockEnable(), cmuClock_LDMA, LDMA, and LDMA_IRQn.

Referenced by DMADRV_DeInit().

void LDMA_EnableChannelRequest ( int  ch,
bool  enable 
)

Enable or disable a LDMA channel request.

Use this function to enable or disable a LDMA channel request. This will prevent the LDMA from proceeding after its current transaction if disabled.

Parameters
[in]channelLDMA channel to enable or disable requests on.
[in]enableIf 'true' request will be enabled. If 'false' request will be disabled.

Definition at line 112 of file em_ldma.c.

References BUS_RegBitWrite(), and LDMA.

Referenced by DMADRV_PauseTransfer(), and DMADRV_ResumeTransfer().

void LDMA_Init ( const LDMA_Init_t *  init)

Initialize the LDMA controller.

This function will disable all the LDMA channels and enable the LDMA bus clock in the CMU. This function will also enable the LDMA IRQ in the NVIC and set the LDMA IRQ priority to a user configurable priority. The LDMA interrupt priority is configured using the LDMA_Init_t structure.

Note
Since this function enables the LDMA IRQ you should always add a custom LDMA_IRQHandler to the application in order to handle any interrupts from LDMA.
Parameters
[in]initPointer to initialization structure used to configure the LDMA.

Definition at line 137 of file em_ldma.c.

References __NVIC_PRIO_BITS, _LDMA_CTRL_NUMFIXED_MASK, _LDMA_CTRL_NUMFIXED_SHIFT, _LDMA_CTRL_SYNCPRSCLREN_MASK, _LDMA_CTRL_SYNCPRSCLREN_SHIFT, _LDMA_CTRL_SYNCPRSSETEN_MASK, _LDMA_CTRL_SYNCPRSSETEN_SHIFT, CMU_ClockEnable(), cmuClock_LDMA, LDMA, LDMA_IEN_ERROR, LDMA_IRQn, LDMA_Init_t::ldmaInitCtrlNumFixed, LDMA_Init_t::ldmaInitCtrlSyncPrsClrEn, LDMA_Init_t::ldmaInitCtrlSyncPrsSetEn, and LDMA_Init_t::ldmaInitIrqPriority.

Referenced by DMADRV_Init().

__STATIC_INLINE void LDMA_IntClear ( uint32_t  flags)

Clear one or more pending LDMA interrupts.

Parameters
[in]flagsPending LDMA interrupt sources to clear. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IFC_ERROR and one done flag for each channel.

Definition at line 1407 of file em_ldma.h.

References LDMA.

__STATIC_INLINE void LDMA_IntDisable ( uint32_t  flags)

Disable one or more LDMA interrupts.

Parameters
[in]flagsLDMA interrupt sources to disable. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IEN_ERROR and one done flag for each channel.

Definition at line 1422 of file em_ldma.h.

References LDMA.

__STATIC_INLINE void LDMA_IntEnable ( uint32_t  flags)

Enable one or more LDMA interrupts.

Note
Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. Consider using LDMA_IntClear() prior to enabling if such a pending interrupt should be ignored.
Parameters
[in]flagsLDMA interrupt sources to enable. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IEN_ERROR and one done flag for each channel.

Definition at line 1442 of file em_ldma.h.

References LDMA.

__STATIC_INLINE uint32_t LDMA_IntGet ( void  )

Get pending LDMA interrupt flags.

Note
The event bits are not cleared by the use of this function.
Returns
LDMA interrupt sources pending. Returns one or more valid interrupt flags for the LDMA module. The flags are LDMA_IF_ERROR and one flag for each LDMA channel.

Definition at line 1460 of file em_ldma.h.

References LDMA.

__STATIC_INLINE uint32_t LDMA_IntGetEnabled ( void  )

Get enabled and pending LDMA interrupt flags. Useful for handling more interrupt sources in the same interrupt handler.

Note
Interrupt flags are not cleared by the use of this function.
Returns
Pending and enabled LDMA interrupt sources The return value is the bitwise AND of
  • the enabled interrupt sources in LDMA_IEN and
  • the pending interrupt flags LDMA_IF

Definition at line 1480 of file em_ldma.h.

References LDMA.

__STATIC_INLINE void LDMA_IntSet ( uint32_t  flags)

Set one or more pending LDMA interrupts.

Parameters
[in]flagsLDMA interrupt sources to set to pending. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IFS_ERROR and one done flag for each LDMA channel.

Definition at line 1498 of file em_ldma.h.

References LDMA.

void LDMA_StartTransfer ( int  ch,
const LDMA_TransferCfg_t *  transfer,
const LDMA_Descriptor_t *  descriptor 
)

Start a DMA transfer.

Parameters
[in]chDMA channel.
[in]transferInitialization structure used to configure the transfer.
[in]descriptorTransfer descriptor, can be an array of descriptors linked together.

Definition at line 183 of file em_ldma.c.

References _LDMA_CH_CFG_ARBSLOTS_MASK, _LDMA_CH_CFG_ARBSLOTS_SHIFT, _LDMA_CH_CFG_DSTINCSIGN_MASK, _LDMA_CH_CFG_DSTINCSIGN_SHIFT, _LDMA_CH_CFG_SRCINCSIGN_MASK, _LDMA_CH_CFG_SRCINCSIGN_SHIFT, _LDMA_CH_LINK_LINKADDR_MASK, _LDMA_CH_LOOP_LOOPCNT_MASK, _LDMA_CH_LOOP_LOOPCNT_SHIFT, _LDMA_CH_REQSEL_MASK, _LDMA_CTRL_SYNCPRSCLREN_MASK, _LDMA_CTRL_SYNCPRSCLREN_SHIFT, _LDMA_CTRL_SYNCPRSSETEN_MASK, _LDMA_CTRL_SYNCPRSSETEN_SHIFT, BUS_RegMaskedClear(), CORE_DECLARE_IRQ_STATE, CORE_ENTER_ATOMIC, CORE_EXIT_ATOMIC, LDMA, LDMA_TransferCfg_t::ldmaCfgArbSlots, LDMA_TransferCfg_t::ldmaCfgDstIncSign, LDMA_TransferCfg_t::ldmaCfgSrcIncSign, LDMA_TransferCfg_t::ldmaCtrlSyncPrsClrOff, LDMA_TransferCfg_t::ldmaCtrlSyncPrsClrOn, LDMA_TransferCfg_t::ldmaCtrlSyncPrsSetOff, LDMA_TransferCfg_t::ldmaCtrlSyncPrsSetOn, LDMA_TransferCfg_t::ldmaDbgHalt, LDMA_TransferCfg_t::ldmaLoopCnt, LDMA_TransferCfg_t::ldmaReqDis, and LDMA_TransferCfg_t::ldmaReqSel.

Referenced by DMADRV_LdmaStartTransfer().

void LDMA_StopTransfer ( int  ch)

Stop a DMA transfer.

Note
The DMA will complete the current AHB burst transfer before stopping.
Parameters
[in]chDMA channel to stop.

Definition at line 284 of file em_ldma.c.

References BUS_RegMaskedClear(), CORE_ATOMIC_SECTION, and LDMA.

Referenced by DMADRV_StopTransfer().

bool LDMA_TransferDone ( int  ch)

Check if a DMA transfer has completed.

Parameters
[in]chDMA channel to check.
Returns
True if transfer has completed, false if not.

Definition at line 306 of file em_ldma.c.

References CORE_ATOMIC_SECTION, and LDMA.

Referenced by DMADRV_TransferDone().

uint32_t LDMA_TransferRemainingCount ( int  ch)

Get number of items remaining in a transfer.

Note
This function is does not take into account that a DMA transfers with a chain of linked transfers might be ongoing. It will only check the count for the current transfer.
Parameters
[in]chThe channel number of the transfer to check.
Returns
Number of items remaining in the transfer.

Definition at line 338 of file em_ldma.c.

References _LDMA_CH_CTRL_XFERCNT_MASK, _LDMA_CH_CTRL_XFERCNT_SHIFT, CORE_ATOMIC_SECTION, and LDMA.

Referenced by DMADRV_TransferRemainingCount().