EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
em_bus.h
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1 /***************************************************************************/
33 #ifndef EM_BUS_H
34 #define EM_BUS_H
35 
36 #include "em_device.h"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
42 /***************************************************************************/
47 /***************************************************************************/
55 /***************************************************************************/
75 __STATIC_INLINE void BUS_RamBitWrite(volatile uint32_t *addr,
76  unsigned int bit,
77  unsigned int val)
78 {
79 #if defined( BITBAND_RAM_BASE )
80  uint32_t aliasAddr =
81  BITBAND_RAM_BASE + (((uint32_t)addr - SRAM_BASE) * 32) + (bit * 4);
82 
83  *(volatile uint32_t *)aliasAddr = (uint32_t)val;
84 #else
85  uint32_t tmp = *addr;
86 
87  /* Make sure val is not more than 1, because we only want to set one bit. */
88  *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
89 #endif
90 }
91 
92 
93 /***************************************************************************/
114 __STATIC_INLINE unsigned int BUS_RamBitRead(volatile const uint32_t *addr,
115  unsigned int bit)
116 {
117 #if defined( BITBAND_RAM_BASE )
118  uint32_t aliasAddr =
119  BITBAND_RAM_BASE + (((uint32_t)addr - SRAM_BASE) * 32) + (bit * 4);
120 
121  return *(volatile uint32_t *)aliasAddr;
122 #else
123  return ((*addr) >> bit) & 1;
124 #endif
125 }
126 
127 
128 /***************************************************************************/
148 __STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr,
149  unsigned int bit,
150  unsigned int val)
151 {
152 #if defined( BITBAND_PER_BASE )
153  uint32_t aliasAddr =
154  BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) * 32) + (bit * 4);
155 
156  *(volatile uint32_t *)aliasAddr = (uint32_t)val;
157 #else
158  uint32_t tmp = *addr;
159 
160  /* Make sure val is not more than 1, because we only want to set one bit. */
161  *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
162 #endif
163 }
164 
165 
166 /***************************************************************************/
187 __STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr,
188  unsigned int bit)
189 {
190 #if defined( BITBAND_PER_BASE )
191  uint32_t aliasAddr =
192  BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) * 32) + (bit * 4);
193 
194  return *(volatile uint32_t *)aliasAddr;
195 #else
196  return ((*addr) >> bit) & 1;
197 #endif
198 }
199 
200 
201 /***************************************************************************/
221 __STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr,
222  uint32_t mask)
223 {
224 #if defined( PER_BITSET_MEM_BASE )
225  uint32_t aliasAddr = PER_BITSET_MEM_BASE + ((uint32_t)addr - PER_MEM_BASE);
226  *(volatile uint32_t *)aliasAddr = mask;
227 #else
228  *addr |= mask;
229 #endif
230 }
231 
232 
233 /***************************************************************************/
253 __STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr,
254  uint32_t mask)
255 {
256 #if defined( PER_BITCLR_MEM_BASE )
257  uint32_t aliasAddr = PER_BITCLR_MEM_BASE + ((uint32_t)addr - PER_MEM_BASE);
258  *(volatile uint32_t *)aliasAddr = mask;
259 #else
260  *addr &= ~mask;
261 #endif
262 }
263 
264 
265 /***************************************************************************/
288 __STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr,
289  uint32_t mask,
290  uint32_t val)
291 {
292 #if defined( PER_BITCLR_MEM_BASE )
293  BUS_RegMaskedClear(addr, mask);
294  BUS_RegMaskedSet(addr, val);
295 #else
296  *addr = (*addr & ~mask) | val;
297 #endif
298 }
299 
300 
301 /***************************************************************************/
318 __STATIC_INLINE uint32_t BUS_RegMaskedRead(volatile const uint32_t *addr,
319  uint32_t mask)
320 {
321  return *addr & mask;
322 }
323 
324 
328 #ifdef __cplusplus
329 }
330 #endif
331 
332 #endif /* EM_BUS_H */
__STATIC_INLINE void BUS_RamBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a 32-bit word in RAM.
Definition: em_bus.h:75
#define PER_BITCLR_MEM_BASE
#define BITBAND_PER_BASE
#define SRAM_BASE
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
__STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a peripheral register.
Definition: em_bus.h:187
#define PER_BITSET_MEM_BASE
#define PER_MEM_BASE
#define BITBAND_RAM_BASE
__STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr, uint32_t mask)
Perform a masked set operation on peripheral register address.
Definition: em_bus.h:221
__STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr, uint32_t mask)
Perform a masked clear operation on peripheral register address.
Definition: em_bus.h:253
__STATIC_INLINE uint32_t BUS_RegMaskedRead(volatile const uint32_t *addr, uint32_t mask)
Perform a peripheral register masked read.
Definition: em_bus.h:318
__STATIC_INLINE unsigned int BUS_RamBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a 32-bit word in RAM.
Definition: em_bus.h:114
__STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, uint32_t mask, uint32_t val)
Perform peripheral register masked clear and value write.
Definition: em_bus.h:288
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
Definition: em_bus.h:148