EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
em_msc.h
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1 /***************************************************************************/
33 #ifndef EM_MSC_H
34 #define EM_MSC_H
35 
36 #include "em_device.h"
37 #if defined(MSC_COUNT) && (MSC_COUNT > 0)
38 
39 #include <stdint.h>
40 #include <stdbool.h>
41 #include "em_bus.h"
42 #include "em_ramfunc.h"
43 
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47 
48 /***************************************************************************/
53 /***************************************************************************/
96 /*******************************************************************************
97  ************************* DEFINES *****************************************
98  ******************************************************************************/
99 
110 #define MSC_PROGRAM_TIMEOUT 10000000ul
111 
124 #if defined(DOXY_DOC_ONLY)
125 #define EM_MSC_RUN_FROM_FLASH
126 #endif
127 
128 /*******************************************************************************
129  ************************* TYPEDEFS ****************************************
130  ******************************************************************************/
131 
133 typedef enum
134 {
141 
142 
143 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
144 
145 typedef enum
146 {
147  mscBusStrategyCPU = MSC_READCTRL_BUSSTRATEGY_CPU,
148  mscBusStrategyDMA = MSC_READCTRL_BUSSTRATEGY_DMA,
149  mscBusStrategyDMAEM1 = MSC_READCTRL_BUSSTRATEGY_DMAEM1,
150  mscBusStrategyNone = MSC_READCTRL_BUSSTRATEGY_NONE
151 } MSC_BusStrategy_Typedef;
152 #endif
153 
155 typedef struct
156 {
157  bool scbtEn;
158  bool prefetchEn;
159  bool ifcDis;
160  bool aiDis;
161  bool iccDis;
162  bool useHprot;
164 
166 #define MSC_EXECCONFIG_DEFAULT \
167 { \
168  false, \
169  true, \
170  false, \
171  false, \
172  false, \
173  false, \
174 }
175 
177 /* Deprecated type names */
178 #define mscBusStrategy_Typedef MSC_BusStrategy_Typedef
179 #define msc_Return_TypeDef MSC_Status_TypeDef
180 
183 /***************************************************************************/
191 __STATIC_INLINE void MSC_IntClear(uint32_t flags)
192 {
193  MSC->IFC = flags;
194 }
195 
196 /***************************************************************************/
204 __STATIC_INLINE void MSC_IntDisable(uint32_t flags)
205 {
206  MSC->IEN &= ~(flags);
207 }
208 
209 
210 /***************************************************************************/
223 __STATIC_INLINE void MSC_IntEnable(uint32_t flags)
224 {
225  MSC->IEN |= flags;
226 }
227 
228 
229 /***************************************************************************/
240 __STATIC_INLINE uint32_t MSC_IntGet(void)
241 {
242  return(MSC->IF);
243 }
244 
245 
246 /***************************************************************************/
260 __STATIC_INLINE uint32_t MSC_IntGetEnabled(void)
261 {
262  uint32_t ien;
263 
264  ien = MSC->IEN;
265  return MSC->IF & ien;
266 }
267 
268 
269 /***************************************************************************/
277 __STATIC_INLINE void MSC_IntSet(uint32_t flags)
278 {
279  MSC->IFS = flags;
280 }
281 
282 
283 #if defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF )
284 /***************************************************************************/
291 __STATIC_INLINE void MSC_StartCacheMeasurement(void)
292 {
293  /* Clear CMOF and CHOF to catch these later */
294  MSC->IFC = MSC_IF_CHOF | MSC_IF_CMOF;
295 
296  /* Start performance counters */
297 #if defined( _MSC_CACHECMD_MASK )
298  MSC->CACHECMD = MSC_CACHECMD_STARTPC;
299 #else
300  MSC->CMD = MSC_CMD_STARTPC;
301 #endif
302 }
303 
304 
305 /***************************************************************************/
352 __STATIC_INLINE int32_t MSC_GetCacheMeasurement(void)
353 {
354  int32_t total;
355  int32_t hits;
356  /* Stop the counter before computing the hit-rate */
357 #if defined( _MSC_CACHECMD_MASK )
358  MSC->CACHECMD = MSC_CACHECMD_STOPPC;
359 #else
360  MSC->CMD = MSC_CMD_STOPPC;
361 #endif
362 
363  /* Check for overflows in performance counters */
364  if (MSC->IF & (MSC_IF_CHOF | MSC_IF_CMOF))
365  {
366  return -2;
367  }
368 
369  hits = MSC->CACHEHITS;
370  total = MSC->CACHEMISSES + hits;
371 
372  /* To avoid a division by zero. */
373  if (total == 0)
374  {
375  return -1;
376  }
377 
378  return (hits * 100) / total;
379 }
380 
381 
382 /***************************************************************************/
386 __STATIC_INLINE void MSC_FlushCache(void)
387 {
388 #if defined( _MSC_CACHECMD_MASK )
389  MSC->CACHECMD = MSC_CACHECMD_INVCACHE;
390 #else
391  MSC->CMD = MSC_CMD_INVCACHE;
392 #endif
393 }
394 
395 
396 /***************************************************************************/
402 __STATIC_INLINE void MSC_EnableCache(bool enable)
403 {
404  BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_IFCDIS_SHIFT, !enable);
405 }
406 
407 
408 #if defined( MSC_READCTRL_ICCDIS )
409 /***************************************************************************/
415 __STATIC_INLINE void MSC_EnableCacheIRQs(bool enable)
416 {
417  BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_ICCDIS_SHIFT, !enable);
418 }
419 #endif
420 
421 
422 /***************************************************************************/
428 __STATIC_INLINE void MSC_EnableAutoCacheFlush(bool enable)
429 {
430  BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_AIDIS_SHIFT, !enable);
431 }
432 #endif /* defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF ) */
433 
434 
435 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
436 /***************************************************************************/
442 __STATIC_INLINE void MSC_BusStrategy(mscBusStrategy_Typedef mode)
443 {
444  MSC->READCTRL = (MSC->READCTRL & ~(_MSC_READCTRL_BUSSTRATEGY_MASK)) | mode;
445 }
446 #endif
447 
448 
449 /*******************************************************************************
450  ************************* PROTOTYPES **************************************
451  ******************************************************************************/
452 
453 void MSC_Init(void);
454 void MSC_Deinit(void);
455 void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig);
456 
457 #if defined(EM_MSC_RUN_FROM_FLASH)
458 
459 #define MSC_RAMFUNC_DECLARATOR
460 
461 #define MSC_RAMFUNC_DEFINITION_BEGIN
462 
463 #define MSC_RAMFUNC_DEFINITION_END
464 #else
465 #define MSC_RAMFUNC_DECLARATOR SL_RAMFUNC_DECLARATOR
466 #define MSC_RAMFUNC_DEFINITION_BEGIN SL_RAMFUNC_DEFINITION_BEGIN
467 #define MSC_RAMFUNC_DEFINITION_END SL_RAMFUNC_DEFINITION_END
468 #endif
469 
471  MSC_WriteWord(uint32_t *address,
472  void const *data,
473  uint32_t numBytes);
474 
475 #if !defined( _EFM32_GECKO_FAMILY )
477  MSC_WriteWordFast(uint32_t *address,
478  void const *data,
479  uint32_t numBytes);
480 
481 #endif
482 
484  MSC_ErasePage(uint32_t *startAddress);
485 
486 #if defined( _MSC_MASSLOCK_MASK )
488  MSC_MassErase(void);
489 #endif
490 
494 #ifdef __cplusplus
495 }
496 #endif
497 
498 #endif /* defined(MSC_COUNT) && (MSC_COUNT > 0) */
499 #endif /* EM_MSC_H */
__STATIC_INLINE uint32_t MSC_IntGetEnabled(void)
Get enabled and pending MSC interrupt flags. Useful for handling more interrupt sources in the same i...
Definition: em_msc.h:260
#define MSC_IF_CMOF
RAM and peripheral bit-field set and clear API.
#define MSC
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef MSC_MassErase(void)
Erase entire flash in one operation.
Definition: em_msc.c:906
__STATIC_INLINE void MSC_FlushCache(void)
Flush the contents of the instruction cache.
Definition: em_msc.h:386
__STATIC_INLINE void MSC_EnableAutoCacheFlush(bool enable)
Enable or disable instruction cache flushing when writing to flash.
Definition: em_msc.h:428
void MSC_Init(void)
Enables the flash controller for writing.
Definition: em_msc.c:157
void MSC_Deinit(void)
Disables the flash controller for writing.
Definition: em_msc.c:218
__STATIC_INLINE void MSC_IntSet(uint32_t flags)
Set one or more pending MSC interrupts from SW.
Definition: em_msc.h:277
#define _MSC_READCTRL_ICCDIS_SHIFT
void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig)
Set MSC code execution configuration.
Definition: em_msc.c:234
#define MSC_RAMFUNC_DECLARATOR
Expands to SL_RAMFUNC_DECLARATOR if EM_MSC_RUN_FROM_FLASH is undefined and to nothing if EM_MSC_RUN_F...
Definition: em_msc.h:459
__STATIC_INLINE void MSC_EnableCache(bool enable)
Enable or disable instruction cache functionality.
Definition: em_msc.h:402
MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef MSC_WriteWordFast(uint32_t *address, void const *data, uint32_t numBytes)
Writes data to flash memory. This function is faster than MSC_WriteWord(), but it disables interrupts...
Definition: em_msc.c:883
#define _MSC_READCTRL_IFCDIS_SHIFT
__STATIC_INLINE void MSC_EnableCacheIRQs(bool enable)
Enable or disable instruction cache functionality in IRQs.
Definition: em_msc.h:415
#define MSC_CACHECMD_STARTPC
#define _MSC_READCTRL_AIDIS_SHIFT
__STATIC_INLINE void MSC_IntEnable(uint32_t flags)
Enable one or more MSC interrupts.
Definition: em_msc.h:223
#define MSC_CACHECMD_STOPPC
MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef MSC_WriteWord(uint32_t *address, void const *data, uint32_t numBytes)
Writes data to flash memory. This function is interrupt safe, but slower than MSC_WriteWordFast(), which writes to flash with interrupts disabled. Write data must be aligned to words and contain a number of bytes that is divisable by four.
Definition: em_msc.c:839
#define MSC_IF_CHOF
__STATIC_INLINE uint32_t MSC_IntGet(void)
Get pending MSC interrupt flags.
Definition: em_msc.h:240
__STATIC_INLINE void MSC_IntClear(uint32_t flags)
Clear one or more pending MSC interrupts.
Definition: em_msc.h:191
MSC_Status_TypeDef
Definition: em_msc.h:133
RAM code support.
#define MSC_CACHECMD_INVCACHE
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
Definition: em_bus.h:148
__STATIC_INLINE void MSC_IntDisable(uint32_t flags)
Disable one or more MSC interrupts.
Definition: em_msc.h:204
__STATIC_INLINE void MSC_StartCacheMeasurement(void)
Starts measuring cache hit ratio.
Definition: em_msc.h:291
MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef MSC_ErasePage(uint32_t *startAddress)
Erases a page in flash memory.
Definition: em_msc.c:748
__STATIC_INLINE int32_t MSC_GetCacheMeasurement(void)
Stops measuring the hit rate.
Definition: em_msc.h:352