EFR32 Blue Gecko 12 Software Documentation  efr32bg12-doc-5.1.2
Data Structures | Macros | Enumerations | Functions
SMU
EMLIB

Detailed Description

Security Management Unit (SMU) Peripheral API.

The Security Management Unit (SMU) forms the control and status/reporting component of bus-level security in EFM32/EFR32 devices.

Peripheral-level protection is provided via the peripheral protection unit (PPU). The PPU provides a hardware access barrier to any peripheral that is configured to be protected. When an attempt is made to access a peripheral without the required privilege/security level, the PPU detects the fault and intercepts the access. No write or read of the peripheral register space occurs, and an all-zero value is returned if the access is a read.

// SMU is always clocked, so no call to CMU_ClockEnable() is necessary
// Initialize SMU to prevent access to CMU, EMU, SMU and GPIO
SMU_Init_TypeDef init = SMU_INIT_DEFAULT;
init.ppu.access.privilegedCMU = true;
init.ppu.access.privilegedEMU = true;
init.ppu.access.privilegedSMU = true;
init.ppu.access.privilegedGPIO = true;
SMU_Init(&init);

Data Structures

struct  SMU_Init_TypeDef
 
struct  SMU_PrivilegedAccess_TypeDef
 

Macros

#define SMU_INIT_DEFAULT
 

Enumerations

enum  SMU_Peripheral_TypeDef {
  smuPeripheralACMP0 = _SMU_PPUPATD0_ACMP0_SHIFT,
  smuPeripheralACMP1 = _SMU_PPUPATD0_ACMP1_SHIFT,
  smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT,
  smuPeripheralCMU = _SMU_PPUPATD0_CMU_SHIFT,
  smuPeripheralCRYOTIMER = _SMU_PPUPATD0_CRYOTIMER_SHIFT,
  smuPeripheralCRYPTO0 = _SMU_PPUPATD0_CRYPTO0_SHIFT,
  smuPeripheralCRYPTO1 = _SMU_PPUPATD0_CRYPTO1_SHIFT,
  smuPeripheralCSEN = _SMU_PPUPATD0_CSEN_SHIFT,
  smuPeripheralVDAC0 = _SMU_PPUPATD0_VDAC0_SHIFT,
  smuPeripheralPRS = _SMU_PPUPATD0_PRS_SHIFT,
  smuPeripheralEMU = _SMU_PPUPATD0_EMU_SHIFT,
  smuPeripheralFPUEH = _SMU_PPUPATD0_FPUEH_SHIFT,
  smuPeripheralGPCRC = _SMU_PPUPATD0_GPCRC_SHIFT,
  smuPeripheralGPIO = _SMU_PPUPATD0_GPIO_SHIFT,
  smuPeripheralI2C0 = _SMU_PPUPATD0_I2C0_SHIFT,
  smuPeripheralI2C1 = _SMU_PPUPATD0_I2C1_SHIFT,
  smuPeripheralIDAC0 = _SMU_PPUPATD0_IDAC0_SHIFT,
  smuPeripheralMSC = _SMU_PPUPATD0_MSC_SHIFT,
  smuPeripheralLDMA = _SMU_PPUPATD0_LDMA_SHIFT,
  smuPeripheralLESENSE = _SMU_PPUPATD0_LESENSE_SHIFT,
  smuPeripheralLETIMER0 = _SMU_PPUPATD0_LETIMER0_SHIFT,
  smuPeripheralLEUART0 = _SMU_PPUPATD0_LEUART0_SHIFT,
  smuPeripheralPCNT0 = _SMU_PPUPATD0_PCNT0_SHIFT,
  smuPeripheralPCNT1 = _SMU_PPUPATD0_PCNT1_SHIFT,
  smuPeripheralPCNT2 = _SMU_PPUPATD0_PCNT2_SHIFT,
  smuPeripheralRMU = 32 + _SMU_PPUPATD1_RMU_SHIFT,
  smuPeripheralRTCC = 32 + _SMU_PPUPATD1_RTCC_SHIFT,
  smuPeripheralSMU = 32 + _SMU_PPUPATD1_SMU_SHIFT,
  smuPeripheralTIMER0 = 32 + _SMU_PPUPATD1_TIMER0_SHIFT,
  smuPeripheralTIMER1 = 32 + _SMU_PPUPATD1_TIMER1_SHIFT,
  smuPeripheralTRNG0 = 32 + _SMU_PPUPATD1_TRNG0_SHIFT,
  smuPeripheralUSART0 = 32 + _SMU_PPUPATD1_USART0_SHIFT,
  smuPeripheralUSART1 = 32 + _SMU_PPUPATD1_USART1_SHIFT,
  smuPeripheralUSART2 = 32 + _SMU_PPUPATD1_USART2_SHIFT,
  smuPeripheralUSART3 = 32 + _SMU_PPUPATD1_USART3_SHIFT,
  smuPeripheralWDOG0 = 32 + _SMU_PPUPATD1_WDOG0_SHIFT,
  smuPeripheralWDOG1 = 32 + _SMU_PPUPATD1_WDOG1_SHIFT,
  smuPeripheralWTIMER0 = 32 + _SMU_PPUPATD1_WTIMER0_SHIFT,
  smuPeripheralWTIMER1 = 32 + _SMU_PPUPATD1_WTIMER1_SHIFT,
  smuPeripheralEnd
}
 

Functions

__STATIC_INLINE void SMU_EnablePPU (bool enable)
 Enable or disable the Peripheral Protection Unit of the SMU. More...
 
__STATIC_INLINE SMU_Peripheral_TypeDef SMU_GetFaultingPeripheral (void)
 Get the ID of the peripheral that caused an access fault. More...
 
__STATIC_INLINE void SMU_Init (const SMU_Init_TypeDef *init)
 Initialize the Peripheral Protection Unit of the SMU. More...
 
__STATIC_INLINE void SMU_IntClear (uint32_t flags)
 Clear one or more pending SMU interrupts. More...
 
__STATIC_INLINE void SMU_IntDisable (uint32_t flags)
 Disable one or more SMU interrupts. More...
 
__STATIC_INLINE void SMU_IntEnable (uint32_t flags)
 Enable one or more SMU interrupts. More...
 
__STATIC_INLINE uint32_t SMU_IntGet (void)
 Get pending SMU interrupts. More...
 
__STATIC_INLINE uint32_t SMU_IntGetEnabled (void)
 Get enabled and pending SMU interrupt flags. Useful for handling more interrupt sources in the same interrupt handler. More...
 
__STATIC_INLINE void SMU_IntSet (uint32_t flags)
 Set one or more pending SMU interrupts from SW. More...
 
__STATIC_INLINE void SMU_SetPrivilegedAccess (SMU_Peripheral_TypeDef peripheral, bool privileged)
 Change the access settings for a peripheral. More...
 

Macro Definition Documentation

#define SMU_INIT_DEFAULT
Value:
{ \
{{0}}, /* No peripherals acsess protected. */ \
true /* Enable SMU.*/ \
}

Default SMU initialization struct settings.

Definition at line 285 of file em_smu.h.

Enumeration Type Documentation

enum SMU_Peripheral_TypeDef

SMU peripheral identifiers.

Enumerator
smuPeripheralACMP0 

SMU peripheral identifier for ACMP0

smuPeripheralACMP1 

SMU peripheral identifier for ACMP1

smuPeripheralADC0 

SMU peripheral identifier for ADC0

smuPeripheralCMU 

SMU peripheral identifier for CMU

smuPeripheralCRYOTIMER 

SMU peripheral identifier for CRYOTIMER

smuPeripheralCRYPTO0 

SMU peripheral identifier for CRYPTO0

smuPeripheralCRYPTO1 

SMU peripheral identifier for CRYPTO1

smuPeripheralCSEN 

SMU peripheral identifier for CSEN

smuPeripheralVDAC0 

SMU peripheral identifier for VDAC0

smuPeripheralPRS 

SMU peripheral identifier for PRS

smuPeripheralEMU 

SMU peripheral identifier for EMU

smuPeripheralFPUEH 

SMU peripheral identifier for FPUEH

smuPeripheralGPCRC 

SMU peripheral identifier for GPCRC

smuPeripheralGPIO 

SMU peripheral identifier for GPIO

smuPeripheralI2C0 

SMU peripheral identifier for I2C0

smuPeripheralI2C1 

SMU peripheral identifier for I2C1

smuPeripheralIDAC0 

SMU peripheral identifier for IDAC0

smuPeripheralMSC 

SMU peripheral identifier for MSC

smuPeripheralLDMA 

SMU peripheral identifier for LDMA

smuPeripheralLESENSE 

SMU peripheral identifier for LESENSE

smuPeripheralLETIMER0 

SMU peripheral identifier for LETIMER0

smuPeripheralLEUART0 

SMU peripheral identifier for LEUART0

smuPeripheralPCNT0 

SMU peripheral identifier for PCNT0

smuPeripheralPCNT1 

SMU peripheral identifier for PCNT1

smuPeripheralPCNT2 

SMU peripheral identifier for PCNT2

smuPeripheralRMU 

SMU peripheral identifier for RMU

smuPeripheralRTCC 

SMU peripheral identifier for RTCC

smuPeripheralSMU 

SMU peripheral identifier for SMU

smuPeripheralTIMER0 

SMU peripheral identifier for TIMER0

smuPeripheralTIMER1 

SMU peripheral identifier for TIMER1

smuPeripheralTRNG0 

SMU peripheral identifier for TRNG0

smuPeripheralUSART0 

SMU peripheral identifier for USART0

smuPeripheralUSART1 

SMU peripheral identifier for USART1

smuPeripheralUSART2 

SMU peripheral identifier for USART2

smuPeripheralUSART3 

SMU peripheral identifier for USART3

smuPeripheralWDOG0 

SMU peripheral identifier for WDOG0

smuPeripheralWDOG1 

SMU peripheral identifier for WDOG1

smuPeripheralWTIMER0 

SMU peripheral identifier for WTIMER0

smuPeripheralWTIMER1 

SMU peripheral identifier for WTIMER1

Definition at line 79 of file em_smu.h.

Function Documentation

__STATIC_INLINE void SMU_EnablePPU ( bool  enable)

Enable or disable the Peripheral Protection Unit of the SMU.

Parameters
[in]enableTrue if the PPU should be enabled, false if it should be disabled.

Definition at line 302 of file em_smu.h.

References _SMU_PPUCTRL_ENABLE_SHIFT, BUS_RegBitWrite(), and SMU.

Referenced by SMU_Init().

__STATIC_INLINE SMU_Peripheral_TypeDef SMU_GetFaultingPeripheral ( void  )

Get the ID of the peripheral that caused an access fault.

Note
The return value is only valid if the SMU_IF_PPUPRIV interrupt flag is set.
Returns
ID of the faulting peripheral.

Definition at line 361 of file em_smu.h.

References SMU.

__STATIC_INLINE void SMU_Init ( const SMU_Init_TypeDef *  init)

Initialize the Peripheral Protection Unit of the SMU.

Parameters
[in]initPointer to initialization struct defining which peripherals should only be accessed from privileged mode, and whether the PPU should be enabled.

Definition at line 315 of file em_smu.h.

References SMU_Init_TypeDef::enable, SMU_Init_TypeDef::reg, SMU, and SMU_EnablePPU().

__STATIC_INLINE void SMU_IntClear ( uint32_t  flags)

Clear one or more pending SMU interrupts.

Parameters
[in]flagsBitwise logic OR of SMU interrupt sources to clear.

Definition at line 373 of file em_smu.h.

References SMU.

__STATIC_INLINE void SMU_IntDisable ( uint32_t  flags)

Disable one or more SMU interrupts.

Parameters
[in]flagsSMU interrupt sources to disable.

Definition at line 385 of file em_smu.h.

References SMU.

__STATIC_INLINE void SMU_IntEnable ( uint32_t  flags)

Enable one or more SMU interrupts.

Note
Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. Consider using SMU_IntClear() prior to enabling if such a pending interrupt should be ignored.
Parameters
[in]flagsSMU interrupt sources to enable.

Definition at line 402 of file em_smu.h.

References SMU.

__STATIC_INLINE uint32_t SMU_IntGet ( void  )

Get pending SMU interrupts.

Returns
SMU interrupt sources pending.

Definition at line 414 of file em_smu.h.

References SMU.

__STATIC_INLINE uint32_t SMU_IntGetEnabled ( void  )

Get enabled and pending SMU interrupt flags. Useful for handling more interrupt sources in the same interrupt handler.

Note
Interrupt flags are not cleared by the use of this function.
Returns
Pending and enabled SMU interrupt sources. The return value is the bitwise AND combination of
  • the OR combination of enabled interrupt sources in SMU_IEN register and
  • the OR combination of valid interrupt flags in SMU_IF register.

Definition at line 434 of file em_smu.h.

References SMU.

__STATIC_INLINE void SMU_IntSet ( uint32_t  flags)

Set one or more pending SMU interrupts from SW.

Parameters
[in]flagsSMU interrupt sources to set to pending. Æ

Definition at line 453 of file em_smu.h.

References SMU.

__STATIC_INLINE void SMU_SetPrivilegedAccess ( SMU_Peripheral_TypeDef  peripheral,
bool  privileged 
)

Change the access settings for a peripheral.

Set whether the peripheral can only be accessed from privileged mode

Parameters
[in]peripheralID of the peripheral to change access settings for
[in]privilegedTrue if the peripheral should only be allowed to be accessed from privileged mode, false if the peripheral can be accessed from unprivileged mode.

Definition at line 338 of file em_smu.h.

References BUS_RegBitWrite(), and SMU.