EFM32 Gecko Software Documentation  efm32g-doc-5.1.2
em_usart.h
Go to the documentation of this file.
1 /***************************************************************************/
35 #ifndef EM_USART_H
36 #define EM_USART_H
37 
38 #include "em_device.h"
39 #if defined(USART_COUNT) && (USART_COUNT > 0)
40 
41 #include <stdbool.h>
42 
43 #ifdef __cplusplus
44 extern "C" {
45 #endif
46 
47 /***************************************************************************/
52 /***************************************************************************/
100 /*******************************************************************************
101  ******************************** ENUMS ************************************
102  ******************************************************************************/
103 
105 typedef enum
106 {
107  usartDatabits4 = USART_FRAME_DATABITS_FOUR,
108  usartDatabits5 = USART_FRAME_DATABITS_FIVE,
109  usartDatabits6 = USART_FRAME_DATABITS_SIX,
110  usartDatabits7 = USART_FRAME_DATABITS_SEVEN,
111  usartDatabits8 = USART_FRAME_DATABITS_EIGHT,
112  usartDatabits9 = USART_FRAME_DATABITS_NINE,
113  usartDatabits10 = USART_FRAME_DATABITS_TEN,
114  usartDatabits11 = USART_FRAME_DATABITS_ELEVEN,
115  usartDatabits12 = USART_FRAME_DATABITS_TWELVE,
116  usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN,
117  usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN,
118  usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN,
119  usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN
120 } USART_Databits_TypeDef;
121 
122 
124 typedef enum
125 {
127  usartDisable = 0x0,
128 
130  usartEnableRx = USART_CMD_RXEN,
131 
133  usartEnableTx = USART_CMD_TXEN,
134 
136  usartEnable = (USART_CMD_RXEN | USART_CMD_TXEN)
137 } USART_Enable_TypeDef;
138 
139 
141 typedef enum
142 {
143  usartOVS16 = USART_CTRL_OVS_X16,
144  usartOVS8 = USART_CTRL_OVS_X8,
145  usartOVS6 = USART_CTRL_OVS_X6,
146  usartOVS4 = USART_CTRL_OVS_X4
147 } USART_OVS_TypeDef;
148 
149 
151 typedef enum
152 {
153  usartNoParity = USART_FRAME_PARITY_NONE,
154  usartEvenParity = USART_FRAME_PARITY_EVEN,
155  usartOddParity = USART_FRAME_PARITY_ODD
156 } USART_Parity_TypeDef;
157 
158 
160 typedef enum
161 {
162  usartStopbits0p5 = USART_FRAME_STOPBITS_HALF,
163  usartStopbits1 = USART_FRAME_STOPBITS_ONE,
164  usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF,
165  usartStopbits2 = USART_FRAME_STOPBITS_TWO
166 } USART_Stopbits_TypeDef;
167 
168 
170 typedef enum
171 {
173  usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,
174 
176  usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,
177 
179  usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,
180 
182  usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
183 } USART_ClockMode_TypeDef;
184 
185 
187 typedef enum
188 {
190  usartIrDAPwONE = USART_IRCTRL_IRPW_ONE,
191 
193  usartIrDAPwTWO = USART_IRCTRL_IRPW_TWO,
194 
196  usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,
197 
199  usartIrDAPwFOUR = USART_IRCTRL_IRPW_FOUR
200 } USART_IrDAPw_Typedef;
201 
202 
204 typedef enum
205 {
206  usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0,
207  usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1,
208  usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2,
209  usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3,
210 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH4)
211  usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4,
212 #endif
213 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH5)
214  usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5,
215 #endif
216 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH6)
217  usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6,
218 #endif
219 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH7)
220  usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7,
221 #endif
222 } USART_IrDAPrsSel_Typedef;
223 
224 #if defined(_USART_I2SCTRL_MASK)
225 
226 typedef enum
227 {
228  usartI2sFormatW32D32 = USART_I2SCTRL_FORMAT_W32D32,
229  usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M,
230  usartI2sFormatW32D24 = USART_I2SCTRL_FORMAT_W32D24,
231  usartI2sFormatW32D16 = USART_I2SCTRL_FORMAT_W32D16,
232  usartI2sFormatW32D8 = USART_I2SCTRL_FORMAT_W32D8,
233  usartI2sFormatW16D16 = USART_I2SCTRL_FORMAT_W16D16,
234  usartI2sFormatW16D8 = USART_I2SCTRL_FORMAT_W16D8,
235  usartI2sFormatW8D8 = USART_I2SCTRL_FORMAT_W8D8
236 } USART_I2sFormat_TypeDef;
237 
239 typedef enum
240 {
241  usartI2sJustifyLeft = USART_I2SCTRL_JUSTIFY_LEFT,
242  usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT
243 } USART_I2sJustify_TypeDef;
244 #endif
245 
246 #if defined(_USART_INPUT_MASK)
247 
248 typedef enum
249 {
250  usartPrsRxCh0 = USART_INPUT_RXPRSSEL_PRSCH0,
251  usartPrsRxCh1 = USART_INPUT_RXPRSSEL_PRSCH1,
252  usartPrsRxCh2 = USART_INPUT_RXPRSSEL_PRSCH2,
253  usartPrsRxCh3 = USART_INPUT_RXPRSSEL_PRSCH3,
255 #if defined(USART_INPUT_RXPRSSEL_PRSCH7)
256  usartPrsRxCh4 = USART_INPUT_RXPRSSEL_PRSCH4,
257  usartPrsRxCh5 = USART_INPUT_RXPRSSEL_PRSCH5,
258  usartPrsRxCh6 = USART_INPUT_RXPRSSEL_PRSCH6,
259  usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7,
260 #endif
261 
262 #if defined(USART_INPUT_RXPRSSEL_PRSCH11)
263  usartPrsRxCh8 = USART_INPUT_RXPRSSEL_PRSCH8,
264  usartPrsRxCh9 = USART_INPUT_RXPRSSEL_PRSCH9,
265  usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10,
266  usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11
267 #endif
268 } USART_PrsRxCh_TypeDef;
269 #endif
270 
272 typedef enum
273 {
274  usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0,
275  usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1,
276  usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2,
277  usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3,
279 #if defined(USART_TRIGCTRL_TSEL_PRSCH7)
280  usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4,
281  usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5,
282  usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6,
283  usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7,
284 #endif
285 } USART_PrsTriggerCh_TypeDef;
286 
287 /*******************************************************************************
288  ******************************* STRUCTS ***********************************
289  ******************************************************************************/
290 
292 typedef struct
293 {
295  USART_Enable_TypeDef enable;
296 
301  uint32_t refFreq;
302 
304  uint32_t baudrate;
305 
307  USART_OVS_TypeDef oversampling;
308 
311  USART_Databits_TypeDef databits;
312 
314  USART_Parity_TypeDef parity;
315 
317  USART_Stopbits_TypeDef stopbits;
318 
319 #if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
320 
321  bool mvdis;
322 
324  bool prsRxEnable;
325 
327  USART_PrsRxCh_TypeDef prsRxCh;
328 #endif
329 #if defined(_USART_TIMING_CSHOLD_MASK)
330 
331  bool autoCsEnable;
333  uint8_t autoCsHold;
335  uint8_t autoCsSetup;
336 #endif
337 } USART_InitAsync_TypeDef;
338 
340 typedef struct
341 {
342 #if defined(USART_TRIGCTRL_AUTOTXTEN)
343 
344  bool autoTxTriggerEnable;
345 #endif
346 
347  bool rxTriggerEnable;
349  bool txTriggerEnable;
351  USART_PrsTriggerCh_TypeDef prsTriggerChannel;
352 } USART_PrsTriggerInit_TypeDef;
353 
355 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
356 #define USART_INITASYNC_DEFAULT \
357 { \
358  usartEnable, /* Enable RX/TX when init completed. */ \
359  0, /* Use current configured reference clock for configuring baudrate. */ \
360  115200, /* 115200 bits/s. */ \
361  usartOVS16, /* 16x oversampling. */ \
362  usartDatabits8, /* 8 databits. */ \
363  usartNoParity, /* No parity. */ \
364  usartStopbits1, /* 1 stopbit. */ \
365  false, /* Do not disable majority vote. */ \
366  false, /* Not USART PRS input mode. */ \
367  usartPrsRxCh0, /* PRS channel 0. */ \
368  false, /* Auto CS functionality enable/disable switch */ \
369  0, /* Auto CS Hold cycles */ \
370  0 /* Auto CS Setup cycles */ \
371 }
372 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
373 #define USART_INITASYNC_DEFAULT \
374 { \
375  usartEnable, /* Enable RX/TX when init completed. */ \
376  0, /* Use current configured reference clock for configuring baudrate. */ \
377  115200, /* 115200 bits/s. */ \
378  usartOVS16, /* 16x oversampling. */ \
379  usartDatabits8, /* 8 databits. */ \
380  usartNoParity, /* No parity. */ \
381  usartStopbits1, /* 1 stopbit. */ \
382  false, /* Do not disable majority vote. */ \
383  false, /* Not USART PRS input mode. */ \
384  usartPrsRxCh0 /* PRS channel 0. */ \
385 }
386 #else
387 #define USART_INITASYNC_DEFAULT \
388 { \
389  usartEnable, /* Enable RX/TX when init completed. */ \
390  0, /* Use current configured reference clock for configuring baudrate. */ \
391  115200, /* 115200 bits/s. */ \
392  usartOVS16, /* 16x oversampling. */ \
393  usartDatabits8, /* 8 databits. */ \
394  usartNoParity, /* No parity. */ \
395  usartStopbits1 /* 1 stopbit. */ \
396 }
397 #endif
398 
400 #if defined(USART_TRIGCTRL_AUTOTXTEN)
401 #define USART_INITPRSTRIGGER_DEFAULT \
402 { \
403  false, /* Do not enable autoTX triggering. */ \
404  false, /* Do not enable receive triggering. */ \
405  false, /* Do not enable transmit triggering. */ \
406  usartPrsTriggerCh0 /* Set default channel to zero. */ \
407 }
408 #else
409 #define USART_INITPRSTRIGGER_DEFAULT \
410 { \
411  false, /* Do not enable receive triggering. */ \
412  false, /* Do not enable transmit triggering. */ \
413  usartPrsTriggerCh0 /* Set default channel to zero. */ \
414 }
415 #endif
416 
418 typedef struct
419 {
421  USART_Enable_TypeDef enable;
422 
427  uint32_t refFreq;
428 
430  uint32_t baudrate;
431 
433  USART_Databits_TypeDef databits;
434 
436  bool master;
437 
439  bool msbf;
440 
442  USART_ClockMode_TypeDef clockMode;
443 
444 #if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
445 
446  bool prsRxEnable;
447 
449  USART_PrsRxCh_TypeDef prsRxCh;
450 
453  bool autoTx;
454 #endif
455 #if defined(_USART_TIMING_CSHOLD_MASK)
456 
457  bool autoCsEnable;
459  uint8_t autoCsHold;
461  uint8_t autoCsSetup;
462 #endif
463 } USART_InitSync_TypeDef;
464 
466 #if defined(_USART_TIMING_CSHOLD_MASK)
467 #define USART_INITSYNC_DEFAULT \
468 { \
469  usartEnable, /* Enable RX/TX when init completed. */ \
470  0, /* Use current configured reference clock for configuring baudrate. */ \
471  1000000, /* 1 Mbits/s. */ \
472  usartDatabits8, /* 8 databits. */ \
473  true, /* Master mode. */ \
474  false, /* Send least significant bit first. */ \
475  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
476  false, /* Not USART PRS input mode. */ \
477  usartPrsRxCh0, /* PRS channel 0. */ \
478  false, /* No AUTOTX mode. */ \
479  false, /* No AUTOCS mode */ \
480  0, /* Auto CS Hold cycles */ \
481  0 /* Auto CS Setup cycles */ \
482 }
483 #elif defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
484 #define USART_INITSYNC_DEFAULT \
485 { \
486  usartEnable, /* Enable RX/TX when init completed. */ \
487  0, /* Use current configured reference clock for configuring baudrate. */ \
488  1000000, /* 1 Mbits/s. */ \
489  usartDatabits8, /* 8 databits. */ \
490  true, /* Master mode. */ \
491  false, /* Send least significant bit first. */ \
492  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
493  false, /* Not USART PRS input mode. */ \
494  usartPrsRxCh0, /* PRS channel 0. */ \
495  false /* No AUTOTX mode. */ \
496 }
497 #else
498 #define USART_INITSYNC_DEFAULT \
499 { \
500  usartEnable, /* Enable RX/TX when init completed. */ \
501  0, /* Use current configured reference clock for configuring baudrate. */ \
502  1000000, /* 1 Mbits/s. */ \
503  usartDatabits8, /* 8 databits. */ \
504  true, /* Master mode. */ \
505  false, /* Send least significant bit first. */ \
506  usartClockMode0 /* Clock idle low, sample on rising edge. */ \
507 }
508 #endif
509 
510 
512 typedef struct
513 {
515  USART_InitAsync_TypeDef async;
516 
518  bool irRxInv;
519 
521  bool irFilt;
522 
525  USART_IrDAPw_Typedef irPw;
526 
529  bool irPrsEn;
530 
533  USART_IrDAPrsSel_Typedef irPrsSel;
534 } USART_InitIrDA_TypeDef;
535 
536 
538 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
539 #define USART_INITIRDA_DEFAULT \
540 { \
541  { \
542  usartEnable, /* Enable RX/TX when init completed. */ \
543  0, /* Use current configured reference clock for configuring baudrate. */ \
544  115200, /* 115200 bits/s. */ \
545  usartOVS16, /* 16x oversampling. */ \
546  usartDatabits8, /* 8 databits. */ \
547  usartEvenParity, /* Even parity. */ \
548  usartStopbits1, /* 1 stopbit. */ \
549  false, /* Do not disable majority vote. */ \
550  false, /* Not USART PRS input mode. */ \
551  usartPrsRxCh0, /* PRS channel 0. */ \
552  false, /* Auto CS functionality enable/disable switch */ \
553  0, /* Auto CS Hold cycles */ \
554  0 /* Auto CS Setup cycles */ \
555  }, \
556  false, /* Rx invert disabled. */ \
557  false, /* Filtering disabled. */ \
558  usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
559  false, /* Routing to PRS is disabled. */ \
560  usartIrDAPrsCh0 /* PRS channel 0. */ \
561 }
562 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
563 #define USART_INITIRDA_DEFAULT \
564 { \
565  { \
566  usartEnable, /* Enable RX/TX when init completed. */ \
567  0, /* Use current configured reference clock for configuring baudrate. */ \
568  115200, /* 115200 bits/s. */ \
569  usartOVS16, /* 16x oversampling. */ \
570  usartDatabits8, /* 8 databits. */ \
571  usartEvenParity, /* Even parity. */ \
572  usartStopbits1, /* 1 stopbit. */ \
573  false, /* Do not disable majority vote. */ \
574  false, /* Not USART PRS input mode. */ \
575  usartPrsRxCh0 /* PRS channel 0. */ \
576  }, \
577  false, /* Rx invert disabled. */ \
578  false, /* Filtering disabled. */ \
579  usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
580  false, /* Routing to PRS is disabled. */ \
581  usartIrDAPrsCh0 /* PRS channel 0. */ \
582 }
583 #else
584 #define USART_INITIRDA_DEFAULT \
585 { \
586  { \
587  usartEnable, /* Enable RX/TX when init completed. */ \
588  0, /* Use current configured reference clock for configuring baudrate. */ \
589  115200, /* 115200 bits/s. */ \
590  usartOVS16, /* 16x oversampling. */ \
591  usartDatabits8, /* 8 databits. */ \
592  usartEvenParity, /* Even parity. */ \
593  usartStopbits1 /* 1 stopbit. */ \
594  }, \
595  false, /* Rx invert disabled. */ \
596  false, /* Filtering disabled. */ \
597  usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
598  false, /* Routing to PRS is disabled. */ \
599  usartIrDAPrsCh0 /* PRS channel 0. */ \
600 }
601 #endif
602 
603 #if defined(_USART_I2SCTRL_MASK)
604 
605 typedef struct
606 {
608  USART_InitSync_TypeDef sync;
609 
611  USART_I2sFormat_TypeDef format;
612 
616  bool delay;
617 
619  bool dmaSplit;
620 
622  USART_I2sJustify_TypeDef justify;
623 
625  bool mono;
626 } USART_InitI2s_TypeDef;
627 
628 
630 #if defined(_USART_TIMING_CSHOLD_MASK)
631 #define USART_INITI2S_DEFAULT \
632 { \
633  { \
634  usartEnableTx, /* Enable TX when init completed. */ \
635  0, /* Use current configured reference clock for configuring baudrate. */ \
636  1000000, /* Baudrate 1M bits/s. */ \
637  usartDatabits16, /* 16 databits. */ \
638  true, /* Operate as I2S master. */ \
639  true, /* Most significant bit first. */ \
640  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
641  false, /* Don't enable USARTRx via PRS. */ \
642  usartPrsRxCh0, /* PRS channel selection (dummy). */ \
643  false, /* Disable AUTOTX mode. */ \
644  false, /* No AUTOCS mode */ \
645  0, /* Auto CS Hold cycles */ \
646  0 /* Auto CS Setup cycles */ \
647  }, \
648  usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
649  true, /* Delay on I2S data. */ \
650  false, /* No DMA split. */ \
651  usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
652  false /* Stereo mode. */ \
653 }
654 #else
655 #define USART_INITI2S_DEFAULT \
656 { \
657  { \
658  usartEnableTx, /* Enable TX when init completed. */ \
659  0, /* Use current configured reference clock for configuring baudrate. */ \
660  1000000, /* Baudrate 1M bits/s. */ \
661  usartDatabits16, /* 16 databits. */ \
662  true, /* Operate as I2S master. */ \
663  true, /* Most significant bit first. */ \
664  usartClockMode0, /* Clock idle low, sample on rising edge. */ \
665  false, /* Don't enable USARTRx via PRS. */ \
666  usartPrsRxCh0, /* PRS channel selection (dummy). */ \
667  false /* Disable AUTOTX mode. */ \
668  }, \
669  usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
670  true, /* Delay on I2S data. */ \
671  false, /* No DMA split. */ \
672  usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
673  false /* Stereo mode. */ \
674 }
675 #endif
676 #endif
677 
678 /*******************************************************************************
679  ***************************** PROTOTYPES **********************************
680  ******************************************************************************/
681 
682 void USART_BaudrateAsyncSet(USART_TypeDef *usart,
683  uint32_t refFreq,
684  uint32_t baudrate,
685  USART_OVS_TypeDef ovs);
686 uint32_t USART_BaudrateCalc(uint32_t refFreq,
687  uint32_t clkdiv,
688  bool syncmode,
689  USART_OVS_TypeDef ovs);
690 uint32_t USART_BaudrateGet(USART_TypeDef *usart);
691 void USART_BaudrateSyncSet(USART_TypeDef *usart,
692  uint32_t refFreq,
693  uint32_t baudrate);
694 void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
695 
696 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
697 void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
698 void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init);
699 
700 #if defined(_USART_I2SCTRL_MASK)
701 void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
702 #endif
703 void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);
704 
705 #if defined(DEFAULT_IRDA_USART) || defined(USART0) || ((USART_COUNT == 1) && defined(USART1))
706 /***************************************************************************/
733 __STATIC_INLINE void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
734 {
735 #if defined(DEFAULT_IRDA_USART)
736  USART_TypeDef *usart = DEFAULT_IRDA_USART;
737 #elif (USART_COUNT == 1) && defined(USART1)
738  USART_TypeDef *usart = USART1;
739 #else
740  USART_TypeDef *usart = USART0;
741 #endif
742  USARTn_InitIrDA(usart, init);
743 }
744 #endif
745 
746 /***************************************************************************/
757 __STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
758 {
759  usart->IFC = flags;
760 }
761 
762 
763 /***************************************************************************/
774 __STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
775 {
776  usart->IEN &= ~flags;
777 }
778 
779 
780 /***************************************************************************/
796 __STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
797 {
798  usart->IEN |= flags;
799 }
800 
801 
802 /***************************************************************************/
816 __STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
817 {
818  return usart->IF;
819 }
820 
821 
822 /***************************************************************************/
841 __STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
842 {
843  uint32_t ien;
844 
845  /* Store USARTx->IEN in temporary variable in order to define explicit order
846  * of volatile accesses. */
847  ien = usart->IEN;
848 
849  /* Bitwise AND of pending and enabled interrupts */
850  return usart->IF & ien;
851 }
852 
853 
854 /***************************************************************************/
865 __STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
866 {
867  usart->IFS = flags;
868 }
869 
870 
871 /***************************************************************************/
882 __STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
883 {
884  return usart->STATUS;
885 }
886 
887 void USART_Reset(USART_TypeDef *usart);
888 uint8_t USART_Rx(USART_TypeDef *usart);
889 uint16_t USART_RxDouble(USART_TypeDef *usart);
890 uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
891 uint16_t USART_RxExt(USART_TypeDef *usart);
892 
893 
894 /***************************************************************************/
922 __STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
923 {
924  return (uint8_t)usart->RXDATA;
925 }
926 
927 
928 /***************************************************************************/
960 __STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
961 {
962  return (uint16_t)usart->RXDOUBLE;
963 }
964 
965 
966 /***************************************************************************/
996 __STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
997 {
998  return usart->RXDOUBLEX;
999 }
1000 
1001 
1002 /***************************************************************************/
1031 __STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
1032 {
1033  return (uint16_t)usart->RXDATAX;
1034 }
1035 
1036 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
1037 void USART_Tx(USART_TypeDef *usart, uint8_t data);
1038 void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
1039 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
1040 void USART_TxExt(USART_TypeDef *usart, uint16_t data);
1041 
1042 
1046 #ifdef __cplusplus
1047 }
1048 #endif
1049 
1050 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
1051 #endif /* EM_USART_H */
USART_InitIrDA_TypeDef
Definition: em_usart.h:512
USART_TRIGCTRL_TSEL_PRSCH1
#define USART_TRIGCTRL_TSEL_PRSCH1
Definition: efm32g_usart.h:303
usartOVS6
Definition: em_usart.h:145
USART_CTRL_OVS_X16
#define USART_CTRL_OVS_X16
Definition: efm32g_usart.h:108
USART_InitAsync_TypeDef::stopbits
USART_Stopbits_TypeDef stopbits
Definition: em_usart.h:317
USART_IntGetEnabled
__STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
Get enabled and pending USART interrupt flags. Useful for handling more interrupt sources in the same...
Definition: em_usart.h:841
usartDatabits12
Definition: em_usart.h:115
USART_Tx
void USART_Tx(USART_TypeDef *usart, uint8_t data)
Transmit one 4-9 bit frame.
Definition: em_usart.c:1084
usartPrsTriggerCh1
Definition: em_usart.h:275
usartNoParity
Definition: em_usart.h:153
usartPrsTriggerCh0
Definition: em_usart.h:274
USART_InitIrDA_TypeDef::irFilt
bool irFilt
Definition: em_usart.h:521
usartDatabits11
Definition: em_usart.h:114
USART_IRCTRL_IRPRSSEL_PRSCH7
#define USART_IRCTRL_IRPRSSEL_PRSCH7
Definition: efm32g_usart.h:977
USART_InitSync_TypeDef::baudrate
uint32_t baudrate
Definition: em_usart.h:430
USART_FRAME_DATABITS_EIGHT
#define USART_FRAME_DATABITS_EIGHT
Definition: efm32g_usart.h:255
USART_IRCTRL_IRPRSSEL_PRSCH0
#define USART_IRCTRL_IRPRSSEL_PRSCH0
Definition: efm32g_usart.h:970
USART_PrsTriggerInit_TypeDef::prsTriggerChannel
USART_PrsTriggerCh_TypeDef prsTriggerChannel
Definition: em_usart.h:351
USART_TypeDef
Definition: efm32g_usart.h:41
USART_IRCTRL_IRPRSSEL_PRSCH1
#define USART_IRCTRL_IRPRSSEL_PRSCH1
Definition: efm32g_usart.h:971
USART_TRIGCTRL_TSEL_PRSCH2
#define USART_TRIGCTRL_TSEL_PRSCH2
Definition: efm32g_usart.h:304
USART_FRAME_STOPBITS_ONEANDAHALF
#define USART_FRAME_STOPBITS_ONEANDAHALF
Definition: efm32g_usart.h:284
USART_InitSync
void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init)
Init USART for synchronous mode.
Definition: em_usart.c:640
USART_TRIGCTRL_TSEL_PRSCH7
#define USART_TRIGCTRL_TSEL_PRSCH7
Definition: efm32g_usart.h:309
USART_CMD_TXEN
#define USART_CMD_TXEN
Definition: efm32g_usart.h:334
USART_InitAsync_TypeDef::oversampling
USART_OVS_TypeDef oversampling
Definition: em_usart.h:307
usartIrDAPwTHREE
Definition: em_usart.h:196
usartIrDAPrsCh5
Definition: em_usart.h:214
USART_InitSync_TypeDef
Definition: em_usart.h:418
usartDatabits14
Definition: em_usart.h:117
USART_IntClear
__STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
Clear one or more pending USART interrupts.
Definition: em_usart.h:757
USART_BaudrateSyncSet
void USART_BaudrateSyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate)
Configure USART operating in synchronous mode to use a given baudrate (or as close as possible to spe...
Definition: em_usart.c:480
usartEnable
Definition: em_usart.h:136
usartDisable
Definition: em_usart.h:127
USART_InitAsync_TypeDef
Definition: em_usart.h:292
USART_TypeDef::RXDATAX
__IM uint32_t RXDATAX
Definition: efm32g_usart.h:49
USART_InitAsync_TypeDef::databits
USART_Databits_TypeDef databits
Definition: em_usart.h:311
USART_IRCTRL_IRPRSSEL_PRSCH3
#define USART_IRCTRL_IRPRSSEL_PRSCH3
Definition: efm32g_usart.h:973
USART_Rx
uint8_t USART_Rx(USART_TypeDef *usart)
Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Definition: em_usart.c:923
USART_PrsTriggerInit_TypeDef
Definition: em_usart.h:340
USART_FRAME_DATABITS_FOURTEEN
#define USART_FRAME_DATABITS_FOURTEEN
Definition: efm32g_usart.h:261
usartEnableRx
Definition: em_usart.h:130
USART_InitIrDA_TypeDef::async
USART_InitAsync_TypeDef async
Definition: em_usart.h:515
usartClockMode3
Definition: em_usart.h:182
USART_TypeDef::IF
__IM uint32_t IF
Definition: efm32g_usart.h:59
usartStopbits2
Definition: em_usart.h:165
USART_TxDoubleExt
void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data)
Transmit two 4-9 bit frames, or one 10-16 bit frame with extended control.
Definition: em_usart.c:1156
USART_InitSync_TypeDef::refFreq
uint32_t refFreq
Definition: em_usart.h:427
USART_Stopbits_TypeDef
USART_Stopbits_TypeDef
Definition: em_usart.h:160
usartClockMode1
Definition: em_usart.h:176
USART_IrDAPw_Typedef
USART_IrDAPw_Typedef
Definition: em_usart.h:187
USART_RxDoubleExt
uint32_t USART_RxDoubleExt(USART_TypeDef *usart)
Receive two 4-9 bit frames, or one 10-16 bit frame with extended information.
Definition: em_usart.c:989
USART_BaudrateCalc
uint32_t USART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv, bool syncmode, USART_OVS_TypeDef ovs)
Calculate baudrate for USART/UART given reference frequency, clock division and oversampling rate (if...
Definition: em_usart.c:295
em_device.h
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
usartPrsTriggerCh7
Definition: em_usart.h:283
USART_FRAME_DATABITS_SIXTEEN
#define USART_FRAME_DATABITS_SIXTEEN
Definition: efm32g_usart.h:263
USART_InitIrDA_TypeDef::irPw
USART_IrDAPw_Typedef irPw
Definition: em_usart.h:525
usartDatabits7
Definition: em_usart.h:110
USART_InitAsync_TypeDef::parity
USART_Parity_TypeDef parity
Definition: em_usart.h:314
USART_ClockMode_TypeDef
USART_ClockMode_TypeDef
Definition: em_usart.h:170
USART_TypeDef::IFS
__IOM uint32_t IFS
Definition: efm32g_usart.h:60
usartDatabits6
Definition: em_usart.h:109
usartDatabits8
Definition: em_usart.h:111
USART_IRCTRL_IRPW_FOUR
#define USART_IRCTRL_IRPW_FOUR
Definition: efm32g_usart.h:952
USART_IntEnable
__STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
Enable one or more USART interrupts.
Definition: em_usart.h:796
usartIrDAPrsCh2
Definition: em_usart.h:208
USART_IRCTRL_IRPW_THREE
#define USART_IRCTRL_IRPW_THREE
Definition: efm32g_usart.h:951
USART_InitAsync_TypeDef::enable
USART_Enable_TypeDef enable
Definition: em_usart.h:295
USART_IRCTRL_IRPRSSEL_PRSCH4
#define USART_IRCTRL_IRPRSSEL_PRSCH4
Definition: efm32g_usart.h:974
usartOVS4
Definition: em_usart.h:146
USART_InitIrDA
__STATIC_INLINE void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
Init DEFAULT_IRDA_USART for asynchronous IrDA mode.
Definition: em_usart.h:733
usartDatabits9
Definition: em_usart.h:112
USART_CTRL_CLKPOL_IDLELOW
#define USART_CTRL_CLKPOL_IDLELOW
Definition: efm32g_usart.h:119
USART_PrsTriggerCh_TypeDef
USART_PrsTriggerCh_TypeDef
Definition: em_usart.h:272
usartIrDAPrsCh1
Definition: em_usart.h:207
usartIrDAPrsCh4
Definition: em_usart.h:211
usartIrDAPwFOUR
Definition: em_usart.h:199
USART0
#define USART0
Definition: efm32g890f128.h:344
USART_IRCTRL_IRPW_ONE
#define USART_IRCTRL_IRPW_ONE
Definition: efm32g_usart.h:949
USART_TypeDef::RXDATA
__IM uint32_t RXDATA
Definition: efm32g_usart.h:50
usartEnableTx
Definition: em_usart.h:133
USART_FRAME_DATABITS_SEVEN
#define USART_FRAME_DATABITS_SEVEN
Definition: efm32g_usart.h:253
usartPrsTriggerCh5
Definition: em_usart.h:281
USART_CTRL_CLKPHA_SAMPLETRAILING
#define USART_CTRL_CLKPHA_SAMPLETRAILING
Definition: efm32g_usart.h:129
usartIrDAPrsCh3
Definition: em_usart.h:209
USART_IntGet
__STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
Get pending USART interrupt flags.
Definition: em_usart.h:816
usartDatabits15
Definition: em_usart.h:118
USART_IRCTRL_IRPRSSEL_PRSCH2
#define USART_IRCTRL_IRPRSSEL_PRSCH2
Definition: efm32g_usart.h:972
USART_IrDAPrsSel_Typedef
USART_IrDAPrsSel_Typedef
Definition: em_usart.h:204
USART_FRAME_STOPBITS_TWO
#define USART_FRAME_STOPBITS_TWO
Definition: efm32g_usart.h:285
usartEvenParity
Definition: em_usart.h:154
USART_PrsTriggerInit_TypeDef::rxTriggerEnable
bool rxTriggerEnable
Definition: em_usart.h:347
USART_CTRL_OVS_X6
#define USART_CTRL_OVS_X6
Definition: efm32g_usart.h:110
USART_RxExt
uint16_t USART_RxExt(USART_TypeDef *usart)
Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended information.
Definition: em_usart.c:1022
USART_IntSet
__STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
Set one or more pending USART interrupts from SW.
Definition: em_usart.h:865
USART_InitAsync_TypeDef::refFreq
uint32_t refFreq
Definition: em_usart.h:301
USART_RxDoubleGet
__STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
Receive two 4-8 bit frames, or one 10-16 bit frame.
Definition: em_usart.h:960
usartIrDAPrsCh6
Definition: em_usart.h:217
USART_FRAME_DATABITS_FIFTEEN
#define USART_FRAME_DATABITS_FIFTEEN
Definition: efm32g_usart.h:262
USART_TRIGCTRL_TSEL_PRSCH5
#define USART_TRIGCTRL_TSEL_PRSCH5
Definition: efm32g_usart.h:307
usartIrDAPrsCh0
Definition: em_usart.h:206
usartPrsTriggerCh6
Definition: em_usart.h:282
USART_RxDoubleXGet
__STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
Receive two 4-9 bit frames, or one 10-16 bit frame with extended information.
Definition: em_usart.h:996
USART_TRIGCTRL_TSEL_PRSCH6
#define USART_TRIGCTRL_TSEL_PRSCH6
Definition: efm32g_usart.h:308
USART_InitIrDA_TypeDef::irPrsSel
USART_IrDAPrsSel_Typedef irPrsSel
Definition: em_usart.h:533
USART_Databits_TypeDef
USART_Databits_TypeDef
Definition: em_usart.h:105
USART_TypeDef::IFC
__IOM uint32_t IFC
Definition: efm32g_usart.h:61
USART_TRIGCTRL_TSEL_PRSCH3
#define USART_TRIGCTRL_TSEL_PRSCH3
Definition: efm32g_usart.h:305
usartOddParity
Definition: em_usart.h:155
USART_TRIGCTRL_TSEL_PRSCH0
#define USART_TRIGCTRL_TSEL_PRSCH0
Definition: efm32g_usart.h:302
USART_TypeDef::RXDOUBLE
__IM uint32_t RXDOUBLE
Definition: efm32g_usart.h:52
usartDatabits5
Definition: em_usart.h:108
USART_FRAME_STOPBITS_HALF
#define USART_FRAME_STOPBITS_HALF
Definition: efm32g_usart.h:281
USART_InitSync_TypeDef::clockMode
USART_ClockMode_TypeDef clockMode
Definition: em_usart.h:442
USART_FRAME_PARITY_ODD
#define USART_FRAME_PARITY_ODD
Definition: efm32g_usart.h:273
USART_CTRL_CLKPOL_IDLEHIGH
#define USART_CTRL_CLKPOL_IDLEHIGH
Definition: efm32g_usart.h:120
USART_TypeDef::RXDOUBLEX
__IM uint32_t RXDOUBLEX
Definition: efm32g_usart.h:51
USARTn_InitIrDA
void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init)
Init USART for asynchronous IrDA mode.
Definition: em_usart.c:721
usartClockMode0
Definition: em_usart.h:173
USART_StatusGet
__STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
Get USART STATUS register.
Definition: em_usart.h:882
USART_FRAME_DATABITS_THIRTEEN
#define USART_FRAME_DATABITS_THIRTEEN
Definition: efm32g_usart.h:260
USART_InitSync_TypeDef::enable
USART_Enable_TypeDef enable
Definition: em_usart.h:421
USART_FRAME_STOPBITS_ONE
#define USART_FRAME_STOPBITS_ONE
Definition: efm32g_usart.h:283
USART_TxExt
void USART_TxExt(USART_TypeDef *usart, uint16_t data)
Transmit one 4-9 bit frame with extended control.
Definition: em_usart.c:1184
USART_InitSync_TypeDef::databits
USART_Databits_TypeDef databits
Definition: em_usart.h:433
USART_IntDisable
__STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
Disable one or more USART interrupts.
Definition: em_usart.h:774
USART_Reset
void USART_Reset(USART_TypeDef *usart)
Reset USART/UART to same state as after a HW reset.
Definition: em_usart.c:856
usartDatabits4
Definition: em_usart.h:107
usartOVS8
Definition: em_usart.h:144
usartPrsTriggerCh3
Definition: em_usart.h:277
USART_SpiTransfer
uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data)
Perform one 8 bit frame SPI transfer.
Definition: em_usart.c:1050
USART_FRAME_DATABITS_TWELVE
#define USART_FRAME_DATABITS_TWELVE
Definition: efm32g_usart.h:259
usartIrDAPrsCh7
Definition: em_usart.h:220
USART_PrsTriggerInit_TypeDef::txTriggerEnable
bool txTriggerEnable
Definition: em_usart.h:349
usartDatabits13
Definition: em_usart.h:116
usartDatabits10
Definition: em_usart.h:113
usartPrsTriggerCh2
Definition: em_usart.h:276
USART_FRAME_DATABITS_FOUR
#define USART_FRAME_DATABITS_FOUR
Definition: efm32g_usart.h:250
USART_CTRL_OVS_X4
#define USART_CTRL_OVS_X4
Definition: efm32g_usart.h:111
USART_OVS_TypeDef
USART_OVS_TypeDef
Definition: em_usart.h:141
usartStopbits1
Definition: em_usart.h:163
USART_InitIrDA_TypeDef::irPrsEn
bool irPrsEn
Definition: em_usart.h:529
USART_InitSync_TypeDef::master
bool master
Definition: em_usart.h:436
USART_TRIGCTRL_TSEL_PRSCH4
#define USART_TRIGCTRL_TSEL_PRSCH4
Definition: efm32g_usart.h:306
USART_CMD_RXEN
#define USART_CMD_RXEN
Definition: efm32g_usart.h:324
usartStopbits0p5
Definition: em_usart.h:162
USART_Enable_TypeDef
USART_Enable_TypeDef
Definition: em_usart.h:124
usartPrsTriggerCh4
Definition: em_usart.h:280
usartOVS16
Definition: em_usart.h:143
USART_RxDataXGet
__STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended information.
Definition: em_usart.h:1031
USART_IRCTRL_IRPW_TWO
#define USART_IRCTRL_IRPW_TWO
Definition: efm32g_usart.h:950
USART_InitSync_TypeDef::msbf
bool msbf
Definition: em_usart.h:439
usartDatabits16
Definition: em_usart.h:119
usartIrDAPwTWO
Definition: em_usart.h:193
USART_Enable
void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable)
Enable/disable USART/UART receiver and/or transmitter.
Definition: em_usart.c:527
USART_InitPrsTrigger
void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init)
Initialize automatic transmissions using PRS channel as trigger.
Definition: em_usart.c:816
USART_FRAME_PARITY_NONE
#define USART_FRAME_PARITY_NONE
Definition: efm32g_usart.h:271
USART_CTRL_CLKPHA_SAMPLELEADING
#define USART_CTRL_CLKPHA_SAMPLELEADING
Definition: efm32g_usart.h:128
USART_InitAsync
void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init)
Init USART/UART for normal asynchronous mode.
Definition: em_usart.c:569
USART_InitAsync_TypeDef::baudrate
uint32_t baudrate
Definition: em_usart.h:304
USART_FRAME_PARITY_EVEN
#define USART_FRAME_PARITY_EVEN
Definition: efm32g_usart.h:272
USART_RxDouble
uint16_t USART_RxDouble(USART_TypeDef *usart)
Receive two 4-8 bit frames, or one 10-16 bit frame.
Definition: em_usart.c:956
USART_Parity_TypeDef
USART_Parity_TypeDef
Definition: em_usart.h:151
USART_FRAME_DATABITS_SIX
#define USART_FRAME_DATABITS_SIX
Definition: efm32g_usart.h:252
USART_BaudrateGet
uint32_t USART_BaudrateGet(USART_TypeDef *usart)
Get current baudrate for USART/UART.
Definition: em_usart.c:431
USART_IRCTRL_IRPRSSEL_PRSCH6
#define USART_IRCTRL_IRPRSSEL_PRSCH6
Definition: efm32g_usart.h:976
USART_InitIrDA_TypeDef::irRxInv
bool irRxInv
Definition: em_usart.h:518
USART_CTRL_OVS_X8
#define USART_CTRL_OVS_X8
Definition: efm32g_usart.h:109
usartStopbits1p5
Definition: em_usart.h:164
USART_FRAME_DATABITS_ELEVEN
#define USART_FRAME_DATABITS_ELEVEN
Definition: efm32g_usart.h:258
USART_FRAME_DATABITS_FIVE
#define USART_FRAME_DATABITS_FIVE
Definition: efm32g_usart.h:251
USART_TypeDef::STATUS
__IM uint32_t STATUS
Definition: efm32g_usart.h:47
USART_FRAME_DATABITS_NINE
#define USART_FRAME_DATABITS_NINE
Definition: efm32g_usart.h:256
USART_TypeDef::IEN
__IOM uint32_t IEN
Definition: efm32g_usart.h:62
USART_FRAME_DATABITS_TEN
#define USART_FRAME_DATABITS_TEN
Definition: efm32g_usart.h:257
USART_RxDataGet
__STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Definition: em_usart.h:922
USART_TxDouble
void USART_TxDouble(USART_TypeDef *usart, uint16_t data)
Transmit two 4-9 bit frames, or one 10-16 bit frame.
Definition: em_usart.c:1120
usartClockMode2
Definition: em_usart.h:179
USART_IRCTRL_IRPRSSEL_PRSCH5
#define USART_IRCTRL_IRPRSSEL_PRSCH5
Definition: efm32g_usart.h:975
USART1
#define USART1
Definition: efm32g890f128.h:345
usartIrDAPwONE
Definition: em_usart.h:190
USART_BaudrateAsyncSet
void USART_BaudrateAsyncSet(USART_TypeDef *usart, uint32_t refFreq, uint32_t baudrate, USART_OVS_TypeDef ovs)
Configure USART/UART operating in asynchronous mode to use a given baudrate (or as close as possible ...
Definition: em_usart.c:164