EFM32 Gecko Software Documentation  efm32g-doc-5.1.2
em_gpio.h
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1 /***************************************************************************/
34 #ifndef EM_GPIO_H
35 #define EM_GPIO_H
36 
37 #include "em_device.h"
38 #if defined(GPIO_COUNT) && (GPIO_COUNT > 0)
39 
40 #include <stdbool.h>
41 #include "em_bus.h"
42 #include "em_assert.h"
43 
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47 
48 /***************************************************************************/
53 /***************************************************************************/
58 /*******************************************************************************
59  ******************************* DEFINES ***********************************
60  ******************************************************************************/
61 
63 #if defined( _EFM32_TINY_FAMILY ) || defined( _EFM32_ZERO_FAMILY )
64 
65 #define _GPIO_PORT_A_PIN_COUNT 14
66 #define _GPIO_PORT_B_PIN_COUNT 10
67 #define _GPIO_PORT_C_PIN_COUNT 16
68 #define _GPIO_PORT_D_PIN_COUNT 9
69 #define _GPIO_PORT_E_PIN_COUNT 12
70 #define _GPIO_PORT_F_PIN_COUNT 6
71 #define _GPIO_PORT_G_PIN_COUNT 0
72 #define _GPIO_PORT_H_PIN_COUNT 0
73 #define _GPIO_PORT_I_PIN_COUNT 0
74 #define _GPIO_PORT_J_PIN_COUNT 0
75 #define _GPIO_PORT_K_PIN_COUNT 0
76 
77 #define _GPIO_PORT_A_PIN_MASK 0xF77F
78 #define _GPIO_PORT_B_PIN_MASK 0x79F8
79 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
80 #define _GPIO_PORT_D_PIN_MASK 0x01FF
81 #define _GPIO_PORT_E_PIN_MASK 0xFFF0
82 #define _GPIO_PORT_F_PIN_MASK 0x003F
83 #define _GPIO_PORT_G_PIN_MASK 0x0000
84 #define _GPIO_PORT_H_PIN_MASK 0x0000
85 #define _GPIO_PORT_I_PIN_MASK 0x0000
86 #define _GPIO_PORT_J_PIN_MASK 0x0000
87 #define _GPIO_PORT_K_PIN_MASK 0x0000
88 
89 #elif defined( _EFM32_HAPPY_FAMILY )
90 
91 #define _GPIO_PORT_A_PIN_COUNT 6
92 #define _GPIO_PORT_B_PIN_COUNT 5
93 #define _GPIO_PORT_C_PIN_COUNT 12
94 #define _GPIO_PORT_D_PIN_COUNT 4
95 #define _GPIO_PORT_E_PIN_COUNT 4
96 #define _GPIO_PORT_F_PIN_COUNT 6
97 #define _GPIO_PORT_G_PIN_COUNT 0
98 #define _GPIO_PORT_H_PIN_COUNT 0
99 #define _GPIO_PORT_I_PIN_COUNT 0
100 #define _GPIO_PORT_J_PIN_COUNT 0
101 #define _GPIO_PORT_K_PIN_COUNT 0
102 
103 #define _GPIO_PORT_A_PIN_MASK 0x0707
104 #define _GPIO_PORT_B_PIN_MASK 0x6980
105 #define _GPIO_PORT_C_PIN_MASK 0xEF1F
106 #define _GPIO_PORT_D_PIN_MASK 0x00F0
107 #define _GPIO_PORT_E_PIN_MASK 0x3C00
108 #define _GPIO_PORT_F_PIN_MASK 0x003F
109 #define _GPIO_PORT_G_PIN_MASK 0x0000
110 #define _GPIO_PORT_H_PIN_MASK 0x0000
111 #define _GPIO_PORT_I_PIN_MASK 0x0000
112 #define _GPIO_PORT_J_PIN_MASK 0x0000
113 #define _GPIO_PORT_K_PIN_MASK 0x0000
114 
115 #elif defined( _EFM32_GIANT_FAMILY ) \
116  || defined( _EFM32_WONDER_FAMILY )
117 
118 #define _GPIO_PORT_A_PIN_COUNT 16
119 #define _GPIO_PORT_B_PIN_COUNT 16
120 #define _GPIO_PORT_C_PIN_COUNT 16
121 #define _GPIO_PORT_D_PIN_COUNT 16
122 #define _GPIO_PORT_E_PIN_COUNT 16
123 #define _GPIO_PORT_F_PIN_COUNT 13
124 #define _GPIO_PORT_G_PIN_COUNT 0
125 #define _GPIO_PORT_H_PIN_COUNT 0
126 #define _GPIO_PORT_I_PIN_COUNT 0
127 #define _GPIO_PORT_J_PIN_COUNT 0
128 #define _GPIO_PORT_K_PIN_COUNT 0
129 
130 #define _GPIO_PORT_A_PIN_MASK 0xFFFF
131 #define _GPIO_PORT_B_PIN_MASK 0xFFFF
132 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
133 #define _GPIO_PORT_D_PIN_MASK 0xFFFF
134 #define _GPIO_PORT_E_PIN_MASK 0xFFFF
135 #define _GPIO_PORT_F_PIN_MASK 0x1FFF
136 #define _GPIO_PORT_G_PIN_MASK 0x0000
137 #define _GPIO_PORT_H_PIN_MASK 0x0000
138 #define _GPIO_PORT_I_PIN_MASK 0x0000
139 #define _GPIO_PORT_J_PIN_MASK 0x0000
140 #define _GPIO_PORT_K_PIN_MASK 0x0000
141 
142 #elif defined( _EFM32_GECKO_FAMILY )
143 
144 #define _GPIO_PORT_A_PIN_COUNT 16
145 #define _GPIO_PORT_B_PIN_COUNT 16
146 #define _GPIO_PORT_C_PIN_COUNT 16
147 #define _GPIO_PORT_D_PIN_COUNT 16
148 #define _GPIO_PORT_E_PIN_COUNT 16
149 #define _GPIO_PORT_F_PIN_COUNT 10
150 #define _GPIO_PORT_G_PIN_COUNT 0
151 #define _GPIO_PORT_H_PIN_COUNT 0
152 #define _GPIO_PORT_I_PIN_COUNT 0
153 #define _GPIO_PORT_J_PIN_COUNT 0
154 #define _GPIO_PORT_K_PIN_COUNT 0
155 
156 #define _GPIO_PORT_A_PIN_MASK 0xFFFF
157 #define _GPIO_PORT_B_PIN_MASK 0xFFFF
158 #define _GPIO_PORT_C_PIN_MASK 0xFFFF
159 #define _GPIO_PORT_D_PIN_MASK 0xFFFF
160 #define _GPIO_PORT_E_PIN_MASK 0xFFFF
161 #define _GPIO_PORT_F_PIN_MASK 0x03FF
162 #define _GPIO_PORT_G_PIN_MASK 0x0000
163 #define _GPIO_PORT_H_PIN_MASK 0x0000
164 #define _GPIO_PORT_I_PIN_MASK 0x0000
165 #define _GPIO_PORT_J_PIN_MASK 0x0000
166 #define _GPIO_PORT_K_PIN_MASK 0x0000
167 
168 #elif defined( _SILICON_LABS_GECKO_INTERNAL_SDID_80 ) && defined( _EFR_DEVICE )
169 
170 #define _GPIO_PORT_A_PIN_COUNT 6
171 #define _GPIO_PORT_B_PIN_COUNT 5
172 #define _GPIO_PORT_C_PIN_COUNT 6
173 #define _GPIO_PORT_D_PIN_COUNT 6
174 #define _GPIO_PORT_E_PIN_COUNT 0
175 #define _GPIO_PORT_F_PIN_COUNT 8
176 #define _GPIO_PORT_G_PIN_COUNT 0
177 #define _GPIO_PORT_H_PIN_COUNT 0
178 #define _GPIO_PORT_I_PIN_COUNT 0
179 #define _GPIO_PORT_J_PIN_COUNT 0
180 #define _GPIO_PORT_K_PIN_COUNT 0
181 
182 #define _GPIO_PORT_A_PIN_MASK 0x003F
183 #define _GPIO_PORT_B_PIN_MASK 0xF800
184 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
185 #define _GPIO_PORT_D_PIN_MASK 0xFC00
186 #define _GPIO_PORT_E_PIN_MASK 0x0000
187 #define _GPIO_PORT_F_PIN_MASK 0x00FF
188 #define _GPIO_PORT_G_PIN_MASK 0x0000
189 #define _GPIO_PORT_H_PIN_MASK 0x0000
190 #define _GPIO_PORT_I_PIN_MASK 0x0000
191 #define _GPIO_PORT_J_PIN_MASK 0x0000
192 #define _GPIO_PORT_K_PIN_MASK 0x0000
193 
194 #elif defined( _SILICON_LABS_GECKO_INTERNAL_SDID_80 ) && defined( _EFM_DEVICE )
195 
196 #define _GPIO_PORT_A_PIN_COUNT 6
197 #define _GPIO_PORT_B_PIN_COUNT 5
198 #define _GPIO_PORT_C_PIN_COUNT 6
199 #define _GPIO_PORT_D_PIN_COUNT 7
200 #define _GPIO_PORT_E_PIN_COUNT 0
201 #define _GPIO_PORT_F_PIN_COUNT 8
202 #define _GPIO_PORT_G_PIN_COUNT 0
203 #define _GPIO_PORT_H_PIN_COUNT 0
204 #define _GPIO_PORT_I_PIN_COUNT 0
205 #define _GPIO_PORT_J_PIN_COUNT 0
206 #define _GPIO_PORT_K_PIN_COUNT 0
207 
208 #define _GPIO_PORT_A_PIN_MASK 0x003F
209 #define _GPIO_PORT_B_PIN_MASK 0xF800
210 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
211 #define _GPIO_PORT_D_PIN_MASK 0xFE00
212 #define _GPIO_PORT_E_PIN_MASK 0x0000
213 #define _GPIO_PORT_F_PIN_MASK 0x00FF
214 #define _GPIO_PORT_G_PIN_MASK 0x0000
215 #define _GPIO_PORT_H_PIN_MASK 0x0000
216 #define _GPIO_PORT_I_PIN_MASK 0x0000
217 #define _GPIO_PORT_J_PIN_MASK 0x0000
218 #define _GPIO_PORT_K_PIN_MASK 0x0000
219 
220 #elif defined( _SILICON_LABS_GECKO_INTERNAL_SDID_84 )
221 
222 #define _GPIO_PORT_A_PIN_COUNT 10
223 #define _GPIO_PORT_B_PIN_COUNT 10
224 #define _GPIO_PORT_C_PIN_COUNT 12
225 #define _GPIO_PORT_D_PIN_COUNT 8
226 #define _GPIO_PORT_E_PIN_COUNT 0
227 #define _GPIO_PORT_F_PIN_COUNT 16
228 #define _GPIO_PORT_G_PIN_COUNT 0
229 #define _GPIO_PORT_H_PIN_COUNT 0
230 #define _GPIO_PORT_I_PIN_COUNT 4
231 #define _GPIO_PORT_J_PIN_COUNT 2
232 #define _GPIO_PORT_K_PIN_COUNT 3
233 
234 #define _GPIO_PORT_A_PIN_MASK 0x03FF
235 #define _GPIO_PORT_B_PIN_MASK 0xFFC0
236 #define _GPIO_PORT_C_PIN_MASK 0x0FFF
237 #define _GPIO_PORT_D_PIN_MASK 0xFF00
238 #define _GPIO_PORT_E_PIN_MASK 0x0000
239 #define _GPIO_PORT_F_PIN_MASK 0xFFFF
240 #define _GPIO_PORT_G_PIN_MASK 0x0000
241 #define _GPIO_PORT_H_PIN_MASK 0x0000
242 #define _GPIO_PORT_I_PIN_MASK 0x000F
243 #define _GPIO_PORT_J_PIN_MASK 0xC000
244 #define _GPIO_PORT_K_PIN_MASK 0x0007
245 
246 #elif defined( _SILICON_LABS_GECKO_INTERNAL_SDID_89 )
247 
248 #define _GPIO_PORT_A_PIN_COUNT 6
249 #define _GPIO_PORT_B_PIN_COUNT 5
250 #define _GPIO_PORT_C_PIN_COUNT 6
251 #define _GPIO_PORT_D_PIN_COUNT 6
252 #define _GPIO_PORT_E_PIN_COUNT 0
253 #define _GPIO_PORT_F_PIN_COUNT 8
254 #define _GPIO_PORT_G_PIN_COUNT 0
255 #define _GPIO_PORT_H_PIN_COUNT 0
256 #define _GPIO_PORT_I_PIN_COUNT 0
257 #define _GPIO_PORT_J_PIN_COUNT 0
258 #define _GPIO_PORT_K_PIN_COUNT 0
259 
260 #define _GPIO_PORT_A_PIN_MASK 0x003F
261 #define _GPIO_PORT_B_PIN_MASK 0xF800
262 #define _GPIO_PORT_C_PIN_MASK 0x0FC0
263 #define _GPIO_PORT_D_PIN_MASK 0xFC00
264 #define _GPIO_PORT_E_PIN_MASK 0x0000
265 #define _GPIO_PORT_F_PIN_MASK 0x00FF
266 #define _GPIO_PORT_G_PIN_MASK 0x0000
267 #define _GPIO_PORT_H_PIN_MASK 0x0000
268 #define _GPIO_PORT_I_PIN_MASK 0x0000
269 #define _GPIO_PORT_J_PIN_MASK 0x0000
270 #define _GPIO_PORT_K_PIN_MASK 0x0000
271 
272 #else
273 #warning "Port and pin masks are not defined for this family."
274 #endif
275 
276 #define _GPIO_PORT_SIZE(port) ( \
277  (port) == 0 ? _GPIO_PORT_A_PIN_COUNT : \
278  (port) == 1 ? _GPIO_PORT_B_PIN_COUNT : \
279  (port) == 2 ? _GPIO_PORT_C_PIN_COUNT : \
280  (port) == 3 ? _GPIO_PORT_D_PIN_COUNT : \
281  (port) == 4 ? _GPIO_PORT_E_PIN_COUNT : \
282  (port) == 5 ? _GPIO_PORT_F_PIN_COUNT : \
283  (port) == 6 ? _GPIO_PORT_G_PIN_COUNT : \
284  (port) == 7 ? _GPIO_PORT_H_PIN_COUNT : \
285  (port) == 8 ? _GPIO_PORT_I_PIN_COUNT : \
286  (port) == 9 ? _GPIO_PORT_J_PIN_COUNT : \
287  (port) == 10 ? _GPIO_PORT_K_PIN_COUNT : \
288  0)
289 
290 #define _GPIO_PORT_MASK(port) ( \
291  (port) == 0 ? _GPIO_PORT_A_PIN_MASK : \
292  (port) == 1 ? _GPIO_PORT_B_PIN_MASK : \
293  (port) == 2 ? _GPIO_PORT_C_PIN_MASK : \
294  (port) == 3 ? _GPIO_PORT_D_PIN_MASK : \
295  (port) == 4 ? _GPIO_PORT_E_PIN_MASK : \
296  (port) == 5 ? _GPIO_PORT_F_PIN_MASK : \
297  (port) == 6 ? _GPIO_PORT_G_PIN_MASK : \
298  (port) == 7 ? _GPIO_PORT_H_PIN_MASK : \
299  (port) == 8 ? _GPIO_PORT_I_PIN_MASK : \
300  (port) == 9 ? _GPIO_PORT_J_PIN_MASK : \
301  (port) == 10 ? _GPIO_PORT_K_PIN_MASK : \
302  0)
303 
305 #define GPIO_PORT_VALID(port) ( _GPIO_PORT_MASK(port) )
306 #define GPIO_PORT_PIN_VALID(port, pin) ((( _GPIO_PORT_MASK(port)) >> (pin)) & 0x1 )
307 
308 #if defined(_GPIO_EXTIPINSELL_MASK)
309 
310 #define GPIO_INTNO_PIN_VALID(intNo, pin) \
311  ((intNo & ~_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK) \
312  == (pin & ~_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK))
313 #endif
314 
316 #define GPIO_PIN_MAX 15
317 
319 #if ( _GPIO_PORT_K_PIN_COUNT > 0 )
320 #define GPIO_PORT_MAX 10
321 #elif ( _GPIO_PORT_J_PIN_COUNT > 0 )
322 #define GPIO_PORT_MAX 9
323 #elif ( _GPIO_PORT_I_PIN_COUNT > 0 )
324 #define GPIO_PORT_MAX 8
325 #elif ( _GPIO_PORT_H_PIN_COUNT > 0 )
326 #define GPIO_PORT_MAX 7
327 #elif ( _GPIO_PORT_G_PIN_COUNT > 0 )
328 #define GPIO_PORT_MAX 6
329 #elif ( _GPIO_PORT_F_PIN_COUNT > 0 )
330 #define GPIO_PORT_MAX 5
331 #else
332 #error "Max GPIO port number is undefined for this part."
333 #endif
334 
336 #define GPIO_EXTINTNO_MAX 15
337 
340 /*******************************************************************************
341  ******************************** ENUMS ************************************
342  ******************************************************************************/
343 
345 typedef enum
346 {
347 #if ( _GPIO_PORT_A_PIN_COUNT > 0 )
348  gpioPortA = 0,
349 #endif
350 #if ( _GPIO_PORT_B_PIN_COUNT > 0 )
351  gpioPortB = 1,
352 #endif
353 #if ( _GPIO_PORT_C_PIN_COUNT > 0 )
354  gpioPortC = 2,
355 #endif
356 #if ( _GPIO_PORT_D_PIN_COUNT > 0 )
357  gpioPortD = 3,
358 #endif
359 #if ( _GPIO_PORT_E_PIN_COUNT > 0 )
360  gpioPortE = 4,
361 #endif
362 #if ( _GPIO_PORT_F_PIN_COUNT > 0 )
363  gpioPortF = 5,
364 #endif
365 #if ( _GPIO_PORT_G_PIN_COUNT > 0 )
366  gpioPortG = 6,
367 #endif
368 #if ( _GPIO_PORT_H_PIN_COUNT > 0 )
369  gpioPortH = 7,
370 #endif
371 #if ( _GPIO_PORT_I_PIN_COUNT > 0 )
372  gpioPortI = 8,
373 #endif
374 #if ( _GPIO_PORT_J_PIN_COUNT > 0 )
375  gpioPortJ = 9,
376 #endif
377 #if ( _GPIO_PORT_K_PIN_COUNT > 0 )
378  gpioPortK = 10,
379 #endif
380 } GPIO_Port_TypeDef;
381 
382 #if defined( _GPIO_P_CTRL_DRIVEMODE_MASK )
383 
384 typedef enum
385 {
387  gpioDriveModeStandard = GPIO_P_CTRL_DRIVEMODE_STANDARD,
389  gpioDriveModeLowest = GPIO_P_CTRL_DRIVEMODE_LOWEST,
391  gpioDriveModeHigh = GPIO_P_CTRL_DRIVEMODE_HIGH,
393  gpioDriveModeLow = GPIO_P_CTRL_DRIVEMODE_LOW
394 } GPIO_DriveMode_TypeDef;
395 #endif
396 
397 #if defined( _GPIO_P_CTRL_DRIVESTRENGTH_MASK ) && defined( _GPIO_P_CTRL_DRIVESTRENGTHALT_MASK )
398 
399 typedef enum
400 {
402  gpioDriveStrengthWeakAlternateWeak = GPIO_P_CTRL_DRIVESTRENGTH_WEAK | GPIO_P_CTRL_DRIVESTRENGTHALT_WEAK,
403 
405  gpioDriveStrengthWeakAlternateStrong = GPIO_P_CTRL_DRIVESTRENGTH_WEAK | GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG,
406 
408  gpioDriveStrengthStrongAlternateWeak = GPIO_P_CTRL_DRIVESTRENGTH_STRONG | GPIO_P_CTRL_DRIVESTRENGTHALT_WEAK,
409 
411  gpioDriveStrengthStrongAlternateStrong = GPIO_P_CTRL_DRIVESTRENGTH_STRONG | GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG,
412 } GPIO_DriveStrength_TypeDef;
413 
414 /* Deprecated enums */
415 #define gpioDriveStrengthStrong gpioDriveStrengthStrongAlternateStrong
416 #define gpioDriveStrengthWeak gpioDriveStrengthWeakAlternateWeak
417 #endif
418 
421 typedef enum
422 {
424  gpioModeDisabled = _GPIO_P_MODEL_MODE0_DISABLED,
426  gpioModeInput = _GPIO_P_MODEL_MODE0_INPUT,
428  gpioModeInputPull = _GPIO_P_MODEL_MODE0_INPUTPULL,
430  gpioModeInputPullFilter = _GPIO_P_MODEL_MODE0_INPUTPULLFILTER,
432  gpioModePushPull = _GPIO_P_MODEL_MODE0_PUSHPULL,
433 #if defined( _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE )
434 
435  gpioModePushPullDrive = _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE,
436 #endif
437 #if defined( _GPIO_P_MODEL_MODE0_PUSHPULLALT )
438 
439  gpioModePushPullAlternate = _GPIO_P_MODEL_MODE0_PUSHPULLALT,
440 #endif
441 
442  gpioModeWiredOr = _GPIO_P_MODEL_MODE0_WIREDOR,
444  gpioModeWiredOrPullDown = _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN,
446  gpioModeWiredAnd = _GPIO_P_MODEL_MODE0_WIREDAND,
448  gpioModeWiredAndFilter = _GPIO_P_MODEL_MODE0_WIREDANDFILTER,
450  gpioModeWiredAndPullUp = _GPIO_P_MODEL_MODE0_WIREDANDPULLUP,
452  gpioModeWiredAndPullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER,
453 #if defined( _GPIO_P_MODEL_MODE0_WIREDANDDRIVE )
454 
455  gpioModeWiredAndDrive = _GPIO_P_MODEL_MODE0_WIREDANDDRIVE,
457  gpioModeWiredAndDriveFilter = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER,
459  gpioModeWiredAndDrivePullUp = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP,
461  gpioModeWiredAndDrivePullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER
462 #endif
463 #if defined( _GPIO_P_MODEL_MODE0_WIREDANDALT )
464 
465  gpioModeWiredAndAlternate = _GPIO_P_MODEL_MODE0_WIREDANDALT,
467  gpioModeWiredAndAlternateFilter = _GPIO_P_MODEL_MODE0_WIREDANDALTFILTER,
469  gpioModeWiredAndAlternatePullUp = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP,
471  gpioModeWiredAndAlternatePullUpFilter = _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER,
472 #endif
473 } GPIO_Mode_TypeDef;
474 
475 /*******************************************************************************
476  ***************************** PROTOTYPES **********************************
477  ******************************************************************************/
478 
479 void GPIO_DbgLocationSet(unsigned int location);
480 
481 /***************************************************************************/
493 __STATIC_INLINE void GPIO_DbgSWDClkEnable(bool enable)
494 {
495 #if defined( _GPIO_ROUTE_SWCLKPEN_MASK )
496  BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWCLKPEN_SHIFT, enable);
497 #elif defined( _GPIO_ROUTEPEN_SWCLKTCKPEN_MASK )
498  BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWCLKTCKPEN_SHIFT, enable);
499 #else
500 #warning "ROUTE enable for SWCLK pin is not defined."
501 #endif
502 }
503 
504 /***************************************************************************/
516 __STATIC_INLINE void GPIO_DbgSWDIOEnable(bool enable)
517 {
518 #if defined( _GPIO_ROUTE_SWDIOPEN_MASK )
519  BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWDIOPEN_SHIFT, enable);
520 #elif defined( _GPIO_ROUTEPEN_SWDIOTMSPEN_MASK )
521  BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWDIOTMSPEN_SHIFT, enable);
522 #else
523 #warning "ROUTE enable for SWDIO pin is not defined."
524 #endif
525 }
526 
527 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
528 /***************************************************************************/
541 __STATIC_INLINE void GPIO_DbgSWOEnable(bool enable)
542 {
543 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
544  BUS_RegBitWrite(&(GPIO->ROUTE), _GPIO_ROUTE_SWOPEN_SHIFT, enable);
545 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
546  BUS_RegBitWrite(&(GPIO->ROUTEPEN), _GPIO_ROUTEPEN_SWVPEN_SHIFT, enable);
547 #else
548 #warning "ROUTE enable for SWO/SWV pin is not defined."
549 #endif
550 }
551 #endif
552 
553 #if defined (_GPIO_P_CTRL_DRIVEMODE_MASK)
554 void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode);
555 #endif
556 
557 #if defined( _GPIO_P_CTRL_DRIVESTRENGTH_MASK )
558 void GPIO_DriveStrengthSet(GPIO_Port_TypeDef port, GPIO_DriveStrength_TypeDef strength);
559 #endif
560 
561 # if defined( _GPIO_EM4WUEN_MASK )
562 /**************************************************************************/
570 __STATIC_INLINE void GPIO_EM4DisablePinWakeup(uint32_t pinmask)
571 {
572  EFM_ASSERT((pinmask & ~_GPIO_EM4WUEN_MASK) == 0);
573 
574  GPIO->EM4WUEN &= ~pinmask;
575 }
576 #endif
577 
578 # if defined( _GPIO_EM4WUEN_MASK )
579 void GPIO_EM4EnablePinWakeup(uint32_t pinmask, uint32_t polaritymask);
580 #endif
581 
582 #if defined( _GPIO_EM4WUCAUSE_MASK ) || defined( _GPIO_IF_EM4WU_MASK )
583 /**************************************************************************/
591 __STATIC_INLINE uint32_t GPIO_EM4GetPinWakeupCause(void)
592 {
593 #if defined( _GPIO_EM4WUCAUSE_MASK )
594  return GPIO->EM4WUCAUSE & _GPIO_EM4WUCAUSE_MASK;
595 #else
596  return GPIO->IF & _GPIO_IF_EM4WU_MASK;
597 #endif
598 }
599 #endif
600 
601 #if defined( GPIO_CTRL_EM4RET ) || defined( _EMU_EM4CTRL_EM4IORETMODE_MASK )
602 /**************************************************************************/
616 __STATIC_INLINE void GPIO_EM4SetPinRetention(bool enable)
617 {
618  if (enable)
619  {
620 #if defined( GPIO_CTRL_EM4RET )
621  GPIO->CTRL |= GPIO_CTRL_EM4RET;
622 #else
623  EMU->EM4CTRL = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4IORETMODE_MASK)
624  | EMU_EM4CTRL_EM4IORETMODE_EM4EXIT;
625 #endif
626  }
627  else
628  {
629 #if defined( GPIO_CTRL_EM4RET )
630  GPIO->CTRL &= ~GPIO_CTRL_EM4RET;
631 #else
632  EMU->EM4CTRL = (EMU->EM4CTRL & ~_EMU_EM4CTRL_EM4IORETMODE_MASK)
633  | EMU_EM4CTRL_EM4IORETMODE_DISABLE;
634 #endif
635  }
636 }
637 #endif
638 
639 void GPIO_ExtIntConfig(GPIO_Port_TypeDef port,
640  unsigned int pin,
641  unsigned int intNo,
642  bool risingEdge,
643  bool fallingEdge,
644  bool enable);
645 
646 /***************************************************************************/
662 __STATIC_INLINE void GPIO_InputSenseSet(uint32_t val, uint32_t mask)
663 {
664  GPIO->INSENSE = (GPIO->INSENSE & ~mask) | (val & mask);
665 }
666 
667 /***************************************************************************/
674 __STATIC_INLINE void GPIO_IntClear(uint32_t flags)
675 {
676  GPIO->IFC = flags;
677 }
678 
679 /***************************************************************************/
686 __STATIC_INLINE void GPIO_IntDisable(uint32_t flags)
687 {
688  GPIO->IEN &= ~flags;
689 }
690 
691 /***************************************************************************/
703 __STATIC_INLINE void GPIO_IntEnable(uint32_t flags)
704 {
705  GPIO->IEN |= flags;
706 }
707 
708 /***************************************************************************/
715 __STATIC_INLINE uint32_t GPIO_IntGet(void)
716 {
717  return GPIO->IF;
718 }
719 
720 /***************************************************************************/
735 __STATIC_INLINE uint32_t GPIO_IntGetEnabled(void)
736 {
737  uint32_t tmp;
738 
739  /* Store GPIO->IEN in temporary variable in order to define explicit order
740  * of volatile accesses. */
741  tmp = GPIO->IEN;
742 
743  /* Bitwise AND of pending and enabled interrupts */
744  return GPIO->IF & tmp;
745 }
746 
747 /**************************************************************************/
754 __STATIC_INLINE void GPIO_IntSet(uint32_t flags)
755 {
756  GPIO->IFS = flags;
757 }
758 
759 /***************************************************************************/
763 __STATIC_INLINE void GPIO_Lock(void)
764 {
765  GPIO->LOCK = GPIO_LOCK_LOCKKEY_LOCK;
766 }
767 
768 /***************************************************************************/
781 __STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port,
782  unsigned int pin)
783 {
784  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
785  return BUS_RegBitRead(&GPIO->P[port].DIN, pin);
786 }
787 
788 GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port,
789  unsigned int pin);
790 
791 void GPIO_PinModeSet(GPIO_Port_TypeDef port,
792  unsigned int pin,
793  GPIO_Mode_TypeDef mode,
794  unsigned int out);
795 
796 /***************************************************************************/
811 __STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
812 {
813  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
814 #if defined( _GPIO_P_DOUTCLR_MASK )
815  GPIO->P[port].DOUTCLR = 1 << pin;
816 #else
817  BUS_RegBitWrite(&GPIO->P[port].DOUT, pin, 0);
818 #endif
819 }
820 
821 /***************************************************************************/
834 __STATIC_INLINE unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port,
835  unsigned int pin)
836 {
837  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
838  return BUS_RegBitRead(&GPIO->P[port].DOUT, pin);
839 }
840 
841 /***************************************************************************/
856 __STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
857 {
858  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
859 #if defined( _GPIO_P_DOUTSET_MASK )
860  GPIO->P[port].DOUTSET = 1 << pin;
861 #else
862  BUS_RegBitWrite(&GPIO->P[port].DOUT, pin, 1);
863 #endif
864 }
865 
866 /***************************************************************************/
881 __STATIC_INLINE void GPIO_PinOutToggle(GPIO_Port_TypeDef port, unsigned int pin)
882 {
883  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
884 
885  GPIO->P[port].DOUTTGL = 1 << pin;
886 }
887 
888 /***************************************************************************/
895 __STATIC_INLINE uint32_t GPIO_PortInGet(GPIO_Port_TypeDef port)
896 {
897  EFM_ASSERT(GPIO_PORT_VALID(port));
898 
899  return GPIO->P[port].DIN;
900 }
901 
902 /***************************************************************************/
917 __STATIC_INLINE void GPIO_PortOutClear(GPIO_Port_TypeDef port, uint32_t pins)
918 {
919  EFM_ASSERT(GPIO_PORT_VALID(port));
920 #if defined( _GPIO_P_DOUTCLR_MASK )
921  GPIO->P[port].DOUTCLR = pins;
922 #else
923  BUS_RegMaskedClear(&GPIO->P[port].DOUT, pins);
924 #endif
925 }
926 
927 /***************************************************************************/
937 __STATIC_INLINE uint32_t GPIO_PortOutGet(GPIO_Port_TypeDef port)
938 {
939  EFM_ASSERT(GPIO_PORT_VALID(port));
940 
941  return GPIO->P[port].DOUT;
942 }
943 
944 /***************************************************************************/
959 __STATIC_INLINE void GPIO_PortOutSet(GPIO_Port_TypeDef port, uint32_t pins)
960 {
961  EFM_ASSERT(GPIO_PORT_VALID(port));
962 #if defined( _GPIO_P_DOUTSET_MASK )
963  GPIO->P[port].DOUTSET = pins;
964 #else
965  BUS_RegMaskedSet(&GPIO->P[port].DOUT, pins);
966 #endif
967 }
968 
969 /***************************************************************************/
987 __STATIC_INLINE void GPIO_PortOutSetVal(GPIO_Port_TypeDef port,
988  uint32_t val,
989  uint32_t mask)
990 {
991  EFM_ASSERT(GPIO_PORT_VALID(port));
992 
993  GPIO->P[port].DOUT = (GPIO->P[port].DOUT & ~mask) | (val & mask);
994 }
995 
996 /***************************************************************************/
1011 __STATIC_INLINE void GPIO_PortOutToggle(GPIO_Port_TypeDef port, uint32_t pins)
1012 {
1013  EFM_ASSERT(GPIO_PORT_VALID(port));
1014 
1015  GPIO->P[port].DOUTTGL = pins;
1016 }
1017 
1018 #if defined(_GPIO_P_CTRL_SLEWRATE_MASK)
1019 /***************************************************************************/
1032 __STATIC_INLINE void GPIO_SlewrateSet(GPIO_Port_TypeDef port,
1033  uint32_t slewrate,
1034  uint32_t slewrateAlt)
1035 {
1036  EFM_ASSERT(GPIO_PORT_VALID(port));
1037  EFM_ASSERT(slewrate <= (_GPIO_P_CTRL_SLEWRATE_MASK
1038  >> _GPIO_P_CTRL_SLEWRATE_SHIFT));
1039  EFM_ASSERT(slewrateAlt <= (_GPIO_P_CTRL_SLEWRATEALT_MASK
1040  >> _GPIO_P_CTRL_SLEWRATEALT_SHIFT));
1041 
1042  GPIO->P[port].CTRL = (GPIO->P[port].CTRL
1043  & ~(_GPIO_P_CTRL_SLEWRATE_MASK
1044  | _GPIO_P_CTRL_SLEWRATEALT_MASK))
1045  | (slewrate << _GPIO_P_CTRL_SLEWRATE_SHIFT)
1046  | (slewrateAlt << _GPIO_P_CTRL_SLEWRATEALT_SHIFT);
1047 }
1048 #endif
1049 
1050 /***************************************************************************/
1054 __STATIC_INLINE void GPIO_Unlock(void)
1055 {
1056  GPIO->LOCK = GPIO_LOCK_LOCKKEY_UNLOCK;
1057 }
1058 
1059 /*******************************************************************************
1060  *********************** DEPRECATED PROTOTYPES *****************************
1061  *********************** (will be removed) *****************************
1062  ******************************************************************************/
1063 
1064 /***************************************************************************/
1104 __STATIC_INLINE void GPIO_IntConfig(GPIO_Port_TypeDef port,
1105  unsigned int pin,
1106  bool risingEdge,
1107  bool fallingEdge,
1108  bool enable)
1109 {
1110  GPIO_ExtIntConfig(port, pin, pin, risingEdge, fallingEdge, enable);
1111 }
1112 
1116 #ifdef __cplusplus
1117 }
1118 #endif
1119 
1120 #endif /* defined(GPIO_COUNT) && (GPIO_COUNT > 0) */
1121 #endif /* EM_GPIO_H */
gpioModeInputPull
Definition: em_gpio.h:428
_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER
#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER
Definition: efm32g_gpio.h:98
_GPIO_P_MODEL_MODE0_WIREDANDPULLUP
#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUP
Definition: efm32g_gpio.h:97
GPIO_DbgSWDClkEnable
__STATIC_INLINE void GPIO_DbgSWDClkEnable(bool enable)
Enable/disable serial wire clock pin.
Definition: em_gpio.h:493
gpioModeWiredAndFilter
Definition: em_gpio.h:448
gpioModeWiredAndDrivePullUpFilter
Definition: em_gpio.h:461
GPIO_Port_TypeDef
GPIO_Port_TypeDef
Definition: em_gpio.h:345
GPIO_Unlock
__STATIC_INLINE void GPIO_Unlock(void)
Unlocks the GPIO configuration.
Definition: em_gpio.h:1054
gpioModeWiredAndPullUpFilter
Definition: em_gpio.h:452
em_assert.h
Emlib peripheral API "assert" implementation.
_GPIO_ROUTE_SWDIOPEN_SHIFT
#define _GPIO_ROUTE_SWDIOPEN_SHIFT
Definition: efm32g_gpio.h:1034
GPIO_PortOutToggle
__STATIC_INLINE void GPIO_PortOutToggle(GPIO_Port_TypeDef port, uint32_t pins)
Toggle pins in GPIO port data out register.
Definition: em_gpio.h:1011
_GPIO_P_MODEL_MODE0_WIREDAND
#define _GPIO_P_MODEL_MODE0_WIREDAND
Definition: efm32g_gpio.h:95
em_bus.h
RAM and peripheral bit-field set and clear API.
GPIO_IntGetEnabled
__STATIC_INLINE uint32_t GPIO_IntGetEnabled(void)
Get enabled and pending GPIO interrupt flags. Useful for handling more interrupt sources in the same ...
Definition: em_gpio.h:735
GPIO_PinOutToggle
__STATIC_INLINE void GPIO_PinOutToggle(GPIO_Port_TypeDef port, unsigned int pin)
Toggle a single pin in GPIO port data out register.
Definition: em_gpio.h:881
GPIO_PortOutSet
__STATIC_INLINE void GPIO_PortOutSet(GPIO_Port_TypeDef port, uint32_t pins)
Set bits GPIO data out register to 1.
Definition: em_gpio.h:959
GPIO_IntClear
__STATIC_INLINE void GPIO_IntClear(uint32_t flags)
Clear one or more pending GPIO interrupts.
Definition: em_gpio.h:674
GPIO_PinModeGet
GPIO_Mode_TypeDef GPIO_PinModeGet(GPIO_Port_TypeDef port, unsigned int pin)
Get the mode for a GPIO pin.
Definition: em_gpio.c:329
GPIO_PortOutClear
__STATIC_INLINE void GPIO_PortOutClear(GPIO_Port_TypeDef port, uint32_t pins)
Set bits in DOUT register for a port to 0.
Definition: em_gpio.h:917
em_device.h
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
_GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER
Definition: efm32g_gpio.h:102
BUS_RegBitRead
__STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a peripheral register.
Definition: em_bus.h:187
GPIO_DbgLocationSet
void GPIO_DbgLocationSet(unsigned int location)
Sets the pin location of the debug pins (Serial Wire interface).
Definition: em_gpio.c:83
EMU
#define EMU
Definition: efm32g890f128.h:337
GPIO_PortInGet
__STATIC_INLINE uint32_t GPIO_PortInGet(GPIO_Port_TypeDef port)
Read the pad values for GPIO port.
Definition: em_gpio.h:895
GPIO_LOCK_LOCKKEY_UNLOCK
#define GPIO_LOCK_LOCKKEY_UNLOCK
Definition: efm32g_gpio.h:1080
_GPIO_ROUTE_SWOPEN_SHIFT
#define _GPIO_ROUTE_SWOPEN_SHIFT
Definition: efm32g_gpio.h:1039
gpioModeWiredOrPullDown
Definition: em_gpio.h:444
GPIO_IntDisable
__STATIC_INLINE void GPIO_IntDisable(uint32_t flags)
Disable one or more GPIO interrupts.
Definition: em_gpio.h:686
_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN
#define _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN
Definition: efm32g_gpio.h:94
gpioModeWiredAndPullUp
Definition: em_gpio.h:450
GPIO_ExtIntConfig
void GPIO_ExtIntConfig(GPIO_Port_TypeDef port, unsigned int pin, unsigned int intNo, bool risingEdge, bool fallingEdge, bool enable)
Configure GPIO external pin interrupt.
Definition: em_gpio.c:181
GPIO_Mode_TypeDef
GPIO_Mode_TypeDef
Definition: em_gpio.h:421
GPIO_IntEnable
__STATIC_INLINE void GPIO_IntEnable(uint32_t flags)
Enable one or more GPIO interrupts.
Definition: em_gpio.h:703
gpioDriveModeLowest
Definition: em_gpio.h:389
GPIO_DriveModeSet
void GPIO_DriveModeSet(GPIO_Port_TypeDef port, GPIO_DriveMode_TypeDef mode)
Sets the drive mode for a GPIO port.
Definition: em_gpio.c:106
GPIO_PinModeSet
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
Definition: em_gpio.c:269
GPIO_Lock
__STATIC_INLINE void GPIO_Lock(void)
Locks the GPIO configuration.
Definition: em_gpio.h:763
_GPIO_P_MODEL_MODE0_PUSHPULL
#define _GPIO_P_MODEL_MODE0_PUSHPULL
Definition: efm32g_gpio.h:91
gpioModeDisabled
Definition: em_gpio.h:424
GPIO_PortOutSetVal
__STATIC_INLINE void GPIO_PortOutSetVal(GPIO_Port_TypeDef port, uint32_t val, uint32_t mask)
Set GPIO port data out register.
Definition: em_gpio.h:987
gpioModeWiredAndDrive
Definition: em_gpio.h:455
GPIO_IntSet
__STATIC_INLINE void GPIO_IntSet(uint32_t flags)
Set one or more pending GPIO interrupts from SW.
Definition: em_gpio.h:754
GPIO_PinOutSet
__STATIC_INLINE void GPIO_PinOutSet(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out register to 1.
Definition: em_gpio.h:856
_GPIO_ROUTE_SWCLKPEN_SHIFT
#define _GPIO_ROUTE_SWCLKPEN_SHIFT
Definition: efm32g_gpio.h:1029
GPIO_InputSenseSet
__STATIC_INLINE void GPIO_InputSenseSet(uint32_t val, uint32_t mask)
Enable/disable input sensing.
Definition: em_gpio.h:662
gpioDriveModeStandard
Definition: em_gpio.h:387
_GPIO_P_MODEL_MODE0_PUSHPULLDRIVE
#define _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE
Definition: efm32g_gpio.h:92
GPIO_P_CTRL_DRIVEMODE_LOWEST
#define GPIO_P_CTRL_DRIVEMODE_LOWEST
Definition: efm32g_gpio.h:77
GPIO_IntConfig
__STATIC_INLINE void GPIO_IntConfig(GPIO_Port_TypeDef port, unsigned int pin, bool risingEdge, bool fallingEdge, bool enable)
Configure GPIO interrupt.
Definition: em_gpio.h:1104
GPIO_P_CTRL_DRIVEMODE_LOW
#define GPIO_P_CTRL_DRIVEMODE_LOW
Definition: efm32g_gpio.h:79
GPIO_PinOutGet
__STATIC_INLINE unsigned int GPIO_PinOutGet(GPIO_Port_TypeDef port, unsigned int pin)
Get current setting for a pin in a GPIO port data out register.
Definition: em_gpio.h:834
BUS_RegMaskedSet
__STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr, uint32_t mask)
Perform a masked set operation on peripheral register address.
Definition: em_bus.h:221
_GPIO_P_MODEL_MODE0_DISABLED
#define _GPIO_P_MODEL_MODE0_DISABLED
Definition: efm32g_gpio.h:87
gpioModePushPull
Definition: em_gpio.h:432
_GPIO_P_MODEL_MODE0_INPUTPULL
#define _GPIO_P_MODEL_MODE0_INPUTPULL
Definition: efm32g_gpio.h:89
BUS_RegMaskedClear
__STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr, uint32_t mask)
Perform a masked clear operation on peripheral register address.
Definition: em_bus.h:253
_GPIO_P_MODEL_MODE0_INPUTPULLFILTER
#define _GPIO_P_MODEL_MODE0_INPUTPULLFILTER
Definition: efm32g_gpio.h:90
GPIO
#define GPIO
Definition: efm32g890f128.h:359
GPIO_DbgSWOEnable
__STATIC_INLINE void GPIO_DbgSWOEnable(bool enable)
Enable/Disable serial wire output pin.
Definition: em_gpio.h:541
_GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER
Definition: efm32g_gpio.h:100
GPIO_P_CTRL_DRIVEMODE_STANDARD
#define GPIO_P_CTRL_DRIVEMODE_STANDARD
Definition: efm32g_gpio.h:76
_GPIO_P_MODEL_MODE0_WIREDANDFILTER
#define _GPIO_P_MODEL_MODE0_WIREDANDFILTER
Definition: efm32g_gpio.h:96
gpioDriveModeLow
Definition: em_gpio.h:393
GPIO_IntGet
__STATIC_INLINE uint32_t GPIO_IntGet(void)
Get pending GPIO interrupts.
Definition: em_gpio.h:715
GPIO_LOCK_LOCKKEY_LOCK
#define GPIO_LOCK_LOCKKEY_LOCK
Definition: efm32g_gpio.h:1077
gpioModeInputPullFilter
Definition: em_gpio.h:430
_GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP
Definition: efm32g_gpio.h:101
gpioModeWiredAndDrivePullUp
Definition: em_gpio.h:459
gpioDriveModeHigh
Definition: em_gpio.h:391
gpioModePushPullDrive
Definition: em_gpio.h:435
GPIO_DriveMode_TypeDef
GPIO_DriveMode_TypeDef
Definition: em_gpio.h:384
GPIO_DbgSWDIOEnable
__STATIC_INLINE void GPIO_DbgSWDIOEnable(bool enable)
Enable/disable serial wire data I/O pin.
Definition: em_gpio.h:516
GPIO_PinOutClear
__STATIC_INLINE void GPIO_PinOutClear(GPIO_Port_TypeDef port, unsigned int pin)
Set a single pin in GPIO data out port register to 0.
Definition: em_gpio.h:811
BUS_RegBitWrite
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
Definition: em_bus.h:148
GPIO_P_CTRL_DRIVEMODE_HIGH
#define GPIO_P_CTRL_DRIVEMODE_HIGH
Definition: efm32g_gpio.h:78
gpioModeWiredAnd
Definition: em_gpio.h:446
_GPIO_P_MODEL_MODE0_WIREDOR
#define _GPIO_P_MODEL_MODE0_WIREDOR
Definition: efm32g_gpio.h:93
gpioModeInput
Definition: em_gpio.h:426
GPIO_PinInGet
__STATIC_INLINE unsigned int GPIO_PinInGet(GPIO_Port_TypeDef port, unsigned int pin)
Read the pad value for a single pin in a GPIO port.
Definition: em_gpio.h:781
GPIO_PortOutGet
__STATIC_INLINE uint32_t GPIO_PortOutGet(GPIO_Port_TypeDef port)
Get current setting for a GPIO port data out register.
Definition: em_gpio.h:937
_GPIO_P_MODEL_MODE0_WIREDANDDRIVE
#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVE
Definition: efm32g_gpio.h:99
_GPIO_P_MODEL_MODE0_INPUT
#define _GPIO_P_MODEL_MODE0_INPUT
Definition: efm32g_gpio.h:88
gpioModeWiredAndDriveFilter
Definition: em_gpio.h:457
gpioModeWiredOr
Definition: em_gpio.h:442