34 #if defined( ADC_COUNT ) && ( ADC_COUNT > 0 )
62 #define ADC_REF_VALID(ref) ((ref) == ADC0)
65 #if defined( _SILICON_LABS_32B_SERIES_0 )
66 #define ADC_MAX_CLOCK 13000000
68 #define ADC_MAX_CLOCK 16000000
72 #define ADC_MIN_CLOCK 32000
75 #if defined( _DEVINFO_ADC0CAL0_1V25_GAIN_MASK )
76 #define DEVINFO_ADC0_GAIN1V25_MASK _DEVINFO_ADC0CAL0_1V25_GAIN_MASK
77 #elif defined( _DEVINFO_ADC0CAL0_GAIN1V25_MASK )
78 #define DEVINFO_ADC0_GAIN1V25_MASK _DEVINFO_ADC0CAL0_GAIN1V25_MASK
81 #if defined( _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT )
82 #define DEVINFO_ADC0_GAIN1V25_SHIFT _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT
83 #elif defined( _DEVINFO_ADC0CAL0_GAIN1V25_SHIFT )
84 #define DEVINFO_ADC0_GAIN1V25_SHIFT _DEVINFO_ADC0CAL0_GAIN1V25_SHIFT
87 #if defined( _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK )
88 #define DEVINFO_ADC0_OFFSET1V25_MASK _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK
89 #elif defined( _DEVINFO_ADC0CAL0_OFFSET1V25_MASK )
90 #define DEVINFO_ADC0_OFFSET1V25_MASK _DEVINFO_ADC0CAL0_OFFSET1V25_MASK
93 #if defined( _DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT )
94 #define DEVINFO_ADC0_OFFSET1V25_SHIFT _DEVINFO_ADC0CAL0_1V25_OFFSET_SHIFT
95 #elif defined( _DEVINFO_ADC0CAL0_OFFSET1V25_SHIFT )
96 #define DEVINFO_ADC0_OFFSET1V25_SHIFT _DEVINFO_ADC0CAL0_OFFSET1V25_SHIFT
99 #if defined( _DEVINFO_ADC0CAL0_2V5_GAIN_MASK )
100 #define DEVINFO_ADC0_GAIN2V5_MASK _DEVINFO_ADC0CAL0_2V5_GAIN_MASK
101 #elif defined( _DEVINFO_ADC0CAL0_GAIN2V5_MASK )
102 #define DEVINFO_ADC0_GAIN2V5_MASK _DEVINFO_ADC0CAL0_GAIN2V5_MASK
105 #if defined( _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT )
106 #define DEVINFO_ADC0_GAIN2V5_SHIFT _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT
107 #elif defined( _DEVINFO_ADC0CAL0_GAIN2V5_SHIFT )
108 #define DEVINFO_ADC0_GAIN2V5_SHIFT _DEVINFO_ADC0CAL0_GAIN2V5_SHIFT
111 #if defined( _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK )
112 #define DEVINFO_ADC0_OFFSET2V5_MASK _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK
113 #elif defined( _DEVINFO_ADC0CAL0_OFFSET2V5_MASK )
114 #define DEVINFO_ADC0_OFFSET2V5_MASK _DEVINFO_ADC0CAL0_OFFSET2V5_MASK
117 #if defined( _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT )
118 #define DEVINFO_ADC0_OFFSET2V5_SHIFT _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT
119 #elif defined( _DEVINFO_ADC0CAL0_OFFSET2V5_SHIFT )
120 #define DEVINFO_ADC0_OFFSET2V5_SHIFT _DEVINFO_ADC0CAL0_OFFSET2V5_SHIFT
123 #if defined( _DEVINFO_ADC0CAL1_VDD_GAIN_MASK )
124 #define DEVINFO_ADC0_GAINVDD_MASK _DEVINFO_ADC0CAL1_VDD_GAIN_MASK
125 #elif defined( _DEVINFO_ADC0CAL1_GAINVDD_MASK )
126 #define DEVINFO_ADC0_GAINVDD_MASK _DEVINFO_ADC0CAL1_GAINVDD_MASK
129 #if defined( _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT )
130 #define DEVINFO_ADC0_GAINVDD_SHIFT _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT
131 #elif defined( _DEVINFO_ADC0CAL1_GAINVDD_SHIFT )
132 #define DEVINFO_ADC0_GAINVDD_SHIFT _DEVINFO_ADC0CAL1_GAINVDD_SHIFT
135 #if defined( _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK )
136 #define DEVINFO_ADC0_OFFSETVDD_MASK _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK
137 #elif defined( _DEVINFO_ADC0CAL1_OFFSETVDD_MASK )
138 #define DEVINFO_ADC0_OFFSETVDD_MASK _DEVINFO_ADC0CAL1_OFFSETVDD_MASK
141 #if defined( _DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT )
142 #define DEVINFO_ADC0_OFFSETVDD_SHIFT _DEVINFO_ADC0CAL1_VDD_OFFSET_SHIFT
143 #elif defined( _DEVINFO_ADC0CAL1_OFFSETVDD_SHIFT )
144 #define DEVINFO_ADC0_OFFSETVDD_SHIFT _DEVINFO_ADC0CAL1_OFFSETVDD_SHIFT
147 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK )
148 #define DEVINFO_ADC0_GAIN5VDIFF_MASK _DEVINFO_ADC0CAL1_5VDIFF_GAIN_MASK
149 #elif defined( _DEVINFO_ADC0CAL1_GAIN5VDIFF_MASK )
150 #define DEVINFO_ADC0_GAIN5VDIFF_MASK _DEVINFO_ADC0CAL1_GAIN5VDIFF_MASK
153 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT )
154 #define DEVINFO_ADC0_GAIN5VDIFF_SHIFT _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT
155 #elif defined( _DEVINFO_ADC0CAL1_GAIN5VDIFF_SHIFT )
156 #define DEVINFO_ADC0_GAIN5VDIFF_SHIFT _DEVINFO_ADC0CAL1_GAIN5VDIFF_SHIFT
159 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK )
160 #define DEVINFO_ADC0_OFFSET5VDIFF_MASK _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK
161 #elif defined( _DEVINFO_ADC0CAL1_OFFSET5VDIFF_MASK )
162 #define DEVINFO_ADC0_OFFSET5VDIFF_MASK _DEVINFO_ADC0CAL1_OFFSET5VDIFF_MASK
165 #if defined( _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT )
166 #define DEVINFO_ADC0_OFFSET5VDIFF_SHIFT _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT
167 #elif defined( _DEVINFO_ADC0CAL1_OFFSET5VDIFF_SHIFT )
168 #define DEVINFO_ADC0_OFFSET5VDIFF_SHIFT _DEVINFO_ADC0CAL1_OFFSET5VDIFF_SHIFT
171 #if defined( _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK )
172 #define DEVINFO_ADC0_OFFSET2XVDD_MASK _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK
173 #elif defined( _DEVINFO_ADC0CAL2_OFFSET2XVDD_MASK )
174 #define DEVINFO_ADC0_OFFSET2XVDD_MASK _DEVINFO_ADC0CAL2_OFFSET2XVDD_MASK
177 #if defined( _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT )
178 #define DEVINFO_ADC0_OFFSET2XVDD_SHIFT _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT
179 #elif defined( _DEVINFO_ADC0CAL2_OFFSET2XVDD_SHIFT )
180 #define DEVINFO_ADC0_OFFSET2XVDD_SHIFT _DEVINFO_ADC0CAL2_OFFSET2XVDD_SHIFT
183 #if defined( _SILICON_LABS_32B_SERIES_1 )
184 #define FIX_ADC_TEMP_BIAS_EN
228 #if defined( _ADC_CAL_SCANOFFSETINV_MASK )
229 | _ADC_CAL_SCANOFFSETINV_MASK
237 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
238 | _ADC_CAL_SINGLEOFFSETINV_MASK
243 calReg = adc->
CAL & mask;
249 newCal |= ((
DEVINFO->ADC0CAL0 & DEVINFO_ADC0_GAIN1V25_MASK)
250 >> DEVINFO_ADC0_GAIN1V25_SHIFT)
252 newCal |= ((
DEVINFO->ADC0CAL0 & DEVINFO_ADC0_OFFSET1V25_MASK)
253 >> DEVINFO_ADC0_OFFSET1V25_SHIFT)
255 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
256 newCal |= ((
DEVINFO->ADC0CAL0 & _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_MASK)
257 >> _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_SHIFT)
258 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
263 newCal |= ((
DEVINFO->ADC0CAL0 & DEVINFO_ADC0_GAIN2V5_MASK)
264 >> DEVINFO_ADC0_GAIN2V5_SHIFT)
266 newCal |= ((
DEVINFO->ADC0CAL0 & DEVINFO_ADC0_OFFSET2V5_MASK)
267 >> DEVINFO_ADC0_OFFSET2V5_SHIFT)
269 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
270 newCal |= ((
DEVINFO->ADC0CAL0 & _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_MASK)
271 >> _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_SHIFT)
272 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
277 newCal |= ((
DEVINFO->ADC0CAL1 & DEVINFO_ADC0_GAINVDD_MASK)
278 >> DEVINFO_ADC0_GAINVDD_SHIFT)
280 newCal |= ((
DEVINFO->ADC0CAL1 & DEVINFO_ADC0_OFFSETVDD_MASK)
281 >> DEVINFO_ADC0_OFFSETVDD_SHIFT)
283 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
284 newCal |= ((
DEVINFO->ADC0CAL1 & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK)
285 >> _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_SHIFT)
286 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
291 newCal |= ((
DEVINFO->ADC0CAL1 & DEVINFO_ADC0_GAIN5VDIFF_MASK)
292 >> DEVINFO_ADC0_GAIN5VDIFF_SHIFT)
294 newCal |= ((
DEVINFO->ADC0CAL1 & DEVINFO_ADC0_OFFSET5VDIFF_MASK)
295 >> DEVINFO_ADC0_OFFSET5VDIFF_SHIFT)
297 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
298 newCal |= ((
DEVINFO->ADC0CAL1 & _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_MASK)
299 >> _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_SHIFT)
300 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
306 newCal |= ((
DEVINFO->ADC0CAL2 & DEVINFO_ADC0_OFFSET2XVDD_MASK)
307 >> DEVINFO_ADC0_OFFSET2XVDD_SHIFT)
309 #if defined( _ADC_CAL_SINGLEOFFSETINV_MASK )
310 newCal |= ((
DEVINFO->ADC0CAL2 & _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_MASK)
311 >> _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_SHIFT)
312 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
316 #if defined( _ADC_SINGLECTRLX_VREFSEL_VDDXWATT )
318 newCal |= ((
DEVINFO->ADC0CAL1 & DEVINFO_ADC0_GAINVDD_MASK)
319 >> DEVINFO_ADC0_GAINVDD_SHIFT)
321 newCal |= ((
DEVINFO->ADC0CAL1 & DEVINFO_ADC0_OFFSETVDD_MASK)
322 >> DEVINFO_ADC0_OFFSETVDD_SHIFT)
324 newCal |= ((
DEVINFO->ADC0CAL1 & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK)
325 >> _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_SHIFT)
326 << _ADC_CAL_SINGLEOFFSETINV_SHIFT;
339 adc->
CAL = calReg | (newCal << shift);
376 EFM_ASSERT(ADC_REF_VALID(adc));
386 #if defined(_ADC_CTRL_ADCCLKMODE_MASK)
387 if (
ADC0->CTRL & ADC_CTRL_ADCCLKMODE_SYNC)
415 #if defined( _ADC_CTRL_ADCCLKMODE_MASK )
417 _ADC_CTRL_ADCCLKMODE_MASK | _ADC_CTRL_ASYNCCLKEN_MASK,
418 init->em2ClockConfig);
421 #if defined( _SILICON_LABS_GECKO_INTERNAL_SDID_80 )
428 #if defined( _ADC_SCANINPUTSEL_MASK )
441 scanInit->scanInputConfig.scanInputSel = ADC_SCANINPUTSEL_NONE;
442 scanInit->scanInputConfig.scanInputEn = 0;
445 scanInit->scanInputConfig.scanNegSel = _ADC_SCANNEGSEL_RESETVALUE;
472 ADC_ScanInputGroup_TypeDef inputGroup,
473 ADC_PosSel_TypeDef singleEndedSel)
479 scanInit->
diff =
false;
482 EFM_ASSERT((singleEndedSel <= adcPosSelAPORT0YCH0) || (singleEndedSel >= adcPosSelAPORT0YCH15));
485 newSel = singleEndedSel >> 3;
487 currentSel = (scanInit->scanInputConfig.scanInputSel >> (inputGroup * 8)) & 0xFF;
490 if (currentSel == ADC_SCANINPUTSEL_GROUP_NONE)
492 scanInit->scanInputConfig.scanInputSel &= ~(0xFF << (inputGroup * 8));
493 scanInit->scanInputConfig.scanInputSel |= (newSel << (inputGroup * 8));
495 else if (currentSel == newSel)
506 scanId = (inputGroup * 8) + (singleEndedSel & 0x7);
507 EFM_ASSERT(scanId < 32);
508 scanInit->scanInputConfig.scanInputEn |= 0x1 << scanId;
544 ADC_ScanInputGroup_TypeDef inputGroup,
545 ADC_PosSel_TypeDef posSel,
546 ADC_ScanNegInput_TypeDef negInput)
548 uint32_t negInputRegMask = 0;
549 uint32_t negInputRegShift = 0;
550 uint32_t negInputRegVal = 0;
554 scanId = ADC_ScanSingleEndedInputAdd(scanInit, inputGroup, posSel);
557 scanInit->
diff =
true;
560 if (negInput != adcScanNegInputDefault)
564 negInputRegMask = _ADC_SCANNEGSEL_INPUT0NEGSEL_MASK;
565 negInputRegShift = _ADC_SCANNEGSEL_INPUT0NEGSEL_SHIFT;
566 EFM_ASSERT(inputGroup == 0);
568 else if (scanId == 2)
570 negInputRegMask = _ADC_SCANNEGSEL_INPUT2NEGSEL_MASK;
571 negInputRegShift = _ADC_SCANNEGSEL_INPUT2NEGSEL_SHIFT;
572 EFM_ASSERT(inputGroup == 0);
574 else if (scanId == 4)
576 negInputRegMask = _ADC_SCANNEGSEL_INPUT4NEGSEL_MASK;
577 negInputRegShift = _ADC_SCANNEGSEL_INPUT4NEGSEL_SHIFT;
578 EFM_ASSERT(inputGroup == 0);
580 else if (scanId == 6)
582 negInputRegMask = _ADC_SCANNEGSEL_INPUT6NEGSEL_MASK;
583 negInputRegShift = _ADC_SCANNEGSEL_INPUT6NEGSEL_SHIFT;
584 EFM_ASSERT(inputGroup == 0);
586 else if (scanId == 9)
588 negInputRegMask = _ADC_SCANNEGSEL_INPUT9NEGSEL_MASK;
589 negInputRegShift = _ADC_SCANNEGSEL_INPUT9NEGSEL_SHIFT;
590 EFM_ASSERT(inputGroup == 1);
592 else if (scanId == 11)
594 negInputRegMask = _ADC_SCANNEGSEL_INPUT11NEGSEL_MASK;
595 negInputRegShift = _ADC_SCANNEGSEL_INPUT11NEGSEL_SHIFT;
596 EFM_ASSERT(inputGroup == 1);
598 else if (scanId == 13)
600 negInputRegMask = _ADC_SCANNEGSEL_INPUT13NEGSEL_MASK;
601 negInputRegShift = _ADC_SCANNEGSEL_INPUT13NEGSEL_SHIFT;
602 EFM_ASSERT(inputGroup == 1);
604 else if (scanId == 15)
606 negInputRegMask = _ADC_SCANNEGSEL_INPUT15NEGSEL_MASK;
607 negInputRegShift = _ADC_SCANNEGSEL_INPUT15NEGSEL_SHIFT;
608 EFM_ASSERT(inputGroup == 1);
621 case adcScanNegInput1:
622 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT1;
625 case adcScanNegInput3:
626 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT3;
629 case adcScanNegInput5:
630 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT5;
633 case adcScanNegInput7:
634 negInputRegVal = _ADC_SCANNEGSEL_INPUT0NEGSEL_INPUT7;
643 else if (inputGroup == 1)
648 case adcScanNegInput8:
649 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT8;
652 case adcScanNegInput10:
653 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT10;
656 case adcScanNegInput12:
657 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT12;
660 case adcScanNegInput14:
661 negInputRegVal = _ADC_SCANNEGSEL_INPUT9NEGSEL_INPUT14;
677 scanInit->scanInputConfig.scanNegSel &= ~negInputRegMask;
678 scanInit->scanInputConfig.scanNegSel |= negInputRegVal << negInputRegShift;
714 EFM_ASSERT(ADC_REF_VALID(adc));
720 ADC_LoadDevinfoCal(adc, init->
reference,
true);
723 #if defined ( _ADC_SCANCTRL_PRSSEL_MASK )
727 #if defined ( _ADC_SCANCTRL_INPUTMASK_MASK )
742 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
744 #elif defined( _ADC_SCANINPUTSEL_MASK )
753 #if defined( _SILICON_LABS_GECKO_INTERNAL_SDID_80 )
762 #if defined ( _ADC_SCANCTRLX_VREFSEL_MASK )
763 if (init->
reference & ADC_CTRLX_VREFSEL_REG)
766 tmp |= ADC_SCANCTRL_REF_CONF;
776 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
783 #if defined ( _ADC_SCANCTRLX_MASK )
784 tmp = adc->SCANCTRLX & ~(_ADC_SCANCTRLX_VREFSEL_MASK
785 | _ADC_SCANCTRLX_PRSSEL_MASK
786 | _ADC_SCANCTRLX_FIFOOFACT_MASK);
787 if (init->
reference & ADC_CTRLX_VREFSEL_REG)
789 tmp |= (init->
reference & ~ADC_CTRLX_VREFSEL_REG) << _ADC_SCANCTRLX_VREFSEL_SHIFT;
792 tmp |= init->
prsSel << _ADC_SCANCTRLX_PRSSEL_SHIFT;
794 if (init->fifoOverwrite)
796 tmp |= ADC_SCANCTRLX_FIFOOFACT_OVERWRITE;
799 adc->SCANCTRLX = tmp;
802 #if defined( _ADC_CTRL_SCANDMAWU_MASK )
807 #if defined( _ADC_SCANINPUTSEL_MASK )
811 EFM_ASSERT(init->scanInputConfig.scanInputSel != ADC_SCANINPUTSEL_NONE);
812 adc->SCANINPUTSEL = init->scanInputConfig.scanInputSel;
813 adc->SCANMASK = init->scanInputConfig.scanInputEn;
814 adc->SCANNEGSEL = init->scanInputConfig.scanNegSel;
818 #if defined( _ADC_BUSCONFLICT_MASK )
820 EFM_ASSERT(!(tmp & adc->BUSCONFLICT));
821 EFM_ASSERT(!(adc->
STATUS & _ADC_STATUS_PROGERR_MASK));
858 EFM_ASSERT(ADC_REF_VALID(adc));
864 ADC_LoadDevinfoCal(adc, init->
reference,
false);
867 #if defined( _ADC_SINGLECTRL_PRSSEL_MASK )
871 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
874 #
if defined( _ADC_SINGLECTRL_POSSEL_MASK )
875 | (init->posSel << _ADC_SINGLECTRL_POSSEL_SHIFT)
877 #
if defined( _ADC_SINGLECTRL_NEGSEL_MASK )
878 | (init->negSel << _ADC_SINGLECTRL_NEGSEL_SHIFT)
902 #if defined( _ADC_SINGLECTRL_POSSEL_TEMP )
905 if ((init->posSel == adcPosSelTEMP)
915 #if defined ( _ADC_SINGLECTRLX_MASK )
916 if (init->
reference & ADC_CTRLX_VREFSEL_REG)
919 tmp |= ADC_SINGLECTRL_REF_CONF;
931 #if defined ( _ADC_SINGLECTRLX_VREFSEL_MASK )
932 tmp = adc->SINGLECTRLX & (_ADC_SINGLECTRLX_VREFSEL_MASK
933 | _ADC_SINGLECTRLX_PRSSEL_MASK
934 | _ADC_SINGLECTRLX_FIFOOFACT_MASK);
935 if (init->
reference & ADC_CTRLX_VREFSEL_REG)
937 tmp |= ((init->
reference & ~ADC_CTRLX_VREFSEL_REG) << _ADC_SINGLECTRLX_VREFSEL_SHIFT);
940 tmp |= ((init->
prsSel << _ADC_SINGLECTRLX_PRSSEL_SHIFT));
942 if (init->fifoOverwrite)
944 tmp |= ADC_SINGLECTRLX_FIFOOFACT_OVERWRITE;
947 adc->SINGLECTRLX = tmp;
951 #if defined( _ADC_CTRL_SINGLEDMAWU_MASK )
955 #if defined( _ADC_BIASPROG_GPBIASACC_MASK ) && defined( FIX_ADC_TEMP_BIAS_EN )
956 if (init->posSel == adcPosSelTEMP)
970 #if defined( _ADC_BUSCONFLICT_MASK )
972 EFM_ASSERT(!(tmp & adc->BUSCONFLICT));
973 EFM_ASSERT(!(adc->
STATUS & _ADC_STATUS_PROGERR_MASK));
978 #if defined( _ADC_SCANDATAX_MASK )
996 uint32_t ADC_DataIdScanGet(
ADC_TypeDef *adc, uint32_t *scanId)
1001 scanData = adc->SCANDATAX;
1002 *scanId = (scanData & _ADC_SCANDATAX_SCANINPUTID_MASK) >> _ADC_SCANDATAX_SCANINPUTID_SHIFT;
1003 return (scanData & _ADC_SCANDATAX_DATA_MASK) >> _ADC_SCANDATAX_DATA_SHIFT;
1030 if (adcFreq > ADC_MAX_CLOCK)
1032 adcFreq = ADC_MAX_CLOCK;
1034 else if (adcFreq < ADC_MIN_CLOCK)
1036 adcFreq = ADC_MIN_CLOCK;
1045 ret = (hfperFreq + adcFreq - 1) / adcFreq;
1051 return (uint8_t)ret;
1071 #if defined( _ADC_SINGLECTRLX_MASK )
1072 adc->SINGLECTRLX = _ADC_SINGLECTRLX_RESETVALUE;
1075 #if defined( _ADC_SCANCTRLX_MASK )
1076 adc->SCANCTRLX = _ADC_SCANCTRLX_RESETVALUE;
1082 #if defined( _ADC_SCANMASK_MASK )
1083 adc->SCANMASK = _ADC_SCANMASK_RESETVALUE;
1085 #if defined( _ADC_SCANINPUTSEL_MASK )
1086 adc->SCANINPUTSEL = _ADC_SCANINPUTSEL_RESETVALUE;
1088 #if defined( _ADC_SCANNEGSEL_MASK )
1089 adc->SCANNEGSEL = _ADC_SCANNEGSEL_RESETVALUE;
1093 #if defined( _ADC_SINGLEFIFOCLEAR_MASK )
1094 adc->SINGLEFIFOCLEAR |= ADC_SINGLEFIFOCLEAR_SINGLEFIFOCLEAR;
1095 adc->SCANFIFOCLEAR |= ADC_SCANFIFOCLEAR_SCANFIFOCLEAR;
1102 #if defined( _ADC_SCANINPUTSEL_MASK )
1130 #if defined( _EFM32_GIANT_FAMILY ) || defined( _EFM32_WONDER_FAMILY )
1136 if ( hfperFreq > 32000000 )
1138 hfperFreq = 32000000;
1142 hfperFreq += 999999;
1143 hfperFreq /= 1000000;
1146 return (uint8_t)(hfperFreq - 1);
Clock management unit (CMU) API.
#define _ADC_CAL_SCANOFFSET_SHIFT
#define _ADC_SINGLECTRL_INPUTSEL_SHIFT
#define _ADC_CAL_SINGLEGAIN_MASK
Emlib peripheral API "assert" implementation.
#define _ADC_CTRL_LPFMODE_SHIFT
#define _ADC_SINGLECTRL_AT_MASK
#define _ADC_CAL_SINGLEOFFSET_SHIFT
void ADC_Reset(ADC_TypeDef *adc)
Reset ADC to same state as after a HW reset.
#define _ADC_SCANCTRL_RESETVALUE
#define _ADC_CAL_SCANOFFSET_MASK
ADC_AcqTime_TypeDef acqTime
#define _ADC_CTRL_PRESC_SHIFT
#define ADC_CTRL_TAILGATE
#define _ADC_CTRL_RESETVALUE
__STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
Clear one or more pending ADC interrupts.
#define _ADC_SINGLECTRL_RES_SHIFT
#define _ADC_SCANCTRL_REF_SHIFT
ADC_SingleInput_TypeDef input
#define _ADC_SCANCTRL_RES_SHIFT
#define ADC_SCANCTRL_DIFF
#define ADC_SCANCTRL_PRSEN
#define _ADC_CAL_SCANGAIN_MASK
ADC_PRSSEL_TypeDef prsSel
#define _ADC_CAL_SINGLEOFFSET_MASK
#define _ADC_BIASPROG_RESETVALUE
#define _ADC_SCANCTRL_AT_SHIFT
void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init)
Initialize ADC.
__IOM uint32_t SINGLECTRL
ADC_PRSSEL_TypeDef prsSel
#define ADC_CMD_SINGLESTOP
#define _ADC_CTRL_WARMUPMODE_SHIFT
#define _ADC_SCANCTRL_PRSSEL_SHIFT
uint8_t ADC_TimebaseCalc(uint32_t hfperFreq)
Calculate timebase value in order to get a timebase providing at least 1us.
#define _ADC_CTRL_TIMEBASE_MASK
ADC_Res_TypeDef resolution
#define ADC_SCANCTRL_ADJ_LEFT
#define _ADC_CTRL_LPFMODE_MASK
#define _ADC_CTRL_OVSRSEL_SHIFT
#define ADC_SINGLECTRL_ADJ_LEFT
void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init)
Initialize single ADC sample conversion.
#define ADC_SINGLECTRL_DIFF
#define _ADC_CTRL_PRESC_MASK
#define _ADC_SINGLECTRL_PRSSEL_SHIFT
#define _ADC_CTRL_TIMEBASE_SHIFT
__STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, uint32_t mask, uint32_t val)
Perform peripheral register masked clear and value write.
#define _ADC_CAL_SINGLEGAIN_SHIFT
uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq)
Calculate prescaler value used to determine ADC clock.
ADC_LPFilter_TypeDef lpfMode
void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init)
Initialize ADC scan sequence.
#define _ADC_IEN_RESETVALUE
Analog to Digital Converter (ADC) peripheral API.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
ADC_Ref_TypeDef reference
#define _ADC_SINGLECTRL_AT_SHIFT
#define ADC_SINGLECTRL_REP
#define _ADC_SINGLECTRL_RESETVALUE
ADC_OvsRateSel_TypeDef ovsRateSel
#define _ADC_SINGLECTRL_REF_SHIFT
uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock)
Get clock frequency for a clock point.
ADC_Ref_TypeDef reference
#define ADC_SINGLECTRL_PRSEN
ADC_Res_TypeDef resolution
ADC_AcqTime_TypeDef acqTime
ADC_Warmup_TypeDef warmUpMode