Document API IEC60730 Library
lib
config
sl_iec60730_config.h
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/***************************************************************************/
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#ifndef SL_IEC60730_CONFIG_H
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#define SL_IEC60730_CONFIG_H
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// <<< Use Configuration Wizard in Context Menu >>>
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/**************************************************************************/
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// <h> IEC60730_IRQ
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// <o SL_IEC60730_IRQ_TYPE_VARIABLE> Data type for iec60730_IRQExecCount variables
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// <uint8_t=> uint8_t
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// <uint16_t=> uint16_t
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// <uint32_t=> uint32_t
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// <i> Default: uint8_t
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#define SL_IEC60730_IRQ_TYPE_VARIABLE uint8_t
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// <q SL_IEC60730_IRQ_STATUS_ENABLE> Enable function to get the value of failed irqs
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// <i> Default: 0
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#define SL_IEC60730_IRQ_STATUS_ENABLE 0
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// </h>
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/**************************************************************************/
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// <h> IEC60730_WATCHDOG
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// <q SL_IEC60730_WDOG0_ENABLE> Enable Watchdog 0
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// <i> Default: 1
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#ifndef SL_IEC60730_WDOG0_ENABLE
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#define SL_IEC60730_WDOG0_ENABLE 1
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#endif //SL_IEC60730_WDOG0_ENABLE
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// <q SL_IEC60730_WDOG1_ENABLE> Enable Watchdog 1
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// <i> Default: 0
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#ifndef SL_IEC60730_WDOG1_ENABLE
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#define SL_IEC60730_WDOG1_ENABLE 0
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#endif //SL_IEC60730_WDOG1_ENABLE
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// <q SL_IEC60730_SAVE_STAGE_ENABLE> Enable saving iec60730_watchdog_state to backup RAM on Series 2.
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// <i> Default: 0
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#define SL_IEC60730_SAVE_STAGE_ENABLE 0
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// <q SL_IEC60730_RSTCAUSES_CLEAR_ENABLE> Reset cause flags in the RSTCASUES register.
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// <i> Default: 1
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#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE 1
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// </h>
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/**************************************************************************/
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// <h> IEC60730_SYS_CLOCK
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// <o SL_IEC60730_TEST_CLOCK_MULTIPLIER> Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes
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// <i> Default: 10
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#define SL_IEC60730_TEST_CLOCK_MULTIPLIER 10
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// <o SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ> This value is used to compare with the system clock counter
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// <i> Default: 10
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#define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ 10
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// <o SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE> The tolerance of test
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// <i> Default: 1
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#define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE 1
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// </h>
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/**************************************************************************/
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// <h> IEC60730_VMC
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// <q SL_IEC60730_USE_MARCHX_ENABLE> Enable used the algorithm used in BIST is March-X.
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// <i> Default: 1
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#ifndef SL_IEC60730_USE_MARCHX_ENABLE
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#define SL_IEC60730_USE_MARCHX_ENABLE 1
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#endif // SL_IEC60730_USE_MARCHX_ENABLE
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// <o SL_IEC60730_VAR_BLOCKS_PER_BIST> SL_IEC60730_VAR_BLOCKS_PER_BIST
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// <i> Default: 256
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#define SL_IEC60730_VAR_BLOCKS_PER_BIST 256
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// <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0> Pattern 0 is used for stack overflow
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// <i> Default: (0xEEEEEEEEuL)
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#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0 (0xEEEEEEEEuL)
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// <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1> Pattern 1 is used for stack overflow
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// <i> Default: (0xCCCCCCCCuL)
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#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1 (0xCCCCCCCCuL)
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// <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2> Pattern 2 is used for stack overflow
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// <i> Default: (0xBBBBBBBBuL)
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#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2 (0xBBBBBBBBuL)
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// <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3> Pattern 3 is used for stack overflow
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// <i> Default: (0xDDDDDDDDuL)
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#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3 (0xDDDDDDDDuL)
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// </h>
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/**************************************************************************/
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// <h> IEC60730_IMC
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// <q SL_IEC60730_CRC_DEBUG_ENABLE> Enable debug IMC module
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// <i> Default: 1
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#define SL_IEC60730_CRC_DEBUG_ENABLE 1
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// <o SL_IEC60730_INVAR_BLOCKS_PER_BIST> SL_IEC60730_INVAR_BLOCKS_PER_BIST
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// <i> Default: 512
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#define SL_IEC60730_INVAR_BLOCKS_PER_BIST 512
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// <o SL_IEC60730_FLASH_BLOCK> Definition is size of block of Flash
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// <i> Default: 64
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#define SL_IEC60730_FLASH_BLOCK 64
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// <e SL_IEC60730_CRC_USE_SW_ENABLE> Enable CRC calculation using software instead of hardware
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// <i> Default: 0
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#ifndef SL_IEC60730_CRC_USE_SW_ENABLE
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#define SL_IEC60730_CRC_USE_SW_ENABLE 0
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#endif // SL_IEC60730_CRC_USE_SW_ENABLE
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// <q SL_IEC60730_SW_CRC_TABLE_ENABLE> Enable pre-defined table for calculating CRC
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// <i> Default: 0
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#ifndef SL_IEC60730_SW_CRC_TABLE_ENABLE
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#define SL_IEC60730_SW_CRC_TABLE_ENABLE 0
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#endif // SL_IEC60730_SW_CRC_TABLE_ENABLE
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// </e>
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// <q SL_IEC60730_USE_CRC_32_ENABLE> Enable CRC-32 for calculating the CRC value
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// <i> Default: 0
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#ifndef SL_IEC60730_USE_CRC_32_ENABLE
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#define SL_IEC60730_USE_CRC_32_ENABLE 0
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#endif // SL_IEC60730_USE_CRC_32_ENABLE
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// </h>
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// <<< end of configuration section >>>
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#endif
/* SL_IEC60730_CONFIG_H */
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