EFR32 Mighty Gecko 13 Software Documentation  efr32mg13-doc-5.1.2
bsp_trace.c
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1 /**************************************************************************/
18 #include <stdbool.h>
19 #include "em_device.h"
20 #include "em_gpio.h"
21 #include "em_cmu.h"
22 #include "bsp_trace.h"
23 #include "bsp.h"
24 
25 #if defined( BSP_ETM_TRACE ) && defined( ETM_PRESENT )
26 
27 #if !defined(BSP_TRACE_ETM_CLKLOC)
28 #define BSP_TRACE_ETM_CLKLOC 0
29 #endif
30 #if !defined(BSP_TRACE_ETM_TD0LOC)
31 #define BSP_TRACE_ETM_TD0LOC 0
32 #endif
33 #if !defined(BSP_TRACE_ETM_TD1LOC)
34 #define BSP_TRACE_ETM_TD1LOC 0
35 #endif
36 #if !defined(BSP_TRACE_ETM_TD2LOC)
37 #define BSP_TRACE_ETM_TD2LOC 0
38 #endif
39 #if !defined(BSP_TRACE_ETM_TD3LOC)
40 #define BSP_TRACE_ETM_TD3LOC 0
41 #endif
42 
43 /**************************************************************************/
47 void BSP_TraceEtmSetup(void)
48 {
49  /* Enable peripheral clocks */
53 
54  /* Configure trace output */
55 #if defined(_GPIO_ROUTE_TCLKPEN_MASK)
56  /* Enable Port D, pins 3,4,5,6 for ETM Trace Data output */
57  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE3_MASK) | GPIO_P_MODEL_MODE3_PUSHPULL;
58  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE4_MASK) | GPIO_P_MODEL_MODE4_PUSHPULL;
59  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE5_MASK) | GPIO_P_MODEL_MODE5_PUSHPULL;
60  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE6_MASK) | GPIO_P_MODEL_MODE6_PUSHPULL;
61 
62  /* Enable Port D, pin 7 for DBG_TCLK */
63  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE7_MASK) | GPIO_P_MODEL_MODE7_PUSHPULL;
64 
65  GPIO->ROUTE = GPIO->ROUTE | GPIO_ROUTE_TCLKPEN | GPIO_ROUTE_TD0PEN | GPIO_ROUTE_TD1PEN
66  | GPIO_ROUTE_TD2PEN | GPIO_ROUTE_TD3PEN
67  | GPIO_ROUTE_ETMLOCATION_LOC0;
68 #else
69  /* Enable GPIO Pins for ETM Trace Data output and ETM Clock */
70  GPIO_PinModeSet((GPIO_Port_TypeDef)AF_ETM_TCLK_PORT(BSP_TRACE_ETM_CLKLOC), AF_ETM_TCLK_PIN(BSP_TRACE_ETM_CLKLOC), gpioModePushPull, 0);
71  GPIO_PinModeSet((GPIO_Port_TypeDef)AF_ETM_TD0_PORT(BSP_TRACE_ETM_TD0LOC), AF_ETM_TD0_PIN(BSP_TRACE_ETM_TD0LOC), gpioModePushPull, 0);
72  GPIO_PinModeSet((GPIO_Port_TypeDef)AF_ETM_TD1_PORT(BSP_TRACE_ETM_TD1LOC), AF_ETM_TD1_PIN(BSP_TRACE_ETM_TD1LOC), gpioModePushPull, 0);
73  GPIO_PinModeSet((GPIO_Port_TypeDef)AF_ETM_TD2_PORT(BSP_TRACE_ETM_TD2LOC), AF_ETM_TD2_PIN(BSP_TRACE_ETM_TD2LOC), gpioModePushPull, 0);
74  GPIO_PinModeSet((GPIO_Port_TypeDef)AF_ETM_TD3_PORT(BSP_TRACE_ETM_TD3LOC), AF_ETM_TD3_PIN(BSP_TRACE_ETM_TD3LOC), gpioModePushPull, 0);
75 
76  GPIO->ROUTELOC1 = (BSP_TRACE_ETM_CLKLOC << _GPIO_ROUTELOC1_ETMTCLKLOC_SHIFT)
77  | (BSP_TRACE_ETM_TD0LOC << _GPIO_ROUTELOC1_ETMTD0LOC_SHIFT)
78  | (BSP_TRACE_ETM_TD1LOC << _GPIO_ROUTELOC1_ETMTD1LOC_SHIFT)
79  | (BSP_TRACE_ETM_TD2LOC << _GPIO_ROUTELOC1_ETMTD2LOC_SHIFT)
80  | (BSP_TRACE_ETM_TD3LOC << _GPIO_ROUTELOC1_ETMTD3LOC_SHIFT);
81  GPIO->ROUTEPEN = GPIO->ROUTEPEN
87 #endif
88 }
89 #endif
90 
91 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
92 /**************************************************************************/
99 {
100  uint32_t freq;
101  uint32_t div;
102  /* Enable GPIO clock */
103 #if defined( _CMU_HFPERCLKEN0_GPIO_MASK )
104  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
105 #elif defined( _CMU_HFBUSCLKEN0_GPIO_MASK )
106  CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_GPIO;
107 #endif
108 
109  /* Enable Serial wire output pin */
110 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
111  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
112 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
113  GPIO->ROUTEPEN |= GPIO_ROUTEPEN_SWVPEN;
114 #endif
115 
116  /* Set correct location */
117 #if defined( _GPIO_ROUTE_SWOPEN_MASK )
118  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | BSP_TRACE_SWO_LOCATION;
119 #elif defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
120  GPIO->ROUTELOC0 = (GPIO->ROUTELOC0 & ~(_GPIO_ROUTELOC0_SWVLOC_MASK)) | BSP_TRACE_SWO_LOCATION;
121 #endif
122 
123  /* Enable output on correct pin. */
124  TRACE_ENABLE_PINS();
125 
126  /* Enable debug clock AUXHFRCO */
127  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
128 
129  /* Wait until clock is ready */
130  while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)) ;
131 
132  /* Enable trace in core debug */
133  CoreDebug->DHCSR |= CoreDebug_DHCSR_C_DEBUGEN_Msk;
134  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
135 
136  /* Enable PC and IRQ sampling output */
137  DWT->CTRL = 0x400113FF;
138 
139  /* Set TPIU prescaler for the current debug clock frequency. Target frequency
140  is 875 kHz so we choose a divider that gives us the closest match.
141  Actual divider is TPI->ACPR + 1. */
142  freq = CMU_ClockFreqGet(cmuClock_DBG) + (875000 / 2);
143  div = freq / 875000;
144  TPI->ACPR = div - 1;
145 
146  /* Set protocol to NRZ */
147  TPI->SPPR = 2;
148 
149  /* Disable continuous formatting */
150  TPI->FFCR = 0x100;
151 
152  /* Unlock ITM and output data */
153  ITM->LAR = 0xC5ACCE55;
154  ITM->TCR = 0x10009;
155 
156  /* ITM Channel 0 is used for UART output */
157  ITM->TER |= (1UL << 0);
158 }
159 #endif
160 
161 
162 #if defined( _GPIO_ROUTE_SWOPEN_MASK ) || defined( _GPIO_ROUTEPEN_SWVPEN_MASK )
163 /**************************************************************************/
170 {
171  volatile uint32_t *userData = (uint32_t *) USER_PAGE;
172 
173  /* Check magic "trace" word in user page */
174  if (*userData == 0x00000000UL)
175  {
176  return false;
177  }
178  else
179  {
181  return true;
182  }
183 }
184 #endif
Clock management unit (CMU) API.
#define _GPIO_ROUTELOC1_ETMTD2LOC_SHIFT
Board support package API definitions.
#define GPIO_P_MODEL_MODE7_PUSHPULL
GPIO_Port_TypeDef
Definition: em_gpio.h:345
#define GPIO_P_MODEL_MODE6_PUSHPULL
#define GPIO_ROUTEPEN_SWVPEN
#define GPIO_ROUTEPEN_ETMTD2PEN
#define GPIO_P_MODEL_MODE4_PUSHPULL
#define _GPIO_ROUTELOC1_ETMTD0LOC_SHIFT
#define CMU_STATUS_AUXHFRCORDY
#define GPIO_ROUTEPEN_ETMTCLKPEN
#define GPIO_ROUTEPEN_ETMTD0PEN
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define GPIO_P_MODEL_MODE5_PUSHPULL
#define _GPIO_P_MODEL_MODE7_MASK
SWO Trace API (for eAProfiler)
#define CMU
#define _GPIO_ROUTELOC1_ETMTD3LOC_SHIFT
bool BSP_TraceProfilerSetup(void)
Profiler configuration.
Definition: bsp_trace.c:169
#define _GPIO_P_MODEL_MODE4_MASK
void GPIO_PinModeSet(GPIO_Port_TypeDef port, unsigned int pin, GPIO_Mode_TypeDef mode, unsigned int out)
Set the mode for a GPIO pin.
Definition: em_gpio.c:269
#define CMU_OSCENCMD_AUXHFRCOEN
General Purpose IO (GPIO) peripheral API.
void BSP_TraceSwoSetup(void)
Configure trace output for energyAware Profiler.
Definition: bsp_trace.c:98
void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable)
Enable/disable a clock.
Definition: em_cmu.c:1453
#define CMU_HFBUSCLKEN0_GPIO
#define _GPIO_P_MODEL_MODE5_MASK
void CMU_OscillatorEnable(CMU_Osc_TypeDef osc, bool enable, bool wait)
Enable/disable oscillator.
Definition: em_cmu.c:3594
#define _GPIO_P_MODEL_MODE3_MASK
#define GPIO_P_MODEL_MODE3_PUSHPULL
#define _GPIO_ROUTELOC1_ETMTD1LOC_SHIFT
#define _GPIO_ROUTELOC0_SWVLOC_MASK
#define _GPIO_ROUTELOC1_ETMTCLKLOC_SHIFT
#define GPIO
uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock)
Get clock frequency for a clock point.
Definition: em_cmu.c:1550
#define GPIO_ROUTEPEN_ETMTD3PEN
#define _GPIO_P_MODEL_MODE6_MASK
#define GPIO_ROUTEPEN_ETMTD1PEN