EFR32 Mighty Gecko 1 Software Documentation
efr32mg1-doc-5.1.2
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Definition at line 41 of file efr32mg1p_cmu.h.
Data Fields | |
__IOM uint32_t | ADCCTRL |
__IOM uint32_t | AUXHFRCOCTRL |
__IOM uint32_t | CALCNT |
__IOM uint32_t | CALCTRL |
__IOM uint32_t | CMD |
__IOM uint32_t | CTRL |
__IOM uint32_t | DBGCLKSEL |
__IOM uint32_t | FREEZE |
__IOM uint32_t | HFBUSCLKEN0 |
__IOM uint32_t | HFCLKSEL |
__IM uint32_t | HFCLKSTATUS |
__IOM uint32_t | HFCOREPRESC |
__IOM uint32_t | HFEXPPRESC |
__IOM uint32_t | HFPERCLKEN0 |
__IOM uint32_t | HFPERPRESC |
__IOM uint32_t | HFPRESC |
__IOM uint32_t | HFRCOCTRL |
__IOM uint32_t | HFXOCTRL |
__IOM uint32_t | HFXOCTRL1 |
__IOM uint32_t | HFXOSTARTUPCTRL |
__IOM uint32_t | HFXOSTEADYSTATECTRL |
__IOM uint32_t | HFXOTIMEOUTCTRL |
__IM uint32_t | HFXOTRIMSTATUS |
__IOM uint32_t | IEN |
__IM uint32_t | IF |
__IOM uint32_t | IFC |
__IOM uint32_t | IFS |
__IOM uint32_t | LFACLKEN0 |
__IOM uint32_t | LFACLKSEL |
__IOM uint32_t | LFAPRESC0 |
__IOM uint32_t | LFBCLKEN0 |
__IOM uint32_t | LFBCLKSEL |
__IOM uint32_t | LFBPRESC0 |
__IOM uint32_t | LFECLKEN0 |
__IOM uint32_t | LFECLKSEL |
__IOM uint32_t | LFEPRESC0 |
__IOM uint32_t | LFRCOCTRL |
__IOM uint32_t | LFXOCTRL |
__IOM uint32_t | LOCK |
__IOM uint32_t | OSCENCMD |
__IOM uint32_t | PCNTCTRL |
uint32_t | RESERVED0 [3] |
uint32_t | RESERVED1 [1] |
uint32_t | RESERVED10 [7] |
uint32_t | RESERVED11 [1] |
uint32_t | RESERVED12 [1] |
uint32_t | RESERVED13 [3] |
uint32_t | RESERVED14 [1] |
uint32_t | RESERVED15 [1] |
uint32_t | RESERVED16 [2] |
uint32_t | RESERVED17 [1] |
uint32_t | RESERVED18 [1] |
uint32_t | RESERVED19 [3] |
uint32_t | RESERVED2 [1] |
uint32_t | RESERVED20 [2] |
uint32_t | RESERVED21 [2] |
uint32_t | RESERVED22 [4] |
uint32_t | RESERVED23 [2] |
uint32_t | RESERVED3 [4] |
uint32_t | RESERVED4 [2] |
uint32_t | RESERVED5 [2] |
uint32_t | RESERVED6 [2] |
uint32_t | RESERVED7 [1] |
uint32_t | RESERVED8 [1] |
uint32_t | RESERVED9 [3] |
__IOM uint32_t | ROUTELOC0 |
__IOM uint32_t | ROUTEPEN |
__IM uint32_t | STATUS |
__IM uint32_t | SYNCBUSY |
__IOM uint32_t | ULFRCOCTRL |
__IOM uint32_t CMU_TypeDef::ADCCTRL |
ADC Control Register
Definition at line 120 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::AUXHFRCOCTRL |
AUXHFRCO Control Register
Definition at line 49 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::CALCNT |
Calibration Counter Register
Definition at line 63 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::CALCTRL |
Calibration Control Register
Definition at line 62 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::CMD |
Command Register
Definition at line 66 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::CTRL |
CMU Control Register
Definition at line 43 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::DBGCLKSEL |
Debug Trace Clock Select
Definition at line 68 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::FREEZE |
Freeze Register
Definition at line 115 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFBUSCLKEN0 |
High Frequency Bus Clock Enable Register 0
Definition at line 84 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFCLKSEL |
High Frequency Clock Select Command Register
Definition at line 69 of file efr32mg1p_cmu.h.
__IM uint32_t CMU_TypeDef::HFCLKSTATUS |
HFCLK Status Register
Definition at line 77 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFCOREPRESC |
High Frequency Core Clock Prescaler Register
Definition at line 100 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFEXPPRESC |
High Frequency Export Clock Prescaler Register
Definition at line 104 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFPERCLKEN0 |
High Frequency Peripheral Clock Enable Register 0
Definition at line 87 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFPERPRESC |
High Frequency Peripheral Clock Prescaler Register
Definition at line 101 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFPRESC |
High Frequency Clock Prescaler Register
Definition at line 97 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFRCOCTRL |
HFRCO Control Register
Definition at line 46 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFXOCTRL |
HFXO Control Register
Definition at line 53 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFXOCTRL1 |
HFXO Control 1
Definition at line 54 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFXOSTARTUPCTRL |
HFXO Startup Control
Definition at line 55 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFXOSTEADYSTATECTRL |
HFXO Steady State control
Definition at line 56 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::HFXOTIMEOUTCTRL |
HFXO Timeout Control
Definition at line 57 of file efr32mg1p_cmu.h.
__IM uint32_t CMU_TypeDef::HFXOTRIMSTATUS |
HFXO Trim Status
Definition at line 79 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::IEN |
Interrupt Enable Register
Definition at line 83 of file efr32mg1p_cmu.h.
__IM uint32_t CMU_TypeDef::IF |
Interrupt Flag Register
Definition at line 80 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::IFC |
Interrupt Flag Clear Register
Definition at line 82 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::IFS |
Interrupt Flag Set Register
Definition at line 81 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFACLKEN0 |
Low Frequency A Clock Enable Register 0 (Async Reg)
Definition at line 90 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFACLKSEL |
Low Frequency A Clock Select Register
Definition at line 71 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFAPRESC0 |
Low Frequency A Prescaler Register 0 (Async Reg)
Definition at line 107 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFBCLKEN0 |
Low Frequency B Clock Enable Register 0 (Async Reg)
Definition at line 92 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFBCLKSEL |
Low Frequency B Clock Select Register
Definition at line 72 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFBPRESC0 |
Low Frequency B Prescaler Register 0 (Async Reg)
Definition at line 109 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFECLKEN0 |
Low Frequency E Clock Enable Register 0 (Async Reg)
Definition at line 95 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFECLKSEL |
Low Frequency E Clock Select Register
Definition at line 73 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFEPRESC0 |
Low Frequency E Prescaler Register 0 (Async Reg). When waking up from EM4 make sure EM4UNLATCH in EMU_CMD is set for this to take effect
Definition at line 111 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFRCOCTRL |
LFRCO Control Register
Definition at line 52 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LFXOCTRL |
LFXO Control Register
Definition at line 58 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::LOCK |
Configuration Lock Register
Definition at line 127 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::OSCENCMD |
Oscillator Enable/Disable Command Register
Definition at line 65 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::PCNTCTRL |
PCNT Control Register
Definition at line 117 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED0[3] |
Reserved for future use
Definition at line 45 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED1[1] |
Reserved for future use
Definition at line 48 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED10[7] |
Reserved for future use
Definition at line 89 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED11[1] |
Reserved for future use
Definition at line 91 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED12[1] |
Reserved for future use
Definition at line 94 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED13[3] |
Reserved for future use
Definition at line 96 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED14[1] |
Reserved for future use
Definition at line 99 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED15[1] |
Reserved for future use
Definition at line 103 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED16[2] |
Reserved for future use
Definition at line 106 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED17[1] |
Reserved for future use
Definition at line 108 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED18[1] |
Reserved for future use
Definition at line 110 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED19[3] |
Reserved for future use
Definition at line 113 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED2[1] |
Reserved for future use
Definition at line 51 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED20[2] |
Reserved for future use
Definition at line 116 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED21[2] |
Reserved for future use
Definition at line 119 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED22[4] |
Reserved for future use
Definition at line 122 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED23[2] |
Reserved for future use
Definition at line 126 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED3[4] |
Reserved for future use
Definition at line 61 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED4[2] |
Reserved for future use
Definition at line 64 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED5[2] |
Reserved for future use
Definition at line 67 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED6[2] |
Reserved for future use
Definition at line 70 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED7[1] |
Reserved for future use
Definition at line 75 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED8[1] |
Reserved for future use
Definition at line 78 of file efr32mg1p_cmu.h.
uint32_t CMU_TypeDef::RESERVED9[3] |
Reserved for future use
Definition at line 86 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::ROUTELOC0 |
I/O Routing Location Register
Definition at line 124 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::ROUTEPEN |
I/O Routing Pin Enable Register
Definition at line 123 of file efr32mg1p_cmu.h.
__IM uint32_t CMU_TypeDef::STATUS |
Status Register
Definition at line 76 of file efr32mg1p_cmu.h.
__IM uint32_t CMU_TypeDef::SYNCBUSY |
Synchronization Busy Register
Definition at line 114 of file efr32mg1p_cmu.h.
__IOM uint32_t CMU_TypeDef::ULFRCOCTRL |
ULFRCO Control Register
Definition at line 59 of file efr32mg1p_cmu.h.