EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
em_timer.c
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1 /***************************************************************************/
33 #include "em_timer.h"
34 #if defined(TIMER_COUNT) && (TIMER_COUNT > 0)
35 
36 #include "em_assert.h"
37 
38 /***************************************************************************/
43 /***************************************************************************/
55 /*******************************************************************************
56  ************************** GLOBAL FUNCTIONS *******************************
57  ******************************************************************************/
58 
59 /***************************************************************************/
76 void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init)
77 {
78  EFM_ASSERT(TIMER_REF_VALID(timer));
79 
80  /* Stop timer if specified to be disabled (dosn't hurt if already stopped) */
81  if (!(init->enable))
82  {
83  timer->CMD = TIMER_CMD_STOP;
84  }
85 
86  /* Reset counter */
87  timer->CNT = _TIMER_CNT_RESETVALUE;
88 
89  timer->CTRL = ((uint32_t)(init->prescale) << _TIMER_CTRL_PRESC_SHIFT)
90  | ((uint32_t)(init->clkSel) << _TIMER_CTRL_CLKSEL_SHIFT)
91  | ((uint32_t)(init->fallAction) << _TIMER_CTRL_FALLA_SHIFT)
92  | ((uint32_t)(init->riseAction) << _TIMER_CTRL_RISEA_SHIFT)
93  | ((uint32_t)(init->mode) << _TIMER_CTRL_MODE_SHIFT)
94  | (init->debugRun ? TIMER_CTRL_DEBUGRUN : 0)
95  | (init->dmaClrAct ? TIMER_CTRL_DMACLRACT : 0)
96  | (init->quadModeX4 ? TIMER_CTRL_QDM_X4 : 0)
97  | (init->oneShot ? TIMER_CTRL_OSMEN : 0)
98 
99 #if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
100  | (init->count2x ? TIMER_CTRL_X2CNT : 0)
101  | (init->ati ? TIMER_CTRL_ATI : 0)
102 #endif
103  | (init->sync ? TIMER_CTRL_SYNC : 0);
104 
105  /* Start timer if specified to be enabled (dosn't hurt if already started) */
106  if (init->enable)
107  {
108  timer->CMD = TIMER_CMD_START;
109  }
110 }
111 
112 
113 /***************************************************************************/
131  unsigned int ch,
132  const TIMER_InitCC_TypeDef *init)
133 {
134  EFM_ASSERT(TIMER_REF_VALID(timer));
135  EFM_ASSERT(TIMER_CH_VALID(ch));
136 
137  timer->CC[ch].CTRL =
138  ((uint32_t)(init->eventCtrl) << _TIMER_CC_CTRL_ICEVCTRL_SHIFT)
139  | ((uint32_t)(init->edge) << _TIMER_CC_CTRL_ICEDGE_SHIFT)
140  | ((uint32_t)(init->prsSel) << _TIMER_CC_CTRL_PRSSEL_SHIFT)
141  | ((uint32_t)(init->cufoa) << _TIMER_CC_CTRL_CUFOA_SHIFT)
142  | ((uint32_t)(init->cofoa) << _TIMER_CC_CTRL_COFOA_SHIFT)
143  | ((uint32_t)(init->cmoa) << _TIMER_CC_CTRL_CMOA_SHIFT)
144  | ((uint32_t)(init->mode) << _TIMER_CC_CTRL_MODE_SHIFT)
145  | (init->filter ? TIMER_CC_CTRL_FILT_ENABLE : 0)
146  | (init->prsInput ? TIMER_CC_CTRL_INSEL_PRS : 0)
147  | (init->coist ? TIMER_CC_CTRL_COIST : 0)
148  | (init->outInvert ? TIMER_CC_CTRL_OUTINV : 0);
149 }
150 
151 
152 #if defined(_TIMER_DTCTRL_MASK)
153 /***************************************************************************/
164 {
165  EFM_ASSERT(TIMER0 == timer);
166 
167  /* Make sure the DTI unit is disabled while initializing. */
168  TIMER_EnableDTI (timer, false);
169 
170  /* Setup the DTCTRL register.
171  The enable bit will be set at the end of the function if specified. */
172  timer->DTCTRL =
173  (init->autoRestart ? TIMER_DTCTRL_DTDAS : 0)
174  | (init->activeLowOut ? TIMER_DTCTRL_DTIPOL : 0)
176  | (init->enablePrsSource ? TIMER_DTCTRL_DTPRSEN : 0)
177  | ((uint32_t)(init->prsSel) << _TIMER_DTCTRL_DTPRSSEL_SHIFT);
178 
179  /* Setup the DTTIME register. */
180  timer->DTTIME =
181  ((uint32_t)(init->prescale) << _TIMER_DTTIME_DTPRESC_SHIFT)
182  | ((uint32_t)(init->riseTime) << _TIMER_DTTIME_DTRISET_SHIFT)
183  | ((uint32_t)(init->fallTime) << _TIMER_DTTIME_DTFALLT_SHIFT);
184 
185  /* Setup the DTFC register. */
186  timer->DTFC =
191  | ((uint32_t)(init->faultAction) << _TIMER_DTFC_DTFA_SHIFT)
192  | ((uint32_t)(init->faultSourcePrsSel0) << _TIMER_DTFC_DTPRS0FSEL_SHIFT)
193  | ((uint32_t)(init->faultSourcePrsSel1) << _TIMER_DTFC_DTPRS1FSEL_SHIFT);
194 
195  /* Setup the DTOGEN register. */
196  timer->DTOGEN = init->outputsEnableMask;
197 
198  /* Clear any previous DTI faults. */
199  TIMER_ClearDTIFault(timer, TIMER_GetDTIFault(timer));
200 
201  /* Enable/disable before returning. */
202  TIMER_EnableDTI (timer, init->enable);
203 }
204 #endif
205 
206 
207 /***************************************************************************/
219 {
220  int i;
221 
222  EFM_ASSERT(TIMER_REF_VALID(timer));
223 
224  /* Make sure disabled first, before resetting other registers */
225  timer->CMD = TIMER_CMD_STOP;
226 
227  timer->CTRL = _TIMER_CTRL_RESETVALUE;
228  timer->IEN = _TIMER_IEN_RESETVALUE;
229  timer->IFC = _TIMER_IFC_MASK;
230  timer->TOPB = _TIMER_TOPB_RESETVALUE;
231  /* Write TOP after TOPB to invalidate TOPB (clear TIMER_STATUS_TOPBV) */
232  timer->TOP = _TIMER_TOP_RESETVALUE;
233  timer->CNT = _TIMER_CNT_RESETVALUE;
234  /* Do not reset route register, setting should be done independently */
235  /* (Note: ROUTE register may be locked by DTLOCK register.) */
236 
237  for (i = 0; TIMER_CH_VALID(i); i++)
238  {
239  timer->CC[i].CTRL = _TIMER_CC_CTRL_RESETVALUE;
240  timer->CC[i].CCV = _TIMER_CC_CCV_RESETVALUE;
241  timer->CC[i].CCVB = _TIMER_CC_CCVB_RESETVALUE;
242  }
243 
244  /* Reset dead time insertion module, no effect on timers without DTI */
245 
246 #if defined(TIMER_DTLOCK_LOCKKEY_UNLOCK)
247  /* Unlock DTI registers first in case locked */
249 
252  timer->DTFC = _TIMER_DTFC_RESETVALUE;
255 #endif
256 }
257 
258 
261 #endif /* defined(TIMER_COUNT) && (TIMER_COUNT > 0) */
uint32_t outputsEnableMask
Definition: em_timer.h:432
#define _TIMER_CC_CTRL_CMOA_SHIFT
#define _TIMER_CC_CTRL_RESETVALUE
__IOM uint32_t TOP
#define _TIMER_DTFC_DTPRS1FSEL_SHIFT
TIMER_ClkSel_TypeDef clkSel
Definition: em_timer.h:266
#define _TIMER_CC_CTRL_ICEDGE_SHIFT
#define _TIMER_IEN_RESETVALUE
bool enableFaultSourcePrsSel0
Definition: em_timer.h:441
TIMER_OutputAction_TypeDef cufoa
Definition: em_timer.h:350
Emlib peripheral API "assert" implementation.
TIMER_PRSSEL_TypeDef faultSourcePrsSel0
Definition: em_timer.h:444
void TIMER_Reset(TIMER_TypeDef *timer)
Reset TIMER to same state as after a HW reset.
Definition: em_timer.c:218
__IOM uint32_t DTTIME
TIMER_InputAction_TypeDef fallAction
Definition: em_timer.h:278
#define _TIMER_CTRL_PRESC_SHIFT
#define TIMER_DTFC_DTDBGFEN
#define _TIMER_DTFAULTC_MASK
#define _TIMER_CC_CTRL_PRSSEL_SHIFT
#define TIMER_CTRL_X2CNT
#define TIMER_CMD_STOP
__IOM uint32_t TOPB
#define _TIMER_DTTIME_DTPRESC_SHIFT
#define _TIMER_DTTIME_DTRISET_SHIFT
Timer/counter (TIMER) peripheral API.
#define _TIMER_CTRL_CLKSEL_SHIFT
TIMER_Mode_TypeDef mode
Definition: em_timer.h:284
__STATIC_INLINE void TIMER_EnableDTI(TIMER_TypeDef *timer, bool enable)
Enable or disable DTI unit.
Definition: em_timer.h:693
TIMER_CCMode_TypeDef mode
Definition: em_timer.h:359
#define TIMER_DTCTRL_DTPRSEN
void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init)
Initialize the TIMER DTI unit.
Definition: em_timer.c:163
#define TIMER_CTRL_QDM_X4
#define TIMER_DTCTRL_DTDAS
__IOM uint32_t DTOGEN
#define TIMER_DTLOCK_LOCKKEY_UNLOCK
#define _TIMER_IFC_MASK
#define TIMER_CC_CTRL_COIST
#define TIMER_DTFC_DTLOCKUPFEN
#define _TIMER_CC_CTRL_ICEVCTRL_SHIFT
TIMER_PRSSEL_TypeDef prsSel
Definition: em_timer.h:347
#define _TIMER_DTFC_DTPRS0FSEL_SHIFT
#define TIMER0
#define _TIMER_DTOGEN_RESETVALUE
TIMER_Edge_TypeDef edge
Definition: em_timer.h:341
#define _TIMER_CC_CTRL_CUFOA_SHIFT
#define TIMER_DTCTRL_DTCINV
#define _TIMER_CNT_RESETVALUE
#define TIMER_CTRL_ATI
#define _TIMER_CC_CTRL_COFOA_SHIFT
#define _TIMER_CTRL_RISEA_SHIFT
#define _TIMER_CTRL_MODE_SHIFT
#define TIMER_CC_CTRL_INSEL_PRS
__IOM uint32_t DTCTRL
#define _TIMER_CC_CCV_RESETVALUE
TIMER_DtiFaultAction_TypeDef faultAction
Definition: em_timer.h:453
TIMER_CC_TypeDef CC[4]
#define TIMER_CTRL_SYNC
#define TIMER_CC_CTRL_FILT_ENABLE
#define _TIMER_DTFC_DTFA_SHIFT
__IOM uint32_t IFC
#define _TIMER_CC_CTRL_MODE_SHIFT
TIMER_PRSSEL_TypeDef faultSourcePrsSel1
Definition: em_timer.h:450
unsigned int riseTime
Definition: em_timer.h:423
TIMER_Event_TypeDef eventCtrl
Definition: em_timer.h:338
#define TIMER_CTRL_OSMEN
__IOM uint32_t CNT
__IOM uint32_t CCV
TIMER_Prescale_TypeDef prescale
Definition: em_timer.h:420
#define TIMER_DTCTRL_DTIPOL
#define TIMER_CTRL_DMACLRACT
__IOM uint32_t CCVB
unsigned int fallTime
Definition: em_timer.h:426
TIMER_PRSSEL_TypeDef prsSel
Definition: em_timer.h:417
TIMER_Prescale_TypeDef prescale
Definition: em_timer.h:263
#define _TIMER_DTCTRL_DTPRSSEL_SHIFT
TIMER_OutputAction_TypeDef cofoa
Definition: em_timer.h:353
#define _TIMER_CC_CCVB_RESETVALUE
#define _TIMER_DTFC_RESETVALUE
__IOM uint32_t DTFAULTC
#define TIMER_CC_CTRL_OUTINV
__IOM uint32_t DTLOCK
void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init)
Initialize TIMER.
Definition: em_timer.c:76
#define _TIMER_CTRL_FALLA_SHIFT
#define _TIMER_DTTIME_RESETVALUE
#define TIMER_CTRL_DEBUGRUN
__IOM uint32_t CMD
TIMER_InputAction_TypeDef riseAction
Definition: em_timer.h:281
#define TIMER_DTFC_DTPRS1FEN
__STATIC_INLINE void TIMER_ClearDTIFault(TIMER_TypeDef *timer, uint32_t flags)
Clear DTI fault source flags.
Definition: em_timer.h:740
#define _TIMER_DTTIME_DTFALLT_SHIFT
bool enableFaultSourceCoreLockup
Definition: em_timer.h:435
bool enableFaultSourcePrsSel1
Definition: em_timer.h:447
void TIMER_InitCC(TIMER_TypeDef *timer, unsigned int ch, const TIMER_InitCC_TypeDef *init)
Initialize TIMER compare/capture channel.
Definition: em_timer.c:130
#define TIMER_DTFC_DTPRS0FEN
TIMER_OutputAction_TypeDef cmoa
Definition: em_timer.h:356
__STATIC_INLINE uint32_t TIMER_GetDTIFault(TIMER_TypeDef *timer)
Get DTI fault source flags status.
Definition: em_timer.h:722
__IOM uint32_t CTRL
__IOM uint32_t IEN
#define _TIMER_DTCTRL_RESETVALUE
__IOM uint32_t CTRL
#define _TIMER_TOP_RESETVALUE
#define _TIMER_TOPB_RESETVALUE
#define _TIMER_CTRL_RESETVALUE
#define TIMER_CMD_START
__IOM uint32_t DTFC
bool enableFaultSourceDebugger
Definition: em_timer.h:438