Detailed Description

EFR32MG1P_LDMA register and bit field definitions.

Version: 5.1.2

License

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

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This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. has no obligation to support this Software. Silicon Laboratories, Inc. is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file efr32mg1p_ldma.h.

Go to the source code of this file.

Data Structures
struct	LDMA_TypeDef

Macros
#define	_LDMA_CH_CFG_ARBSLOTS_DEFAULT 0x00000000UL

#define	_LDMA_CH_CFG_ARBSLOTS_EIGHT 0x00000003UL

#define	_LDMA_CH_CFG_ARBSLOTS_FOUR 0x00000002UL

#define	_LDMA_CH_CFG_ARBSLOTS_MASK 0x30000UL

#define	_LDMA_CH_CFG_ARBSLOTS_ONE 0x00000000UL

#define	_LDMA_CH_CFG_ARBSLOTS_SHIFT 16

#define	_LDMA_CH_CFG_ARBSLOTS_TWO 0x00000001UL

#define	_LDMA_CH_CFG_DSTINCSIGN_DEFAULT 0x00000000UL

#define	_LDMA_CH_CFG_DSTINCSIGN_MASK 0x200000UL

#define	_LDMA_CH_CFG_DSTINCSIGN_NEGATIVE 0x00000001UL

#define	_LDMA_CH_CFG_DSTINCSIGN_POSITIVE 0x00000000UL

#define	_LDMA_CH_CFG_DSTINCSIGN_SHIFT 21

#define	_LDMA_CH_CFG_MASK 0x00330000UL

#define	_LDMA_CH_CFG_RESETVALUE 0x00000000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_DEFAULT 0x00000000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_MASK 0x100000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_NEGATIVE 0x00000001UL

#define	_LDMA_CH_CFG_SRCINCSIGN_POSITIVE 0x00000000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_SHIFT 20

#define	_LDMA_CH_CTRL_BLOCKSIZE_ALL 0x0000000FUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_MASK 0xF0000UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_SHIFT 16

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT1 0x00000000UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 0x0000000EUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT128 0x0000000BUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT16 0x00000007UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT2 0x00000001UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT256 0x0000000CUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT3 0x00000002UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT32 0x00000009UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT4 0x00000003UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT512 0x0000000DUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT6 0x00000004UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT64 0x0000000AUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT8 0x00000005UL

#define	_LDMA_CH_CTRL_BYTESWAP_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_BYTESWAP_MASK 0x8000UL

#define	_LDMA_CH_CTRL_BYTESWAP_SHIFT 15

#define	_LDMA_CH_CTRL_DECLOOPCNT_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DECLOOPCNT_MASK 0x400000UL

#define	_LDMA_CH_CTRL_DECLOOPCNT_SHIFT 22

#define	_LDMA_CH_CTRL_DONEIFSEN_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DONEIFSEN_MASK 0x100000UL

#define	_LDMA_CH_CTRL_DONEIFSEN_SHIFT 20

#define	_LDMA_CH_CTRL_DSTINC_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DSTINC_FOUR 0x00000002UL

#define	_LDMA_CH_CTRL_DSTINC_MASK 0x30000000UL

#define	_LDMA_CH_CTRL_DSTINC_NONE 0x00000003UL

#define	_LDMA_CH_CTRL_DSTINC_ONE 0x00000000UL

#define	_LDMA_CH_CTRL_DSTINC_SHIFT 28

#define	_LDMA_CH_CTRL_DSTINC_TWO 0x00000001UL

#define	_LDMA_CH_CTRL_DSTMODE_ABSOLUTE 0x00000000UL

#define	_LDMA_CH_CTRL_DSTMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DSTMODE_MASK 0x80000000UL

#define	_LDMA_CH_CTRL_DSTMODE_RELATIVE 0x00000001UL

#define	_LDMA_CH_CTRL_DSTMODE_SHIFT 31

#define	_LDMA_CH_CTRL_IGNORESREQ_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_IGNORESREQ_MASK 0x800000UL

#define	_LDMA_CH_CTRL_IGNORESREQ_SHIFT 23

#define	_LDMA_CH_CTRL_MASK 0xFFFFFFFBUL

#define	_LDMA_CH_CTRL_REQMODE_ALL 0x00000001UL

#define	_LDMA_CH_CTRL_REQMODE_BLOCK 0x00000000UL

#define	_LDMA_CH_CTRL_REQMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_REQMODE_MASK 0x200000UL

#define	_LDMA_CH_CTRL_REQMODE_SHIFT 21

#define	_LDMA_CH_CTRL_RESETVALUE 0x00000000UL

#define	_LDMA_CH_CTRL_SIZE_BYTE 0x00000000UL

#define	_LDMA_CH_CTRL_SIZE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_SIZE_HALFWORD 0x00000001UL

#define	_LDMA_CH_CTRL_SIZE_MASK 0xC000000UL

#define	_LDMA_CH_CTRL_SIZE_SHIFT 26

#define	_LDMA_CH_CTRL_SIZE_WORD 0x00000002UL

#define	_LDMA_CH_CTRL_SRCINC_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_SRCINC_FOUR 0x00000002UL

#define	_LDMA_CH_CTRL_SRCINC_MASK 0x3000000UL

#define	_LDMA_CH_CTRL_SRCINC_NONE 0x00000003UL

#define	_LDMA_CH_CTRL_SRCINC_ONE 0x00000000UL

#define	_LDMA_CH_CTRL_SRCINC_SHIFT 24

#define	_LDMA_CH_CTRL_SRCINC_TWO 0x00000001UL

#define	_LDMA_CH_CTRL_SRCMODE_ABSOLUTE 0x00000000UL

#define	_LDMA_CH_CTRL_SRCMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_SRCMODE_MASK 0x40000000UL

#define	_LDMA_CH_CTRL_SRCMODE_RELATIVE 0x00000001UL

#define	_LDMA_CH_CTRL_SRCMODE_SHIFT 30

#define	_LDMA_CH_CTRL_STRUCTREQ_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_STRUCTREQ_MASK 0x8UL

#define	_LDMA_CH_CTRL_STRUCTREQ_SHIFT 3

#define	_LDMA_CH_CTRL_STRUCTTYPE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_MASK 0x3UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_SHIFT 0

#define	_LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE 0x00000001UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_TRANSFER 0x00000000UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_WRITE 0x00000002UL

#define	_LDMA_CH_CTRL_XFERCNT_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_XFERCNT_MASK 0x7FF0UL

#define	_LDMA_CH_CTRL_XFERCNT_SHIFT 4

#define	_LDMA_CH_DST_DSTADDR_DEFAULT 0x00000000UL

#define	_LDMA_CH_DST_DSTADDR_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_DST_DSTADDR_SHIFT 0

#define	_LDMA_CH_DST_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_DST_RESETVALUE 0x00000000UL

#define	_LDMA_CH_LINK_LINK_DEFAULT 0x00000000UL

#define	_LDMA_CH_LINK_LINK_MASK 0x2UL

#define	_LDMA_CH_LINK_LINK_SHIFT 1

#define	_LDMA_CH_LINK_LINKADDR_DEFAULT 0x00000000UL

#define	_LDMA_CH_LINK_LINKADDR_MASK 0xFFFFFFFCUL

#define	_LDMA_CH_LINK_LINKADDR_SHIFT 2

#define	_LDMA_CH_LINK_LINKMODE_ABSOLUTE 0x00000000UL

#define	_LDMA_CH_LINK_LINKMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_LINK_LINKMODE_MASK 0x1UL

#define	_LDMA_CH_LINK_LINKMODE_RELATIVE 0x00000001UL

#define	_LDMA_CH_LINK_LINKMODE_SHIFT 0

#define	_LDMA_CH_LINK_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_LINK_RESETVALUE 0x00000000UL

#define	_LDMA_CH_LOOP_LOOPCNT_DEFAULT 0x00000000UL

#define	_LDMA_CH_LOOP_LOOPCNT_MASK 0xFFUL

#define	_LDMA_CH_LOOP_LOOPCNT_SHIFT 0

#define	_LDMA_CH_LOOP_MASK 0x000000FFUL

#define	_LDMA_CH_LOOP_RESETVALUE 0x00000000UL

#define	_LDMA_CH_REQSEL_MASK 0x003F000FUL

#define	_LDMA_CH_REQSEL_RESETVALUE 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_ADC0SCAN 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_MASK 0xFUL

#define	_LDMA_CH_REQSEL_SIGSEL_MSCWDATA 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_PRSREQ0 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_PRSREQ1 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_SHIFT 0

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SOURCESEL_ADC0 0x00000008UL

#define	_LDMA_CH_REQSEL_SOURCESEL_CRYPTO 0x00000031UL

#define	_LDMA_CH_REQSEL_SOURCESEL_I2C0 0x00000014UL

#define	_LDMA_CH_REQSEL_SOURCESEL_LEUART0 0x00000010UL

#define	_LDMA_CH_REQSEL_SOURCESEL_MASK 0x3F0000UL

#define	_LDMA_CH_REQSEL_SOURCESEL_MSC 0x00000030UL

#define	_LDMA_CH_REQSEL_SOURCESEL_NONE 0x00000000UL

#define	_LDMA_CH_REQSEL_SOURCESEL_PRS 0x00000001UL

#define	_LDMA_CH_REQSEL_SOURCESEL_SHIFT 16

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER0 0x00000018UL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER1 0x00000019UL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART0 0x0000000CUL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART1 0x0000000DUL

#define	_LDMA_CH_SRC_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_SRC_RESETVALUE 0x00000000UL

#define	_LDMA_CH_SRC_SRCADDR_DEFAULT 0x00000000UL

#define	_LDMA_CH_SRC_SRCADDR_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_SRC_SRCADDR_SHIFT 0

#define	_LDMA_CHBUSY_BUSY_DEFAULT 0x00000000UL

#define	_LDMA_CHBUSY_BUSY_MASK 0xFFUL

#define	_LDMA_CHBUSY_BUSY_SHIFT 0

#define	_LDMA_CHBUSY_MASK 0x000000FFUL

#define	_LDMA_CHBUSY_RESETVALUE 0x00000000UL

#define	_LDMA_CHDONE_CHDONE_DEFAULT 0x00000000UL

#define	_LDMA_CHDONE_CHDONE_MASK 0xFFUL

#define	_LDMA_CHDONE_CHDONE_SHIFT 0

#define	_LDMA_CHDONE_MASK 0x000000FFUL

#define	_LDMA_CHDONE_RESETVALUE 0x00000000UL

#define	_LDMA_CHEN_CHEN_DEFAULT 0x00000000UL

#define	_LDMA_CHEN_CHEN_MASK 0xFFUL

#define	_LDMA_CHEN_CHEN_SHIFT 0

#define	_LDMA_CHEN_MASK 0x000000FFUL

#define	_LDMA_CHEN_RESETVALUE 0x00000000UL

#define	_LDMA_CTRL_MASK 0x0700FFFFUL

#define	_LDMA_CTRL_NUMFIXED_DEFAULT 0x00000007UL

#define	_LDMA_CTRL_NUMFIXED_MASK 0x7000000UL

#define	_LDMA_CTRL_NUMFIXED_SHIFT 24

#define	_LDMA_CTRL_RESETVALUE 0x07000000UL

#define	_LDMA_CTRL_SYNCPRSCLREN_DEFAULT 0x00000000UL

#define	_LDMA_CTRL_SYNCPRSCLREN_MASK 0xFF00UL

#define	_LDMA_CTRL_SYNCPRSCLREN_SHIFT 8

#define	_LDMA_CTRL_SYNCPRSSETEN_DEFAULT 0x00000000UL

#define	_LDMA_CTRL_SYNCPRSSETEN_MASK 0xFFUL

#define	_LDMA_CTRL_SYNCPRSSETEN_SHIFT 0

#define	_LDMA_DBGHALT_DBGHALT_DEFAULT 0x00000000UL

#define	_LDMA_DBGHALT_DBGHALT_MASK 0xFFUL

#define	_LDMA_DBGHALT_DBGHALT_SHIFT 0

#define	_LDMA_DBGHALT_MASK 0x000000FFUL

#define	_LDMA_DBGHALT_RESETVALUE 0x00000000UL

#define	_LDMA_IEN_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IEN_DONE_MASK 0xFFUL

#define	_LDMA_IEN_DONE_SHIFT 0

#define	_LDMA_IEN_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IEN_ERROR_MASK 0x80000000UL

#define	_LDMA_IEN_ERROR_SHIFT 31

#define	_LDMA_IEN_MASK 0x800000FFUL

#define	_LDMA_IEN_RESETVALUE 0x00000000UL

#define	_LDMA_IF_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IF_DONE_MASK 0xFFUL

#define	_LDMA_IF_DONE_SHIFT 0

#define	_LDMA_IF_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IF_ERROR_MASK 0x80000000UL

#define	_LDMA_IF_ERROR_SHIFT 31

#define	_LDMA_IF_MASK 0x800000FFUL

#define	_LDMA_IF_RESETVALUE 0x00000000UL

#define	_LDMA_IFC_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IFC_DONE_MASK 0xFFUL

#define	_LDMA_IFC_DONE_SHIFT 0

#define	_LDMA_IFC_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IFC_ERROR_MASK 0x80000000UL

#define	_LDMA_IFC_ERROR_SHIFT 31

#define	_LDMA_IFC_MASK 0x800000FFUL

#define	_LDMA_IFC_RESETVALUE 0x00000000UL

#define	_LDMA_IFS_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IFS_DONE_MASK 0xFFUL

#define	_LDMA_IFS_DONE_SHIFT 0

#define	_LDMA_IFS_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IFS_ERROR_MASK 0x80000000UL

#define	_LDMA_IFS_ERROR_SHIFT 31

#define	_LDMA_IFS_MASK 0x800000FFUL

#define	_LDMA_IFS_RESETVALUE 0x00000000UL

#define	_LDMA_LINKLOAD_LINKLOAD_DEFAULT 0x00000000UL

#define	_LDMA_LINKLOAD_LINKLOAD_MASK 0xFFUL

#define	_LDMA_LINKLOAD_LINKLOAD_SHIFT 0

#define	_LDMA_LINKLOAD_MASK 0x000000FFUL

#define	_LDMA_LINKLOAD_RESETVALUE 0x00000000UL

#define	_LDMA_REQCLEAR_MASK 0x000000FFUL

#define	_LDMA_REQCLEAR_REQCLEAR_DEFAULT 0x00000000UL

#define	_LDMA_REQCLEAR_REQCLEAR_MASK 0xFFUL

#define	_LDMA_REQCLEAR_REQCLEAR_SHIFT 0

#define	_LDMA_REQCLEAR_RESETVALUE 0x00000000UL

#define	_LDMA_REQDIS_MASK 0x000000FFUL

#define	_LDMA_REQDIS_REQDIS_DEFAULT 0x00000000UL

#define	_LDMA_REQDIS_REQDIS_MASK 0xFFUL

#define	_LDMA_REQDIS_REQDIS_SHIFT 0

#define	_LDMA_REQDIS_RESETVALUE 0x00000000UL

#define	_LDMA_REQPEND_MASK 0x000000FFUL

#define	_LDMA_REQPEND_REQPEND_DEFAULT 0x00000000UL

#define	_LDMA_REQPEND_REQPEND_MASK 0xFFUL

#define	_LDMA_REQPEND_REQPEND_SHIFT 0

#define	_LDMA_REQPEND_RESETVALUE 0x00000000UL

#define	_LDMA_STATUS_ANYBUSY_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_ANYBUSY_MASK 0x1UL

#define	_LDMA_STATUS_ANYBUSY_SHIFT 0

#define	_LDMA_STATUS_ANYREQ_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_ANYREQ_MASK 0x2UL

#define	_LDMA_STATUS_ANYREQ_SHIFT 1

#define	_LDMA_STATUS_CHERROR_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_CHERROR_MASK 0x700UL

#define	_LDMA_STATUS_CHERROR_SHIFT 8

#define	_LDMA_STATUS_CHGRANT_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_CHGRANT_MASK 0x38UL

#define	_LDMA_STATUS_CHGRANT_SHIFT 3

#define	_LDMA_STATUS_CHNUM_DEFAULT 0x00000008UL

#define	_LDMA_STATUS_CHNUM_MASK 0x1F000000UL

#define	_LDMA_STATUS_CHNUM_SHIFT 24

#define	_LDMA_STATUS_FIFOLEVEL_DEFAULT 0x00000010UL

#define	_LDMA_STATUS_FIFOLEVEL_MASK 0x1F0000UL

#define	_LDMA_STATUS_FIFOLEVEL_SHIFT 16

#define	_LDMA_STATUS_MASK 0x1F1F073BUL

#define	_LDMA_STATUS_RESETVALUE 0x08100000UL

#define	_LDMA_SWREQ_MASK 0x000000FFUL

#define	_LDMA_SWREQ_RESETVALUE 0x00000000UL

#define	_LDMA_SWREQ_SWREQ_DEFAULT 0x00000000UL

#define	_LDMA_SWREQ_SWREQ_MASK 0xFFUL

#define	_LDMA_SWREQ_SWREQ_SHIFT 0

#define	_LDMA_SYNC_MASK 0x000000FFUL

#define	_LDMA_SYNC_RESETVALUE 0x00000000UL

#define	_LDMA_SYNC_SYNCTRIG_DEFAULT 0x00000000UL

#define	_LDMA_SYNC_SYNCTRIG_MASK 0xFFUL

#define	_LDMA_SYNC_SYNCTRIG_SHIFT 0

#define	LDMA_CH_CFG_ARBSLOTS_DEFAULT (_LDMA_CH_CFG_ARBSLOTS_DEFAULT << 16)

#define	LDMA_CH_CFG_ARBSLOTS_EIGHT (_LDMA_CH_CFG_ARBSLOTS_EIGHT << 16)

#define	LDMA_CH_CFG_ARBSLOTS_FOUR (_LDMA_CH_CFG_ARBSLOTS_FOUR << 16)

#define	LDMA_CH_CFG_ARBSLOTS_ONE (_LDMA_CH_CFG_ARBSLOTS_ONE << 16)

#define	LDMA_CH_CFG_ARBSLOTS_TWO (_LDMA_CH_CFG_ARBSLOTS_TWO << 16)

#define	LDMA_CH_CFG_DSTINCSIGN (0x1UL << 21)

#define	LDMA_CH_CFG_DSTINCSIGN_DEFAULT (_LDMA_CH_CFG_DSTINCSIGN_DEFAULT << 21)

#define	LDMA_CH_CFG_DSTINCSIGN_NEGATIVE (_LDMA_CH_CFG_DSTINCSIGN_NEGATIVE << 21)

#define	LDMA_CH_CFG_DSTINCSIGN_POSITIVE (_LDMA_CH_CFG_DSTINCSIGN_POSITIVE << 21)

#define	LDMA_CH_CFG_SRCINCSIGN (0x1UL << 20)

#define	LDMA_CH_CFG_SRCINCSIGN_DEFAULT (_LDMA_CH_CFG_SRCINCSIGN_DEFAULT << 20)

#define	LDMA_CH_CFG_SRCINCSIGN_NEGATIVE (_LDMA_CH_CFG_SRCINCSIGN_NEGATIVE << 20)

#define	LDMA_CH_CFG_SRCINCSIGN_POSITIVE (_LDMA_CH_CFG_SRCINCSIGN_POSITIVE << 20)

#define	LDMA_CH_CTRL_BLOCKSIZE_ALL (_LDMA_CH_CTRL_BLOCKSIZE_ALL << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_DEFAULT (_LDMA_CH_CTRL_BLOCKSIZE_DEFAULT << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT1 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT1 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT128 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT128 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT16 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT16 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT2 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT2 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT256 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT256 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT3 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT3 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT32 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT32 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT4 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT4 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT512 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT512 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT6 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT6 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT64 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT64 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT8 (_LDMA_CH_CTRL_BLOCKSIZE_UNIT8 << 16)

#define	LDMA_CH_CTRL_BYTESWAP (0x1UL << 15)

#define	LDMA_CH_CTRL_BYTESWAP_DEFAULT (_LDMA_CH_CTRL_BYTESWAP_DEFAULT << 15)

#define	LDMA_CH_CTRL_DECLOOPCNT (0x1UL << 22)

#define	LDMA_CH_CTRL_DECLOOPCNT_DEFAULT (_LDMA_CH_CTRL_DECLOOPCNT_DEFAULT << 22)

#define	LDMA_CH_CTRL_DONEIFSEN (0x1UL << 20)

#define	LDMA_CH_CTRL_DONEIFSEN_DEFAULT (_LDMA_CH_CTRL_DONEIFSEN_DEFAULT << 20)

#define	LDMA_CH_CTRL_DSTINC_DEFAULT (_LDMA_CH_CTRL_DSTINC_DEFAULT << 28)

#define	LDMA_CH_CTRL_DSTINC_FOUR (_LDMA_CH_CTRL_DSTINC_FOUR << 28)

#define	LDMA_CH_CTRL_DSTINC_NONE (_LDMA_CH_CTRL_DSTINC_NONE << 28)

#define	LDMA_CH_CTRL_DSTINC_ONE (_LDMA_CH_CTRL_DSTINC_ONE << 28)

#define	LDMA_CH_CTRL_DSTINC_TWO (_LDMA_CH_CTRL_DSTINC_TWO << 28)

#define	LDMA_CH_CTRL_DSTMODE (0x1UL << 31)

#define	LDMA_CH_CTRL_DSTMODE_ABSOLUTE (_LDMA_CH_CTRL_DSTMODE_ABSOLUTE << 31)

#define	LDMA_CH_CTRL_DSTMODE_DEFAULT (_LDMA_CH_CTRL_DSTMODE_DEFAULT << 31)

#define	LDMA_CH_CTRL_DSTMODE_RELATIVE (_LDMA_CH_CTRL_DSTMODE_RELATIVE << 31)

#define	LDMA_CH_CTRL_IGNORESREQ (0x1UL << 23)

#define	LDMA_CH_CTRL_IGNORESREQ_DEFAULT (_LDMA_CH_CTRL_IGNORESREQ_DEFAULT << 23)

#define	LDMA_CH_CTRL_REQMODE (0x1UL << 21)

#define	LDMA_CH_CTRL_REQMODE_ALL (_LDMA_CH_CTRL_REQMODE_ALL << 21)

#define	LDMA_CH_CTRL_REQMODE_BLOCK (_LDMA_CH_CTRL_REQMODE_BLOCK << 21)

#define	LDMA_CH_CTRL_REQMODE_DEFAULT (_LDMA_CH_CTRL_REQMODE_DEFAULT << 21)

#define	LDMA_CH_CTRL_SIZE_BYTE (_LDMA_CH_CTRL_SIZE_BYTE << 26)

#define	LDMA_CH_CTRL_SIZE_DEFAULT (_LDMA_CH_CTRL_SIZE_DEFAULT << 26)

#define	LDMA_CH_CTRL_SIZE_HALFWORD (_LDMA_CH_CTRL_SIZE_HALFWORD << 26)

#define	LDMA_CH_CTRL_SIZE_WORD (_LDMA_CH_CTRL_SIZE_WORD << 26)

#define	LDMA_CH_CTRL_SRCINC_DEFAULT (_LDMA_CH_CTRL_SRCINC_DEFAULT << 24)

#define	LDMA_CH_CTRL_SRCINC_FOUR (_LDMA_CH_CTRL_SRCINC_FOUR << 24)

#define	LDMA_CH_CTRL_SRCINC_NONE (_LDMA_CH_CTRL_SRCINC_NONE << 24)

#define	LDMA_CH_CTRL_SRCINC_ONE (_LDMA_CH_CTRL_SRCINC_ONE << 24)

#define	LDMA_CH_CTRL_SRCINC_TWO (_LDMA_CH_CTRL_SRCINC_TWO << 24)

#define	LDMA_CH_CTRL_SRCMODE (0x1UL << 30)

#define	LDMA_CH_CTRL_SRCMODE_ABSOLUTE (_LDMA_CH_CTRL_SRCMODE_ABSOLUTE << 30)

#define	LDMA_CH_CTRL_SRCMODE_DEFAULT (_LDMA_CH_CTRL_SRCMODE_DEFAULT << 30)

#define	LDMA_CH_CTRL_SRCMODE_RELATIVE (_LDMA_CH_CTRL_SRCMODE_RELATIVE << 30)

#define	LDMA_CH_CTRL_STRUCTREQ (0x1UL << 3)

#define	LDMA_CH_CTRL_STRUCTREQ_DEFAULT (_LDMA_CH_CTRL_STRUCTREQ_DEFAULT << 3)

#define	LDMA_CH_CTRL_STRUCTTYPE_DEFAULT (_LDMA_CH_CTRL_STRUCTTYPE_DEFAULT << 0)

#define	LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE (_LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE << 0)

#define	LDMA_CH_CTRL_STRUCTTYPE_TRANSFER (_LDMA_CH_CTRL_STRUCTTYPE_TRANSFER << 0)

#define	LDMA_CH_CTRL_STRUCTTYPE_WRITE (_LDMA_CH_CTRL_STRUCTTYPE_WRITE << 0)

#define	LDMA_CH_CTRL_XFERCNT_DEFAULT (_LDMA_CH_CTRL_XFERCNT_DEFAULT << 4)

#define	LDMA_CH_DST_DSTADDR_DEFAULT (_LDMA_CH_DST_DSTADDR_DEFAULT << 0)

#define	LDMA_CH_LINK_LINK (0x1UL << 1)

#define	LDMA_CH_LINK_LINK_DEFAULT (_LDMA_CH_LINK_LINK_DEFAULT << 1)

#define	LDMA_CH_LINK_LINKADDR_DEFAULT (_LDMA_CH_LINK_LINKADDR_DEFAULT << 2)

#define	LDMA_CH_LINK_LINKMODE (0x1UL << 0)

#define	LDMA_CH_LINK_LINKMODE_ABSOLUTE (_LDMA_CH_LINK_LINKMODE_ABSOLUTE << 0)

#define	LDMA_CH_LINK_LINKMODE_DEFAULT (_LDMA_CH_LINK_LINKMODE_DEFAULT << 0)

#define	LDMA_CH_LINK_LINKMODE_RELATIVE (_LDMA_CH_LINK_LINKMODE_RELATIVE << 0)

#define	LDMA_CH_LOOP_LOOPCNT_DEFAULT (_LDMA_CH_LOOP_LOOPCNT_DEFAULT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_ADC0SCAN (_LDMA_CH_REQSEL_SIGSEL_ADC0SCAN << 0)

#define	LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE (_LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD (_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0RD << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR (_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0WR << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR (_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA0XWR << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD (_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1RD << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR (_LDMA_CH_REQSEL_SIGSEL_CRYPTODATA1WR << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV (_LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C0TXBL (_LDMA_CH_REQSEL_SIGSEL_I2C0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV (_LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL (_LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY (_LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_MSCWDATA (_LDMA_CH_REQSEL_SIGSEL_MSCWDATA << 0)

#define	LDMA_CH_REQSEL_SIGSEL_PRSREQ0 (_LDMA_CH_REQSEL_SIGSEL_PRSREQ0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_PRSREQ1 (_LDMA_CH_REQSEL_SIGSEL_PRSREQ1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 (_LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 (_LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 (_LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF (_LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 (_LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 (_LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 (_LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 (_LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF (_LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV (_LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART0TXBL (_LDMA_CH_REQSEL_SIGSEL_USART0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY (_LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV (_LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT (_LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1TXBL (_LDMA_CH_REQSEL_SIGSEL_USART1TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT (_LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY (_LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SOURCESEL_ADC0 (_LDMA_CH_REQSEL_SOURCESEL_ADC0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_CRYPTO (_LDMA_CH_REQSEL_SOURCESEL_CRYPTO << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_I2C0 (_LDMA_CH_REQSEL_SOURCESEL_I2C0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_LEUART0 (_LDMA_CH_REQSEL_SOURCESEL_LEUART0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_MSC (_LDMA_CH_REQSEL_SOURCESEL_MSC << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_NONE (_LDMA_CH_REQSEL_SOURCESEL_NONE << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_PRS (_LDMA_CH_REQSEL_SOURCESEL_PRS << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER0 (_LDMA_CH_REQSEL_SOURCESEL_TIMER0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER1 (_LDMA_CH_REQSEL_SOURCESEL_TIMER1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART0 (_LDMA_CH_REQSEL_SOURCESEL_USART0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART1 (_LDMA_CH_REQSEL_SOURCESEL_USART1 << 16)

#define	LDMA_CH_SRC_SRCADDR_DEFAULT (_LDMA_CH_SRC_SRCADDR_DEFAULT << 0)

#define	LDMA_CHBUSY_BUSY_DEFAULT (_LDMA_CHBUSY_BUSY_DEFAULT << 0)

#define	LDMA_CHDONE_CHDONE_DEFAULT (_LDMA_CHDONE_CHDONE_DEFAULT << 0)

#define	LDMA_CHEN_CHEN_DEFAULT (_LDMA_CHEN_CHEN_DEFAULT << 0)

#define	LDMA_CTRL_NUMFIXED_DEFAULT (_LDMA_CTRL_NUMFIXED_DEFAULT << 24)

#define	LDMA_CTRL_SYNCPRSCLREN_DEFAULT (_LDMA_CTRL_SYNCPRSCLREN_DEFAULT << 8)

#define	LDMA_CTRL_SYNCPRSSETEN_DEFAULT (_LDMA_CTRL_SYNCPRSSETEN_DEFAULT << 0)

#define	LDMA_DBGHALT_DBGHALT_DEFAULT (_LDMA_DBGHALT_DBGHALT_DEFAULT << 0)

#define	LDMA_IEN_DONE_DEFAULT (_LDMA_IEN_DONE_DEFAULT << 0)

#define	LDMA_IEN_ERROR (0x1UL << 31)

#define	LDMA_IEN_ERROR_DEFAULT (_LDMA_IEN_ERROR_DEFAULT << 31)

#define	LDMA_IF_DONE_DEFAULT (_LDMA_IF_DONE_DEFAULT << 0)

#define	LDMA_IF_ERROR (0x1UL << 31)

#define	LDMA_IF_ERROR_DEFAULT (_LDMA_IF_ERROR_DEFAULT << 31)

#define	LDMA_IFC_DONE_DEFAULT (_LDMA_IFC_DONE_DEFAULT << 0)

#define	LDMA_IFC_ERROR (0x1UL << 31)

#define	LDMA_IFC_ERROR_DEFAULT (_LDMA_IFC_ERROR_DEFAULT << 31)

#define	LDMA_IFS_DONE_DEFAULT (_LDMA_IFS_DONE_DEFAULT << 0)

#define	LDMA_IFS_ERROR (0x1UL << 31)

#define	LDMA_IFS_ERROR_DEFAULT (_LDMA_IFS_ERROR_DEFAULT << 31)

#define	LDMA_LINKLOAD_LINKLOAD_DEFAULT (_LDMA_LINKLOAD_LINKLOAD_DEFAULT << 0)

#define	LDMA_REQCLEAR_REQCLEAR_DEFAULT (_LDMA_REQCLEAR_REQCLEAR_DEFAULT << 0)

#define	LDMA_REQDIS_REQDIS_DEFAULT (_LDMA_REQDIS_REQDIS_DEFAULT << 0)

#define	LDMA_REQPEND_REQPEND_DEFAULT (_LDMA_REQPEND_REQPEND_DEFAULT << 0)

#define	LDMA_STATUS_ANYBUSY (0x1UL << 0)

#define	LDMA_STATUS_ANYBUSY_DEFAULT (_LDMA_STATUS_ANYBUSY_DEFAULT << 0)

#define	LDMA_STATUS_ANYREQ (0x1UL << 1)

#define	LDMA_STATUS_ANYREQ_DEFAULT (_LDMA_STATUS_ANYREQ_DEFAULT << 1)

#define	LDMA_STATUS_CHERROR_DEFAULT (_LDMA_STATUS_CHERROR_DEFAULT << 8)

#define	LDMA_STATUS_CHGRANT_DEFAULT (_LDMA_STATUS_CHGRANT_DEFAULT << 3)

#define	LDMA_STATUS_CHNUM_DEFAULT (_LDMA_STATUS_CHNUM_DEFAULT << 24)

#define	LDMA_STATUS_FIFOLEVEL_DEFAULT (_LDMA_STATUS_FIFOLEVEL_DEFAULT << 16)

#define	LDMA_SWREQ_SWREQ_DEFAULT (_LDMA_SWREQ_SWREQ_DEFAULT << 0)

#define	LDMA_SYNC_SYNCTRIG_DEFAULT (_LDMA_SYNC_SYNCTRIG_DEFAULT << 0)

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Data Structures

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