uartdrv.h

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/***************************************************************************/
#ifndef UARTDRV_H
#define UARTDRV_H

#include "em_device.h"
#include "em_usart.h"
#include "em_leuart.h"
#include "em_gpio.h"
#include "em_cmu.h"
#include "ecode.h"
#include "uartdrv_config.h"
#include "dmadrv.h"

#ifdef __cplusplus
extern "C" {
#endif

/***************************************************************************/
/***************************************************************************/
#define ECODE_EMDRV_UARTDRV_OK                (ECODE_OK)                              
#define ECODE_EMDRV_UARTDRV_WAITING           (ECODE_EMDRV_UARTDRV_BASE | 0x00000001) 
#define ECODE_EMDRV_UARTDRV_ILLEGAL_HANDLE    (ECODE_EMDRV_UARTDRV_BASE | 0x00000002) 
#define ECODE_EMDRV_UARTDRV_PARAM_ERROR       (ECODE_EMDRV_UARTDRV_BASE | 0x00000003) 
#define ECODE_EMDRV_UARTDRV_BUSY              (ECODE_EMDRV_UARTDRV_BASE | 0x00000004) 
#define ECODE_EMDRV_UARTDRV_ILLEGAL_OPERATION (ECODE_EMDRV_UARTDRV_BASE | 0x00000005) 
#define ECODE_EMDRV_UARTDRV_IDLE              (ECODE_EMDRV_UARTDRV_BASE | 0x00000008) 
#define ECODE_EMDRV_UARTDRV_ABORTED           (ECODE_EMDRV_UARTDRV_BASE | 0x00000009) 
#define ECODE_EMDRV_UARTDRV_QUEUE_FULL        (ECODE_EMDRV_UARTDRV_BASE | 0x0000000A) 
#define ECODE_EMDRV_UARTDRV_QUEUE_EMPTY       (ECODE_EMDRV_UARTDRV_BASE | 0x0000000B) 
#define ECODE_EMDRV_UARTDRV_PARITY_ERROR      (ECODE_EMDRV_UARTDRV_BASE | 0x0000000C) 
#define ECODE_EMDRV_UARTDRV_FRAME_ERROR       (ECODE_EMDRV_UARTDRV_BASE | 0x0000000D) 
#define ECODE_EMDRV_UARTDRV_DMA_ALLOC_ERROR   (ECODE_EMDRV_UARTDRV_BASE | 0x0000000E) 
#define ECODE_EMDRV_UARTDRV_CLOCK_ERROR       (ECODE_EMDRV_UARTDRV_BASE | 0x0000000F) 

// UARTDRV status codes
#define UARTDRV_STATUS_RXEN     (1 << 0)  
#define UARTDRV_STATUS_TXEN     (1 << 1)  
#define UARTDRV_STATUS_RXBLOCK  (1 << 3)  
#define UARTDRV_STATUS_TXTRI    (1 << 4)  
#define UARTDRV_STATUS_TXC      (1 << 5)  
#define UARTDRV_STATUS_TXBL     (1 << 6)  
#define UARTDRV_STATUS_RXDATAV  (1 << 7)  
#define UARTDRV_STATUS_RXFULL   (1 << 8)  
#define UARTDRV_STATUS_TXIDLE   (1 << 13) 

typedef uint32_t UARTDRV_Count_t;     
typedef uint32_t UARTDRV_Status_t;    

typedef enum UARTDRV_FlowControlType
{
  uartdrvFlowControlNone   = 0,   
  uartdrvFlowControlSw     = 1,   
  uartdrvFlowControlHw     = 2,   
  uartdrvFlowControlHwUart = 3    
} UARTDRV_FlowControlType_t;

typedef enum UARTDRV_FlowControlState
{
  uartdrvFlowControlOn = 0,         
  uartdrvFlowControlOff = 1,        
  uartdrvFlowControlAuto = 2        
} UARTDRV_FlowControlState_t;

typedef enum UARTDRV_AbortType
{
  uartdrvAbortTransmit = 1,          
  uartdrvAbortReceive = 2,           
  uartdrvAbortAll = 3                
} UARTDRV_AbortType_t;

typedef enum UARTDRV_UartType
{
  uartdrvUartTypeUart = 0,         
  uartdrvUartTypeLeuart = 1         
} UARTDRV_UartType_t;

struct UARTDRV_HandleData;

/***************************************************************************/
typedef void (*UARTDRV_Callback_t)(struct UARTDRV_HandleData *handle,
                                   Ecode_t transferStatus,
                                   uint8_t *data,
                                   UARTDRV_Count_t transferCount);

typedef struct
{
  uint8_t *data;                           
  UARTDRV_Count_t transferCount;           
  volatile UARTDRV_Count_t itemsRemaining; 
  UARTDRV_Callback_t callback;             
  Ecode_t transferStatus;                  
} UARTDRV_Buffer_t;

typedef struct
{
  volatile uint16_t head;                  
  volatile uint16_t tail;                  
  volatile uint16_t used;                  
  const uint16_t size;                     
  UARTDRV_Buffer_t fifo[];                 
} UARTDRV_Buffer_FifoQueue_t;

#define DEFINE_BUF_QUEUE(qSize, qName)  \
typedef struct {                        \
  uint16_t head;                        \
  uint16_t tail;                        \
  volatile uint16_t used;               \
  const uint16_t size;                  \
  UARTDRV_Buffer_t fifo[qSize];         \
} _##qName;                             \
static volatile _##qName qName =        \
{                                       \
  .head = 0,                            \
  .tail = 0,                            \
  .used = 0,                            \
  .size = qSize,                        \
}


typedef struct
{
  USART_TypeDef              *port;             
  uint32_t                   baudRate;          
#if defined( _USART_ROUTELOC0_MASK )
  uint8_t                    portLocationTx;    
  uint8_t                    portLocationRx;    
#else
  uint8_t                    portLocation;      
#endif
  USART_Stopbits_TypeDef     stopBits;          
  USART_Parity_TypeDef       parity;            
  USART_OVS_TypeDef          oversampling;      
#if defined(USART_CTRL_MVDIS)
  bool                       mvdis;             
#endif
  UARTDRV_FlowControlType_t  fcType;            
  GPIO_Port_TypeDef          ctsPort;           
  uint8_t                    ctsPin;            
  GPIO_Port_TypeDef          rtsPort;           
  uint8_t                    rtsPin;            
  UARTDRV_Buffer_FifoQueue_t *rxQueue;          
  UARTDRV_Buffer_FifoQueue_t *txQueue;          
#if defined( _USART_ROUTELOC1_MASK )
  uint8_t                    portLocationCts;   
  uint8_t                    portLocationRts;   
#endif
} UARTDRV_InitUart_t;

typedef UARTDRV_InitUart_t UARTDRV_Init_t;

typedef struct
{
  LEUART_TypeDef             *port;             
  uint32_t                   baudRate;          
#if defined( _LEUART_ROUTELOC0_MASK )
  uint8_t                    portLocationTx;    
  uint8_t                    portLocationRx;    
#else
  uint8_t                    portLocation;      
#endif
  LEUART_Stopbits_TypeDef    stopBits;          
  LEUART_Parity_TypeDef      parity;            
  UARTDRV_FlowControlType_t  fcType;            
  GPIO_Port_TypeDef          ctsPort;           
  uint8_t                    ctsPin;            
  GPIO_Port_TypeDef          rtsPort;           
  uint8_t                    rtsPin;            
  UARTDRV_Buffer_FifoQueue_t *rxQueue;          
  UARTDRV_Buffer_FifoQueue_t *txQueue;          
} UARTDRV_InitLeuart_t;

typedef struct UARTDRV_HandleData
{
  union peripheral {
    USART_TypeDef * uart;
    LEUART_TypeDef * leuart;
  } peripheral;
  unsigned int               txDmaCh;           // DMA ch assigned to Tx
  unsigned int               rxDmaCh;           // DMA ch assigned to Rx
  DMADRV_PeripheralSignal_t  txDmaSignal;       // DMA Tx trigger source signal
  DMADRV_PeripheralSignal_t  rxDmaSignal;       // DMA Rx trigger source signal
  UARTDRV_FlowControlState_t fcSelfState;       // Current flow control state of self
  UARTDRV_FlowControlState_t fcSelfCfg;         // Flow control override configuration of self
  UARTDRV_FlowControlState_t fcPeerState;       // Current flow control state of peer
  GPIO_Port_TypeDef          txPort;            // TX pin port number
  GPIO_Port_TypeDef          rxPort;            // RX pin port number
  GPIO_Port_TypeDef          ctsPort;           // CTS pin port number
  GPIO_Port_TypeDef          rtsPort;           // RTS pin port number
  uint8_t                    txPin;             // TX pin number
  uint8_t                    rxPin;             // RX pin number
  uint8_t                    ctsPin;            // CTS pin number
  uint8_t                    rtsPin;            // RTS pin number
  CMU_Clock_TypeDef          uartClock;         // Clock source select
  UARTDRV_Buffer_FifoQueue_t *rxQueue;          // Receive operation queue
  UARTDRV_Buffer_FifoQueue_t *txQueue;          // Transmit operation queue
  volatile bool              rxDmaActive;       // Receive DMA is currently active
  volatile bool              txDmaActive;       // Transmit DMA is currently active
  volatile uint8_t           txDmaPaused;       // Transmit DMA pause counter
  bool                       IgnoreRestrain;    // Transmit does not respect uartdrvFlowControlOff
  bool                       hasTransmitted;    // Whether the handle has transmitted data
  UARTDRV_FlowControlType_t  fcType;            // Flow control mode
  UARTDRV_UartType_t         type;              // Type of UART
} UARTDRV_HandleData_t;

typedef UARTDRV_HandleData_t * UARTDRV_Handle_t;

Ecode_t UARTDRV_InitUart(UARTDRV_Handle_t handle,
                         const UARTDRV_InitUart_t * initData);

Ecode_t UARTDRV_InitLeuart(UARTDRV_Handle_t handle,
                           const UARTDRV_InitLeuart_t * initData);

Ecode_t UARTDRV_DeInit(UARTDRV_Handle_t handle);

UARTDRV_Status_t UARTDRV_GetPeripheralStatus(UARTDRV_Handle_t handle);

UARTDRV_Status_t UARTDRV_GetReceiveStatus(UARTDRV_Handle_t handle,
                                          uint8_t **buffer,
                                          UARTDRV_Count_t *bytesReceived,
                                          UARTDRV_Count_t *bytesRemaining);

UARTDRV_Status_t UARTDRV_GetTransmitStatus(UARTDRV_Handle_t handle,
                                           uint8_t **buffer,
                                           UARTDRV_Count_t *bytesSent,
                                           UARTDRV_Count_t *bytesRemaining);

uint8_t UARTDRV_GetReceiveDepth(UARTDRV_Handle_t handle);

uint8_t UARTDRV_GetTransmitDepth(UARTDRV_Handle_t handle);

Ecode_t UARTDRV_Transmit(UARTDRV_Handle_t handle,
                         uint8_t *data,
                         UARTDRV_Count_t count,
                         UARTDRV_Callback_t callback);

Ecode_t UARTDRV_Receive(UARTDRV_Handle_t handle,
                        uint8_t *data,
                        UARTDRV_Count_t count,
                        UARTDRV_Callback_t callback);

Ecode_t UARTDRV_TransmitB(UARTDRV_Handle_t handle,
                          uint8_t *data,
                          UARTDRV_Count_t count);

Ecode_t UARTDRV_ReceiveB(UARTDRV_Handle_t handle,
                         uint8_t *data,
                         UARTDRV_Count_t count);

Ecode_t UARTDRV_ForceTransmit(UARTDRV_Handle_t handle,
                              uint8_t *data,
                              UARTDRV_Count_t count);

UARTDRV_Count_t UARTDRV_ForceReceive(UARTDRV_Handle_t handle,
                                     uint8_t *data,
                                     UARTDRV_Count_t maxLength);

Ecode_t UARTDRV_Abort(UARTDRV_Handle_t handle, UARTDRV_AbortType_t type);

Ecode_t UARTDRV_PauseTransmit(UARTDRV_Handle_t handle);

Ecode_t UARTDRV_ResumeTransmit(UARTDRV_Handle_t handle);

UARTDRV_FlowControlState_t UARTDRV_FlowControlGetSelfStatus(UARTDRV_Handle_t handle);

UARTDRV_FlowControlState_t UARTDRV_FlowControlGetPeerStatus(UARTDRV_Handle_t handle);

Ecode_t UARTDRV_FlowControlSet(UARTDRV_Handle_t handle, UARTDRV_FlowControlState_t state);

Ecode_t UARTDRV_FlowControlSetPeerStatus(UARTDRV_Handle_t handle, UARTDRV_FlowControlState_t state);

Ecode_t UARTDRV_FlowControlIgnoreRestrain(UARTDRV_Handle_t handle);


// --------------------------------
// Deprecated items

/***************************************************************************/
__STATIC_INLINE Ecode_t UARTDRV_Init(UARTDRV_Handle_t handle, UARTDRV_InitUart_t *initData)
{
  return UARTDRV_InitUart(handle, initData);
}

#if defined(EMDRV_UARTDRV_HW_FLOW_CONTROL_ENABLE)
#undef EMDRV_UARTDRV_FLOW_CONTROL_ENABLE
#define EMDRV_UARTDRV_FLOW_CONTROL_ENABLE EMDRV_UARTDRV_HW_FLOW_CONTROL_ENABLE
#endif

#ifdef __cplusplus
}
#endif
#endif // UARTDRV_H