| EFR32 Blue Gecko 1 Software Documentation
    efr32bg1-doc-5.1.2
    | 
Definition at line 41 of file efr32bg1p_rtcc.h.
| Data Fields | |
| RTCC_CC_TypeDef | CC [3] | 
| __IOM uint32_t | CMD | 
| __IOM uint32_t | CNT | 
| __IM uint32_t | COMBCNT | 
| __IOM uint32_t | CTRL | 
| __IOM uint32_t | DATE | 
| __IOM uint32_t | EM4WUEN | 
| __IOM uint32_t | IEN | 
| __IM uint32_t | IF | 
| __IOM uint32_t | IFC | 
| __IOM uint32_t | IFS | 
| __IOM uint32_t | LOCK | 
| __IOM uint32_t | POWERDOWN | 
| __IOM uint32_t | PRECNT | 
| uint32_t | RESERVED0 [37] | 
| RTCC_RET_TypeDef | RET [32] | 
| __IM uint32_t | STATUS | 
| __IM uint32_t | SYNCBUSY | 
| __IOM uint32_t | TIME | 
| RTCC_CC_TypeDef RTCC_TypeDef::CC[3] | 
Capture/Compare Channel
Definition at line 60 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::CMD | 
Command Register
Definition at line 54 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::CNT | 
Counter Value Register
Definition at line 45 of file efr32bg1p_rtcc.h.
| __IM uint32_t RTCC_TypeDef::COMBCNT | 
Combined Pre-Counter and Counter Value Register
Definition at line 46 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::CTRL | 
Control Register
Definition at line 43 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::DATE | 
Date register
Definition at line 48 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::EM4WUEN | 
Wake Up Enable
Definition at line 58 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::IEN | 
Interrupt Enable Register
Definition at line 52 of file efr32bg1p_rtcc.h.
| __IM uint32_t RTCC_TypeDef::IF | 
RTCC Interrupt Flags
Definition at line 49 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::IFC | 
Interrupt Flag Clear Register
Definition at line 51 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::IFS | 
Interrupt Flag Set Register
Definition at line 50 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::LOCK | 
Configuration Lock Register
Definition at line 57 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::POWERDOWN | 
Retention RAM power-down register
Definition at line 56 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::PRECNT | 
Pre-Counter Value Register
Definition at line 44 of file efr32bg1p_rtcc.h.
| uint32_t RTCC_TypeDef::RESERVED0[37] | 
Reserved registers
Definition at line 62 of file efr32bg1p_rtcc.h.
| RTCC_RET_TypeDef RTCC_TypeDef::RET[32] | 
RetentionReg
Definition at line 63 of file efr32bg1p_rtcc.h.
| __IM uint32_t RTCC_TypeDef::STATUS | 
Status register
Definition at line 53 of file efr32bg1p_rtcc.h.
| __IM uint32_t RTCC_TypeDef::SYNCBUSY | 
Synchronization Busy Register
Definition at line 55 of file efr32bg1p_rtcc.h.
| __IOM uint32_t RTCC_TypeDef::TIME | 
Time of day register
Definition at line 47 of file efr32bg1p_rtcc.h.