DAC_TypeDef Struct Reference

Detailed Description

Definition at line 41 of file efm32wg_dac.h.

Data Fields
__IOM uint32_t	BIASPROG
__IOM uint32_t	CAL
__IOM uint32_t	CH0CTRL
__IOM uint32_t	CH0DATA
__IOM uint32_t	CH1CTRL
__IOM uint32_t	CH1DATA
__IOM uint32_t	COMBDATA
__IOM uint32_t	CTRL
__IOM uint32_t	IEN
__IM uint32_t	IF
__IOM uint32_t	IFC
__IOM uint32_t	IFS
__IOM uint32_t	OPA0MUX
__IOM uint32_t	OPA1MUX
__IOM uint32_t	OPA2MUX
__IOM uint32_t	OPACTRL
__IOM uint32_t	OPAOFFSET
uint32_t	RESERVED0 [8]
__IM uint32_t	STATUS

Field Documentation

__IOM uint32_t DAC_TypeDef::BIASPROG

Bias Programming Register

Definition at line 55 of file efm32wg_dac.h.

Referenced by DAC_Reset().

__IOM uint32_t DAC_TypeDef::CAL

Calibration Register

Definition at line 54 of file efm32wg_dac.h.

Referenced by DAC_Init(), and DAC_Reset().

__IOM uint32_t DAC_TypeDef::CH0CTRL

Channel 0 Control Register

Definition at line 45 of file efm32wg_dac.h.

Referenced by DAC_Enable(), DAC_Init(), DAC_InitChannel(), and DAC_Reset().

__IOM uint32_t DAC_TypeDef::CH0DATA

Channel 0 Data Register

Definition at line 51 of file efm32wg_dac.h.

Referenced by DAC_Channel0OutputSet().

__IOM uint32_t DAC_TypeDef::CH1CTRL

Channel 1 Control Register

Definition at line 46 of file efm32wg_dac.h.

Referenced by DAC_Enable(), DAC_Init(), DAC_InitChannel(), and DAC_Reset().

__IOM uint32_t DAC_TypeDef::CH1DATA

Channel 1 Data Register

Definition at line 52 of file efm32wg_dac.h.

Referenced by DAC_Channel1OutputSet().

__IOM uint32_t DAC_TypeDef::COMBDATA

Combined Data Register

Definition at line 53 of file efm32wg_dac.h.

__IOM uint32_t DAC_TypeDef::CTRL

Control Register

Definition at line 43 of file efm32wg_dac.h.

Referenced by DAC_Init(), and DAC_Reset().

__IOM uint32_t DAC_TypeDef::IEN

Interrupt Enable Register

Definition at line 47 of file efm32wg_dac.h.

Referenced by DAC_IntDisable(), DAC_IntEnable(), DAC_IntGetEnabled(), and DAC_Reset().

__IM uint32_t DAC_TypeDef::IF

Interrupt Flag Register

Definition at line 48 of file efm32wg_dac.h.

Referenced by DAC_IntGet(), and DAC_IntGetEnabled().

__IOM uint32_t DAC_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 50 of file efm32wg_dac.h.

Referenced by DAC_IntClear(), and DAC_Reset().

__IOM uint32_t DAC_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 49 of file efm32wg_dac.h.

Referenced by DAC_IntSet().

__IOM uint32_t DAC_TypeDef::OPA0MUX

Operational Amplifier Mux Configuration Register

Definition at line 59 of file efm32wg_dac.h.

__IOM uint32_t DAC_TypeDef::OPA1MUX

Operational Amplifier Mux Configuration Register

Definition at line 60 of file efm32wg_dac.h.

__IOM uint32_t DAC_TypeDef::OPA2MUX

Operational Amplifier Mux Configuration Register

Definition at line 61 of file efm32wg_dac.h.

__IOM uint32_t DAC_TypeDef::OPACTRL

Operational Amplifier Control Register

Definition at line 57 of file efm32wg_dac.h.

__IOM uint32_t DAC_TypeDef::OPAOFFSET

Operational Amplifier Offset Register

Definition at line 58 of file efm32wg_dac.h.

uint32_t DAC_TypeDef::RESERVED0[8]

Reserved for future use

Definition at line 56 of file efm32wg_dac.h.

__IM uint32_t DAC_TypeDef::STATUS

Status Register

Definition at line 44 of file efm32wg_dac.h.

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The documentation for this struct was generated from the following file:

• D:/jenkins-slave/workspaces/Executor-0/super/platform/Device/SiliconLabs/EFM32WG/Include/efm32wg_dac.h