EFM32 Happy Gecko Software Documentation  efm32hg-doc-5.1.2
em_pcnt.h
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1 /***************************************************************************/
33 #ifndef EM_PCNT_H
34 #define EM_PCNT_H
35 
36 #include "em_device.h"
37 #if defined(PCNT_COUNT) && (PCNT_COUNT > 0)
38 
39 #include <stdbool.h>
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 /***************************************************************************/
50 /***************************************************************************/
55 /*******************************************************************************
56  ******************************* DEFINES ***********************************
57  ******************************************************************************/
59 #if defined(_EFM32_GECKO_FAMILY)
60 #define PCNT0_CNT_SIZE (8) /* PCNT0 counter is 8 bits. */
61 #else
62 #define PCNT0_CNT_SIZE (16) /* PCNT0 counter is 16 bits. */
63 #endif
64 
65 #ifdef PCNT1
66 
67 #define PCNT1_CNT_SIZE (8) /* PCNT1 counter is 8 bits. */
68 #endif
69 
70 #ifdef PCNT2
71 
72 #define PCNT2_CNT_SIZE (8) /* PCNT2 counter is 8 bits. */
73 #endif
74 
75 
76 /*******************************************************************************
77  ******************************** ENUMS ************************************
78  ******************************************************************************/
79 
81 typedef enum
82 {
85 
88 
91 
94 
95 #if defined(_PCNT_CTRL_MODE_OVSQUAD1X)
96 
97  pcntModeOvsQuad1 = _PCNT_CTRL_MODE_OVSQUAD1X,
98 
100  pcntModeOvsQuad2 = _PCNT_CTRL_MODE_OVSQUAD2X,
101 
103  pcntModeOvsQuad4 = _PCNT_CTRL_MODE_OVSQUAD4X,
104 #endif
106 
107 
108 #if defined(_PCNT_CTRL_CNTEV_MASK)
109 
112 typedef enum
113 {
116 
119 
122 
126 #endif
127 
128 
129 #if defined(_PCNT_INPUT_MASK)
130 
131 typedef enum
132 {
137 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH4)
139 #endif
140 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH5)
142 #endif
143 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH6)
144  pcntPRSCh6 = 6,
145 #endif
146 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH7)
147  pcntPRSCh7 = 7,
148 #endif
149 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH8)
150  pcntPRSCh8 = 8,
151 #endif
152 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH9)
153  pcntPRSCh9 = 9,
154 #endif
155 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH10)
156  pcntPRSCh10 = 10,
157 #endif
158 #if defined(PCNT_INPUT_S0PRSSEL_PRSCH11)
159  pcntPRSCh11 = 11
160 #endif
162 
163 
165 typedef enum
166 {
167  pcntPRSInputS0 = 0,
170 #endif
171 
172 
173 /*******************************************************************************
174  ******************************* STRUCTS ***********************************
175  ******************************************************************************/
176 
178 typedef struct
179 {
182 
187  uint32_t counter;
188 
193  uint32_t top;
194 
199  bool negEdge;
200 
203  bool countDown;
204 
206  bool filter;
207 
208 #if defined(PCNT_CTRL_HYST)
209 
211  bool hyst;
212 
217  bool s1CntDir;
218 
222 
226 
229 
232 #endif
234 
235 #if !defined(PCNT_CTRL_HYST)
236 
237 #define PCNT_INIT_DEFAULT \
238 { \
239  pcntModeDisable, /* Disabled by default. */ \
240  _PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
241  _PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
242  false, /* Use positive edge. */ \
243  false, /* Up-counting. */ \
244  false /* Filter disabled. */ \
245 }
246 #else
247 
248 #define PCNT_INIT_DEFAULT \
249 { \
250  pcntModeDisable, /* Disabled by default. */ \
251  _PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
252  _PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
253  false, /* Use positive edge. */ \
254  false, /* Up-counting. */ \
255  false, /* Filter disabled. */ \
256  false, /* Hysteresis disabled. */ \
257  true, /* Counter direction is given by CNTDIR. */ \
258  pcntCntEventUp, /* Regular counter counts up on upcount events. */ \
259  pcntCntEventNone, /* Auxiliary counter doesn't respond to events. */ \
260  pcntPRSCh0, /* PRS channel 0 selected as S0IN. */ \
261  pcntPRSCh0 /* PRS channel 0 selected as S1IN. */ \
262 }
263 #endif
264 
265 #if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
266 
267 typedef struct
268 {
271  uint8_t filtLen;
272 
275  bool flutterrm;
276 } PCNT_Filter_TypeDef;
277 #endif
278 
280 #if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
281 #define PCNT_FILTER_DEFAULT \
282 { \
283  0, /* Default length is 5 LFACLK cycles */ \
284  false /* No flutter removal */ \
285 }
286 #endif
287 
288 #if defined(PCNT_CTRL_TCCMODE_DEFAULT)
289 
291 typedef enum
292 {
295 
298 
302 
304 typedef enum
305 {
308 
311 
314 
318 
320 typedef enum
321 {
324 
327 
332 
334 typedef struct
335 {
338 
341 
344 
347 
352 
357 
358 #define PCNT_TCC_DEFAULT \
359 { \
360  tccModeDisabled, /* Disabled by default */ \
361  tccPrescDiv1, /* Do not prescale LFA clock in LFA mode */ \
362  tccCompLTOE, /* Clear when CNT <= TOP */ \
363  pcntPRSCh0, /* Select PRS channel 0 as input to TCC */ \
364  false, /* PRS polarity is rising edge, and gate when 1 */ \
365  false /* Do not gate the PCNT counter input */ \
366 }
367 
368 #endif
369 /* defined(PCNT_CTRL_TCCMODE_DEFAULT) */
370 
371 /*******************************************************************************
372  ***************************** PROTOTYPES **********************************
373  ******************************************************************************/
374 
375 /***************************************************************************/
385 __STATIC_INLINE uint32_t PCNT_CounterGet(PCNT_TypeDef *pcnt)
386 {
387  return pcnt->CNT;
388 }
389 
390 #if defined(_PCNT_AUXCNT_MASK)
391 /***************************************************************************/
401 __STATIC_INLINE uint32_t PCNT_AuxCounterGet(PCNT_TypeDef *pcnt)
402 {
403  return pcnt->AUXCNT;
404 }
405 #endif
406 
407 void PCNT_CounterReset(PCNT_TypeDef *pcnt);
408 void PCNT_CounterTopSet(PCNT_TypeDef *pcnt, uint32_t count, uint32_t top);
409 
410 /***************************************************************************/
431 __STATIC_INLINE void PCNT_CounterSet(PCNT_TypeDef *pcnt, uint32_t count)
432 {
433  PCNT_CounterTopSet(pcnt, count, pcnt->TOP);
434 }
435 
436 void PCNT_Enable(PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode);
437 void PCNT_FreezeEnable(PCNT_TypeDef *pcnt, bool enable);
438 void PCNT_Init(PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init);
439 
440 #if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
441 void PCNT_FilterConfiguration(PCNT_TypeDef *pcnt, const PCNT_Filter_TypeDef *config, bool enable);
442 #endif
443 
444 #if defined(_PCNT_INPUT_MASK)
446  PCNT_PRSInput_TypeDef prsInput,
447  bool enable);
448 #endif
449 
450 #if defined(PCNT_CTRL_TCCMODE_DEFAULT)
451 void PCNT_TCCConfiguration(PCNT_TypeDef *pcnt, const PCNT_TCC_TypeDef *config);
452 #endif
453 /***************************************************************************/
464 __STATIC_INLINE void PCNT_IntClear(PCNT_TypeDef *pcnt, uint32_t flags)
465 {
466  pcnt->IFC = flags;
467 }
468 
469 /***************************************************************************/
480 __STATIC_INLINE void PCNT_IntDisable(PCNT_TypeDef *pcnt, uint32_t flags)
481 {
482  pcnt->IEN &= ~flags;
483 }
484 
485 /***************************************************************************/
501 __STATIC_INLINE void PCNT_IntEnable(PCNT_TypeDef *pcnt, uint32_t flags)
502 {
503  pcnt->IEN |= flags;
504 }
505 
506 /***************************************************************************/
520 __STATIC_INLINE uint32_t PCNT_IntGet(PCNT_TypeDef *pcnt)
521 {
522  return pcnt->IF;
523 }
524 
525 /***************************************************************************/
546 __STATIC_INLINE uint32_t PCNT_IntGetEnabled(PCNT_TypeDef *pcnt)
547 {
548  uint32_t ien;
549 
550 
551  /* Store pcnt->IEN in temporary variable in order to define explicit order
552  * of volatile accesses. */
553  ien = pcnt->IEN;
554 
555  /* Bitwise AND of pending and enabled interrupts */
556  return pcnt->IF & ien;
557 }
558 
559 /***************************************************************************/
570 __STATIC_INLINE void PCNT_IntSet(PCNT_TypeDef *pcnt, uint32_t flags)
571 {
572  pcnt->IFS = flags;
573 }
574 
575 void PCNT_Reset(PCNT_TypeDef *pcnt);
576 
577 /***************************************************************************/
587 __STATIC_INLINE uint32_t PCNT_TopBufferGet(PCNT_TypeDef *pcnt)
588 {
589  return pcnt->TOPB;
590 }
591 
592 void PCNT_TopBufferSet(PCNT_TypeDef *pcnt, uint32_t val);
593 
594 /***************************************************************************/
604 __STATIC_INLINE uint32_t PCNT_TopGet(PCNT_TypeDef *pcnt)
605 {
606  return pcnt->TOP;
607 }
608 
609 void PCNT_TopSet(PCNT_TypeDef *pcnt, uint32_t val);
610 
614 #ifdef __cplusplus
615 }
616 #endif
617 
618 #endif /* defined(PCNT_COUNT) && (PCNT_COUNT > 0) */
619 #endif /* EM_PCNT_H */
#define _PCNT_CTRL_MODE_OVSSINGLE
Definition: efm32hg_pcnt.h:75
__IM uint32_t TOP
Definition: efm32hg_pcnt.h:47
__STATIC_INLINE uint32_t PCNT_TopBufferGet(PCNT_TypeDef *pcnt)
Get pulse counter top buffer value.
Definition: em_pcnt.h:587
__STATIC_INLINE void PCNT_CounterSet(PCNT_TypeDef *pcnt, uint32_t count)
Set counter value.
Definition: em_pcnt.h:431
#define _PCNT_CTRL_CNTEV_DOWN
Definition: efm32hg_pcnt.h:131
void PCNT_CounterTopSet(PCNT_TypeDef *pcnt, uint32_t count, uint32_t top)
Set counter and top values.
Definition: em_pcnt.c:182
PCNT_TCCPresc_Typedef prescaler
Definition: em_pcnt.h:340
#define _PCNT_CTRL_TCCPRESC_DIV1
Definition: efm32hg_pcnt.h:163
void PCNT_Enable(PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode)
Set PCNT operational mode.
Definition: em_pcnt.c:284
#define _PCNT_CTRL_MODE_EXTCLKQUAD
Definition: efm32hg_pcnt.h:77
__STATIC_INLINE void PCNT_IntEnable(PCNT_TypeDef *pcnt, uint32_t flags)
Enable one or more PCNT interrupts.
Definition: em_pcnt.h:501
__IOM uint32_t IFC
Definition: efm32hg_pcnt.h:51
void PCNT_TopSet(PCNT_TypeDef *pcnt, uint32_t val)
Set top value.
Definition: em_pcnt.c:814
void PCNT_PRSInputEnable(PCNT_TypeDef *pcnt, PCNT_PRSInput_TypeDef prsInput, bool enable)
Enable/disable the selected PRS input of PCNT.
Definition: em_pcnt.c:316
__STATIC_INLINE void PCNT_IntClear(PCNT_TypeDef *pcnt, uint32_t flags)
Clear one or more pending PCNT interrupts.
Definition: em_pcnt.h:464
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
PCNT_TCCMode_TypeDef mode
Definition: em_pcnt.h:337
#define _PCNT_CTRL_MODE_DISABLE
Definition: efm32hg_pcnt.h:74
#define _PCNT_CTRL_TCCMODE_LFA
Definition: efm32hg_pcnt.h:154
PCNT_TCCPresc_Typedef
Definition: em_pcnt.h:304
#define _PCNT_CTRL_TCCCOMP_GTOE
Definition: efm32hg_pcnt.h:176
PCNT_CntEvent_TypeDef cntEvent
Definition: em_pcnt.h:221
#define _PCNT_CTRL_TCCPRESC_DIV4
Definition: efm32hg_pcnt.h:165
PCNT_PRSInput_TypeDef
Definition: em_pcnt.h:165
uint32_t counter
Definition: em_pcnt.h:187
__IM uint32_t IF
Definition: efm32hg_pcnt.h:49
__STATIC_INLINE void PCNT_IntDisable(PCNT_TypeDef *pcnt, uint32_t flags)
Disable one or more PCNT interrupts.
Definition: em_pcnt.h:480
__STATIC_INLINE uint32_t PCNT_CounterGet(PCNT_TypeDef *pcnt)
Get pulse counter value.
Definition: em_pcnt.h:385
PCNT_PRSSel_TypeDef
Definition: em_pcnt.h:131
PCNT_CntEvent_TypeDef auxCntEvent
Definition: em_pcnt.h:225
__IOM uint32_t TOPB
Definition: efm32hg_pcnt.h:48
__STATIC_INLINE void PCNT_IntSet(PCNT_TypeDef *pcnt, uint32_t flags)
Set one or more pending PCNT interrupts from SW.
Definition: em_pcnt.h:570
uint32_t top
Definition: em_pcnt.h:193
PCNT_CntEvent_TypeDef
Definition: em_pcnt.h:112
__STATIC_INLINE uint32_t PCNT_IntGetEnabled(PCNT_TypeDef *pcnt)
Get enabled and pending PCNT interrupt flags.
Definition: em_pcnt.h:546
#define _PCNT_CTRL_TCCCOMP_LTOE
Definition: efm32hg_pcnt.h:175
PCNT_TCCMode_TypeDef
Definition: em_pcnt.h:291
PCNT_Mode_TypeDef
Definition: em_pcnt.h:81
#define _PCNT_CTRL_CNTEV_BOTH
Definition: efm32hg_pcnt.h:129
__IM uint32_t CNT
Definition: efm32hg_pcnt.h:46
void PCNT_CounterReset(PCNT_TypeDef *pcnt)
Reset PCNT counters and TOP register.
Definition: em_pcnt.c:146
void PCNT_Init(PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init)
Init pulse counter.
Definition: em_pcnt.c:435
PCNT_PRSSel_TypeDef s1PRS
Definition: em_pcnt.h:231
#define _PCNT_CTRL_CNTEV_NONE
Definition: efm32hg_pcnt.h:132
PCNT_PRSSel_TypeDef s0PRS
Definition: em_pcnt.h:228
PCNT_PRSSel_TypeDef tccPRS
Definition: em_pcnt.h:346
#define _PCNT_CTRL_TCCMODE_PRS
Definition: efm32hg_pcnt.h:155
void PCNT_TopBufferSet(PCNT_TypeDef *pcnt, uint32_t val)
Set top buffer value.
Definition: em_pcnt.c:788
__STATIC_INLINE uint32_t PCNT_TopGet(PCNT_TypeDef *pcnt)
Get pulse counter top value.
Definition: em_pcnt.h:604
__STATIC_INLINE uint32_t PCNT_IntGet(PCNT_TypeDef *pcnt)
Get pending PCNT interrupt flags.
Definition: em_pcnt.h:520
__STATIC_INLINE uint32_t PCNT_AuxCounterGet(PCNT_TypeDef *pcnt)
Get auxiliary counter value.
Definition: em_pcnt.h:401
#define _PCNT_CTRL_TCCPRESC_DIV2
Definition: efm32hg_pcnt.h:164
__IOM uint32_t AUXCNT
Definition: efm32hg_pcnt.h:59
#define _PCNT_CTRL_MODE_EXTCLKSINGLE
Definition: efm32hg_pcnt.h:76
void PCNT_FreezeEnable(PCNT_TypeDef *pcnt, bool enable)
PCNT register synchronization freeze control.
Definition: em_pcnt.c:371
#define _PCNT_CTRL_CNTEV_UP
Definition: efm32hg_pcnt.h:130
PCNT_TCCComp_Typedef
Definition: em_pcnt.h:320
bool prsGateEnable
Definition: em_pcnt.h:355
#define _PCNT_CTRL_TCCCOMP_RANGE
Definition: efm32hg_pcnt.h:177
#define _PCNT_CTRL_TCCPRESC_DIV8
Definition: efm32hg_pcnt.h:166
void PCNT_TCCConfiguration(PCNT_TypeDef *pcnt, const PCNT_TCC_TypeDef *config)
Set Triggered Compare and Clear configuration.
Definition: em_pcnt.c:747
PCNT_TCCComp_Typedef compare
Definition: em_pcnt.h:343
__IOM uint32_t IFS
Definition: efm32hg_pcnt.h:50
PCNT_Mode_TypeDef mode
Definition: em_pcnt.h:181
void PCNT_Reset(PCNT_TypeDef *pcnt)
Reset PCNT to same state as after a HW reset.
Definition: em_pcnt.c:644
__IOM uint32_t IEN
Definition: efm32hg_pcnt.h:52
#define _PCNT_CTRL_TCCMODE_DISABLED
Definition: efm32hg_pcnt.h:153
bool prsPolarity
Definition: em_pcnt.h:351