EFM32 Gecko Software Documentation  efm32g-doc-5.1.2
spidrv.h
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1 /***************************************************************************/
16 #ifndef __SILICON_LABS_SPIDRV_H__
17 #define __SILICON_LABS_SPIDRV_H__
18 
19 #include "em_device.h"
20 #include "em_cmu.h"
21 
22 #include "ecode.h"
23 #include "spidrv_config.h"
24 #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
25 #include "rtcdriver.h"
26 #endif
27 #include "dmadrv.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 /***************************************************************************/
38 /***************************************************************************/
43 #define ECODE_EMDRV_SPIDRV_OK ( ECODE_OK )
44 #define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000001 )
45 #define ECODE_EMDRV_SPIDRV_PARAM_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000002 )
46 #define ECODE_EMDRV_SPIDRV_BUSY ( ECODE_EMDRV_SPIDRV_BASE | 0x00000003 )
47 #define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000004 )
48 #define ECODE_EMDRV_SPIDRV_TIMEOUT ( ECODE_EMDRV_SPIDRV_BASE | 0x00000005 )
49 #define ECODE_EMDRV_SPIDRV_IDLE ( ECODE_EMDRV_SPIDRV_BASE | 0x00000006 )
50 #define ECODE_EMDRV_SPIDRV_ABORTED ( ECODE_EMDRV_SPIDRV_BASE | 0x00000007 )
51 #define ECODE_EMDRV_SPIDRV_MODE_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000008 )
52 #define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR ( ECODE_EMDRV_SPIDRV_BASE | 0x00000009 )
53 
54 typedef enum SPIDRV_Type
56 {
57  spidrvMaster = 0,
58  spidrvSlave = 1
59 } SPIDRV_Type_t;
60 
62 typedef enum SPIDRV_BitOrder
63 {
64  spidrvBitOrderLsbFirst = 0,
65  spidrvBitOrderMsbFirst = 1
66 } SPIDRV_BitOrder_t;
67 
69 typedef enum SPIDRV_ClockMode
70 {
71  spidrvClockMode0 = 0,
72  spidrvClockMode1 = 1,
73  spidrvClockMode2 = 2,
74  spidrvClockMode3 = 3
75 } SPIDRV_ClockMode_t;
76 
78 typedef enum SPIDRV_CsControl
79 {
80  spidrvCsControlAuto = 0,
81  spidrvCsControlApplication = 1
82 } SPIDRV_CsControl_t;
83 
85 typedef enum SPIDRV_SlaveStart
86 {
87  spidrvSlaveStartImmediate = 0,
88  spidrvSlaveStartDelayed = 1
89 } SPIDRV_SlaveStart_t;
90 
91 struct SPIDRV_HandleData;
92 
93 /***************************************************************************/
114 typedef void (*SPIDRV_Callback_t)( struct SPIDRV_HandleData *handle,
115  Ecode_t transferStatus,
116  int itemsTransferred );
117 
123 typedef struct SPIDRV_Init
124 {
125  USART_TypeDef *port;
126 #if defined( _USART_ROUTELOC0_MASK )
127  uint8_t portLocationTx;
128  uint8_t portLocationRx;
129  uint8_t portLocationClk;
130  uint8_t portLocationCs;
131 #else
132  uint8_t portLocation;
133 #endif
134  uint32_t bitRate;
135  uint32_t frameLength;
136  uint32_t dummyTxValue;
137  SPIDRV_Type_t type;
138  SPIDRV_BitOrder_t bitOrder;
139  SPIDRV_ClockMode_t clockMode;
140  SPIDRV_CsControl_t csControl;
141  SPIDRV_SlaveStart_t slaveStartMode;
142 } SPIDRV_Init_t;
143 
148 typedef struct SPIDRV_HandleData
149 {
151  SPIDRV_Init_t initData;
152  unsigned int txDMACh;
153  unsigned int rxDMACh;
154  DMADRV_PeripheralSignal_t txDMASignal;
155  DMADRV_PeripheralSignal_t rxDMASignal;
156  SPIDRV_Callback_t userCallback;
157  uint32_t dummyRx;
158  int transferCount;
159  int remaining;
160  int csPort;
161  int csPin;
162  Ecode_t transferStatus;
163  volatile enum { spidrvStateIdle = 0, spidrvStateTransferring = 1 } state;
164  CMU_Clock_TypeDef usartClock;
165  volatile bool blockingCompleted;
166 
167  #if defined( EMDRV_SPIDRV_INCLUDE_SLAVE )
168  RTCDRV_TimerID_t timer;
169  #endif
170 } SPIDRV_HandleData_t;
172 
174 typedef SPIDRV_HandleData_t * SPIDRV_Handle_t;
175 
176 #if defined( _USART_ROUTELOC0_MASK ) /* Series 1 devices */
177 
178 #if defined( USART0 )
179 #define SPIDRV_MASTER_USART0 \
181 { \
182  USART0, /* USART port */ \
183  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
184  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
185  _USART_ROUTELOC0_CLKLOC_LOC1, /* USART Clk pin location number */ \
186  _USART_ROUTELOC0_CSLOC_LOC1, /* USART Cs pin location number */ \
187  1000000, /* Bitrate */ \
188  8, /* Frame length */ \
189  0, /* Dummy tx value for rx only funcs */ \
190  spidrvMaster, /* SPI mode */ \
191  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
192  spidrvClockMode0, /* SPI clock/phase mode */ \
193  spidrvCsControlAuto, /* CS controlled by the driver */ \
194  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
195 }
196 #endif
197 
198 #if defined( USART1 )
199 #define SPIDRV_MASTER_USART1 \
201 { \
202  USART1, /* USART port */ \
203  _USART_ROUTELOC0_TXLOC_LOC11, /* USART Tx pin location number */ \
204  _USART_ROUTELOC0_RXLOC_LOC11, /* USART Rx pin location number */ \
205  _USART_ROUTELOC0_CLKLOC_LOC11,/* USART Clk pin location number */ \
206  _USART_ROUTELOC0_CSLOC_LOC11, /* USART Cs pin location number */ \
207  1000000, /* Bitrate */ \
208  8, /* Frame length */ \
209  0, /* Dummy tx value for rx only funcs */ \
210  spidrvMaster, /* SPI mode */ \
211  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
212  spidrvClockMode0, /* SPI clock/phase mode */ \
213  spidrvCsControlAuto, /* CS controlled by the driver */ \
214  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
215 }
216 #endif
217 
218 #if defined( USART2 )
219 #define SPIDRV_MASTER_USART2 \
221 { \
222  USART2, /* USART port */ \
223  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
224  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
225  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
226  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
227  1000000, /* Bitrate */ \
228  8, /* Frame length */ \
229  0, /* Dummy tx value for rx only funcs */ \
230  spidrvMaster, /* SPI mode */ \
231  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
232  spidrvClockMode0, /* SPI clock/phase mode */ \
233  spidrvCsControlAuto, /* CS controlled by the driver */ \
234  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
235 }
236 #endif
237 
238 #if defined( USART3 )
239 #define SPIDRV_MASTER_USART3 \
241 { \
242  USART3, /* USART port */ \
243  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
244  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
245  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
246  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
247  1000000, /* Bitrate */ \
248  8, /* Frame length */ \
249  0, /* Dummy tx value for rx only funcs */ \
250  spidrvMaster, /* SPI mode */ \
251  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
252  spidrvClockMode0, /* SPI clock/phase mode */ \
253  spidrvCsControlAuto, /* CS controlled by the driver */ \
254  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
255 }
256 #endif
257 
258 #if defined( USART4 )
259 #define SPIDRV_MASTER_USART4 \
261 { \
262  USART4, /* USART port */ \
263  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
264  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
265  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
266  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
267  1000000, /* Bitrate */ \
268  8, /* Frame length */ \
269  0, /* Dummy tx value for rx only funcs */ \
270  spidrvMaster, /* SPI mode */ \
271  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
272  spidrvClockMode0, /* SPI clock/phase mode */ \
273  spidrvCsControlAuto, /* CS controlled by the driver */ \
274  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
275 }
276 #endif
277 
278 #if defined( USART5 )
279 #define SPIDRV_MASTER_USART5 \
281 { \
282  USART5, /* USART port */ \
283  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
284  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
285  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
286  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
287  1000000, /* Bitrate */ \
288  8, /* Frame length */ \
289  0, /* Dummy tx value for rx only funcs */ \
290  spidrvMaster, /* SPI mode */ \
291  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
292  spidrvClockMode0, /* SPI clock/phase mode */ \
293  spidrvCsControlAuto, /* CS controlled by the driver */ \
294  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
295 }
296 #endif
297 
298 #if defined( USART0 )
299 #define SPIDRV_SLAVE_USART0 \
301 { \
302  USART0, /* USART port */ \
303  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
304  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
305  _USART_ROUTELOC0_CLKLOC_LOC1, /* USART Clk pin location number */ \
306  _USART_ROUTELOC0_CSLOC_LOC1, /* USART Cs pin location number */ \
307  0, /* Bitrate */ \
308  8, /* Frame length */ \
309  0, /* Dummy tx value for rx only funcs */ \
310  spidrvSlave, /* SPI mode */ \
311  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
312  spidrvClockMode0, /* SPI clock/phase mode */ \
313  spidrvCsControlAuto, /* CS controlled by the driver */ \
314  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
315 }
316 #endif
317 
318 #if defined( USART1 )
319 #define SPIDRV_SLAVE_USART1 \
321 { \
322  USART1, /* USART port */ \
323  _USART_ROUTELOC0_TXLOC_LOC11, /* USART Tx pin location number */ \
324  _USART_ROUTELOC0_RXLOC_LOC11, /* USART Rx pin location number */ \
325  _USART_ROUTELOC0_CLKLOC_LOC11,/* USART Clk pin location number */ \
326  _USART_ROUTELOC0_CSLOC_LOC11, /* USART Cs pin location number */ \
327  0, /* Bitrate */ \
328  8, /* Frame length */ \
329  0, /* Dummy tx value for rx only funcs */ \
330  spidrvSlave, /* SPI mode */ \
331  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
332  spidrvClockMode0, /* SPI clock/phase mode */ \
333  spidrvCsControlAuto, /* CS controlled by the driver */ \
334  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
335 }
336 #endif
337 
338 #if defined( USART2 )
339 #define SPIDRV_SLAVE_USART2 \
341 { \
342  USART2, /* USART port */ \
343  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
344  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
345  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
346  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
347  0, /* Bitrate */ \
348  8, /* Frame length */ \
349  0, /* Dummy tx value for rx only funcs */ \
350  spidrvSlave, /* SPI mode */ \
351  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
352  spidrvClockMode0, /* SPI clock/phase mode */ \
353  spidrvCsControlAuto, /* CS controlled by the driver */ \
354  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
355 }
356 #endif
357 
358 #if defined( USART3 )
359 #define SPIDRV_SLAVE_USART3 \
361 { \
362  USART3, /* USART port */ \
363  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
364  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
365  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
366  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
367  0, /* Bitrate */ \
368  8, /* Frame length */ \
369  0, /* Dummy tx value for rx only funcs */ \
370  spidrvSlave, /* SPI mode */ \
371  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
372  spidrvClockMode0, /* SPI clock/phase mode */ \
373  spidrvCsControlAuto, /* CS controlled by the driver */ \
374  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
375 }
376 #endif
377 
378 #if defined( USART4 )
379 #define SPIDRV_SLAVE_USART4 \
381 { \
382  USART4, /* USART port */ \
383  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
384  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
385  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
386  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
387  0, /* Bitrate */ \
388  8, /* Frame length */ \
389  0, /* Dummy tx value for rx only funcs */ \
390  spidrvSlave, /* SPI mode */ \
391  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
392  spidrvClockMode0, /* SPI clock/phase mode */ \
393  spidrvCsControlAuto, /* CS controlled by the driver */ \
394  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
395 }
396 #endif
397 
398 #if defined( USART5 )
399 #define SPIDRV_SLAVE_USART5 \
401 { \
402  USART5, /* USART port */ \
403  _USART_ROUTELOC0_TXLOC_LOC0, /* USART Tx pin location number */ \
404  _USART_ROUTELOC0_RXLOC_LOC0, /* USART Rx pin location number */ \
405  _USART_ROUTELOC0_CLKLOC_LOC0, /* USART Clk pin location number */ \
406  _USART_ROUTELOC0_CSLOC_LOC0, /* USART Cs pin location number */ \
407  0, /* Bitrate */ \
408  8, /* Frame length */ \
409  0, /* Dummy tx value for rx only funcs */ \
410  spidrvSlave, /* SPI mode */ \
411  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
412  spidrvClockMode0, /* SPI clock/phase mode */ \
413  spidrvCsControlAuto, /* CS controlled by the driver */ \
414  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
415 }
416 #endif
417 
418 #else /* Series 0 devices */
419 
421 #define SPIDRV_MASTER_USART0 \
422 { \
423  USART0, /* USART port */ \
424  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
425  1000000, /* Bitrate */ \
426  8, /* Frame length */ \
427  0, /* Dummy tx value for rx only funcs */ \
428  spidrvMaster, /* SPI mode */ \
429  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
430  spidrvClockMode0, /* SPI clock/phase mode */ \
431  spidrvCsControlAuto, /* CS controlled by the driver */ \
432  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
433 }
434 
436 #define SPIDRV_MASTER_USART1 \
437 { \
438  USART1, /* USART port */ \
439  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
440  1000000, /* Bitrate */ \
441  8, /* Frame length */ \
442  0, /* Dummy tx value for rx only funcs */ \
443  spidrvMaster, /* SPI mode */ \
444  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
445  spidrvClockMode0, /* SPI clock/phase mode */ \
446  spidrvCsControlAuto, /* CS controlled by the driver */ \
447  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
448 }
449 
451 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
452 #define SPIDRV_MASTER_USART2 \
453 { \
454  USART2, /* USART port */ \
455  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
456  1000000, /* Bitrate */ \
457  8, /* Frame length */ \
458  0, /* Dummy tx value for rx only funcs */ \
459  spidrvMaster, /* SPI mode */ \
460  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
461  spidrvClockMode0, /* SPI clock/phase mode */ \
462  spidrvCsControlAuto, /* CS controlled by the driver */ \
463  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
464 }
465 #else
466 #define SPIDRV_MASTER_USART2 \
467 { \
468  USART2, /* USART port */ \
469  _USART_ROUTE_LOCATION_LOC0, /* USART pins location number */ \
470  1000000, /* Bitrate */ \
471  8, /* Frame length */ \
472  0, /* Dummy tx value for rx only funcs */ \
473  spidrvMaster, /* SPI mode */ \
474  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
475  spidrvClockMode0, /* SPI clock/phase mode */ \
476  spidrvCsControlAuto, /* CS controlled by the driver */ \
477  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
478 }
479 #endif
480 
482 #define SPIDRV_MASTER_USARTRF0 \
483 { \
484  USARTRF0, /* USART port */ \
485  RF_USARTRF_LOCATION, /* USART pins location number */ \
486  1000000, /* Bitrate */ \
487  8, /* Frame length */ \
488  0, /* Dummy tx value for rx only funcs */ \
489  spidrvMaster, /* SPI mode */ \
490  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
491  spidrvClockMode0, /* SPI clock/phase mode */ \
492  spidrvCsControlAuto, /* CS controlled by the driver */ \
493  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
494 }
495 
497 #define SPIDRV_MASTER_USARTRF1 \
498 { \
499  USARTRF1, /* USART port */ \
500  RF_USARTRF_LOCATION, /* USART pins location number */ \
501  1000000, /* Bitrate */ \
502  8, /* Frame length */ \
503  0, /* Dummy tx value for rx only funcs */ \
504  spidrvMaster, /* SPI mode */ \
505  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
506  spidrvClockMode0, /* SPI clock/phase mode */ \
507  spidrvCsControlAuto, /* CS controlled by the driver */ \
508  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
509 }
510 
512 #define SPIDRV_SLAVE_USART0 \
513 { \
514  USART0, /* USART port */ \
515  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
516  0, /* Bitrate */ \
517  8, /* Frame length */ \
518  0, /* Dummy tx value for rx only funcs */ \
519  spidrvSlave, /* SPI mode */ \
520  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
521  spidrvClockMode0, /* SPI clock/phase mode */ \
522  spidrvCsControlAuto, /* CS controlled by the driver */ \
523  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
524 }
525 
527 #define SPIDRV_SLAVE_USART1 \
528 { \
529  USART1, /* USART port */ \
530  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
531  0, /* Bitrate */ \
532  8, /* Frame length */ \
533  0, /* Dummy tx value for rx only funcs */ \
534  spidrvSlave, /* SPI mode */ \
535  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
536  spidrvClockMode0, /* SPI clock/phase mode */ \
537  spidrvCsControlAuto, /* CS controlled by the driver */ \
538  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
539 }
540 
542 #if defined( _EZR32_LEOPARD_FAMILY ) || defined( _EZR32_WONDER_FAMILY )
543 #define SPIDRV_SLAVE_USART2 \
544 { \
545  USART2, /* USART port */ \
546  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
547  0, /* Bitrate */ \
548  8, /* Frame length */ \
549  0, /* Dummy tx value for rx only funcs */ \
550  spidrvSlave, /* SPI mode */ \
551  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
552  spidrvClockMode0, /* SPI clock/phase mode */ \
553  spidrvCsControlAuto, /* CS controlled by the driver */ \
554  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
555 }
556 #else
557 #define SPIDRV_SLAVE_USART2 \
558 { \
559  USART2, /* USART port */ \
560  _USART_ROUTE_LOCATION_LOC0, /* USART pins location number */ \
561  0, /* Bitrate */ \
562  8, /* Frame length */ \
563  0, /* Dummy tx value for rx only funcs */ \
564  spidrvSlave, /* SPI mode */ \
565  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
566  spidrvClockMode0, /* SPI clock/phase mode */ \
567  spidrvCsControlAuto, /* CS controlled by the driver */ \
568  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
569 }
570 #endif
571 
573 #define SPIDRV_SLAVE_USARTRF0 \
574 { \
575  USARTRF0, /* USART port */ \
576  _USART_ROUTE_LOCATION_LOC1, /* USART pins location number */ \
577  0, /* Bitrate */ \
578  8, /* Frame length */ \
579  0, /* Dummy tx value for rx only funcs */ \
580  spidrvSlave, /* SPI mode */ \
581  spidrvBitOrderMsbFirst, /* Bit order on bus */ \
582  spidrvClockMode0, /* SPI clock/phase mode */ \
583  spidrvCsControlAuto, /* CS controlled by the driver */ \
584  spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
585 }
586 #endif /* _USART_ROUTELOC0_MASK */
587 
588 Ecode_t SPIDRV_AbortTransfer( SPIDRV_Handle_t handle );
589 
590 Ecode_t SPIDRV_DeInit( SPIDRV_Handle_t handle );
591 
592 Ecode_t SPIDRV_GetBitrate( SPIDRV_Handle_t handle,
593  uint32_t *bitRate );
594 
595 Ecode_t SPIDRV_GetFramelength( SPIDRV_Handle_t handle,
596  uint32_t *frameLength );
597 
598 Ecode_t SPIDRV_GetTransferStatus( SPIDRV_Handle_t handle,
599  int *itemsTransferred,
600  int *itemsRemaining );
601 
602 Ecode_t SPIDRV_Init( SPIDRV_Handle_t handle,
603  SPIDRV_Init_t *initData );
604 
605 Ecode_t SPIDRV_MReceive( SPIDRV_Handle_t handle,
606  void *buffer,
607  int count,
608  SPIDRV_Callback_t callback );
609 
610 Ecode_t SPIDRV_MReceiveB( SPIDRV_Handle_t handle,
611  void *buffer,
612  int count );
613 
614 Ecode_t SPIDRV_MTransfer( SPIDRV_Handle_t handle,
615  const void *txBuffer,
616  void *rxBuffer,
617  int count,
618  SPIDRV_Callback_t callback );
619 
620 Ecode_t SPIDRV_MTransferB( SPIDRV_Handle_t handle,
621  const void *txBuffer,
622  void *rxBuffer,
623  int count );
624 
625 Ecode_t SPIDRV_MTransferSingleItemB( SPIDRV_Handle_t handle,
626  uint32_t txValue,
627  void *rxValue );
628 
629 Ecode_t SPIDRV_MTransmit( SPIDRV_Handle_t handle,
630  const void *buffer,
631  int count,
632  SPIDRV_Callback_t callback );
633 
634 Ecode_t SPIDRV_MTransmitB( SPIDRV_Handle_t handle,
635  const void *buffer,
636  int count );
637 
638 Ecode_t SPIDRV_SetBitrate( SPIDRV_Handle_t handle,
639  uint32_t bitRate );
640 
641 Ecode_t SPIDRV_SetFramelength( SPIDRV_Handle_t handle,
642  uint32_t frameLength );
643 
644 Ecode_t SPIDRV_SReceive( SPIDRV_Handle_t handle,
645  void *buffer,
646  int count,
647  SPIDRV_Callback_t callback,
648  int timeoutMs );
649 
650 Ecode_t SPIDRV_SReceiveB( SPIDRV_Handle_t handle,
651  void *buffer,
652  int count,
653  int timeoutMs );
654 
655 Ecode_t SPIDRV_STransfer( SPIDRV_Handle_t handle,
656  const void *txBuffer,
657  void *rxBuffer,
658  int count,
659  SPIDRV_Callback_t callback,
660  int timeoutMs );
661 
662 Ecode_t SPIDRV_STransferB( SPIDRV_Handle_t handle,
663  const void *txBuffer,
664  void *rxBuffer,
665  int count,
666  int timeoutMs );
667 
668 Ecode_t SPIDRV_STransmit( SPIDRV_Handle_t handle,
669  const void *buffer,
670  int count,
671  SPIDRV_Callback_t callback,
672  int timeoutMs );
673 
674 Ecode_t SPIDRV_STransmitB( SPIDRV_Handle_t handle,
675  const void *buffer,
676  int count,
677  int timeoutMs );
678 
682 #ifdef __cplusplus
683 }
684 #endif
685 
686 #endif /* __SILICON_LABS_SPIDRV_H__ */
em_cmu.h
Clock management unit (CMU) API.
SPIDRV_Init::slaveStartMode
SPIDRV_SlaveStart_t slaveStartMode
Slave mode transfer start scheme.
Definition: spidrv.h:141
SPIDRV_GetTransferStatus
Ecode_t SPIDRV_GetTransferStatus(SPIDRV_Handle_t handle, int *itemsTransferred, int *itemsRemaining)
Get the status of a SPI transfer.
Definition: spidrv.c:507
SPIDRV_Init::type
SPIDRV_Type_t type
SPI type, master or slave.
Definition: spidrv.h:137
dmadrv.h
DMADRV API definition.
SPIDRV_DeInit
Ecode_t SPIDRV_DeInit(SPIDRV_Handle_t handle)
Deinitialize a SPI driver instance.
Definition: spidrv.c:347
SPIDRV_AbortTransfer
Ecode_t SPIDRV_AbortTransfer(SPIDRV_Handle_t handle)
Abort an ongoing SPI transfer.
Definition: spidrv.c:388
RTCDRV_TimerID_t
uint32_t RTCDRV_TimerID_t
Timer ID.
Definition: rtcdriver.h:47
spidrvSlave
Act as SPI slave.
Definition: spidrv.h:58
SPIDRV_STransferB
Ecode_t SPIDRV_STransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, int timeoutMs)
Start a SPI slave blocking transfer.
Definition: spidrv.c:1166
USART_TypeDef
Definition: efm32g_usart.h:41
SPIDRV_GetBitrate
Ecode_t SPIDRV_GetBitrate(SPIDRV_Handle_t handle, uint32_t *bitRate)
Get current SPI bus bitrate.
Definition: spidrv.c:443
SPIDRV_MTransmitB
Ecode_t SPIDRV_MTransmitB(SPIDRV_Handle_t handle, const void *buffer, int count)
Start a SPI master blocking transmit transfer.
Definition: spidrv.c:843
ecode.h
Energy Aware drivers error code definitions.
SPIDRV_Init::dummyTxValue
uint32_t dummyTxValue
The value to transmit when using SPI receive API functions.
Definition: spidrv.h:136
SPIDRV_ClockMode_t
enum SPIDRV_ClockMode SPIDRV_ClockMode_t
SPI clock mode (clock polarity and phase).
spidrvBitOrderMsbFirst
MSB bit is transmitted first.
Definition: spidrv.h:65
SPIDRV_MTransfer
Ecode_t SPIDRV_MTransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transfer.
Definition: spidrv.c:644
SPIDRV_MReceive
Ecode_t SPIDRV_MReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master receive transfer.
Definition: spidrv.c:559
SPIDRV_Init::bitOrder
SPIDRV_BitOrder_t bitOrder
Bit order on SPI bus, MSB or LSB first.
Definition: spidrv.h:138
SPIDRV_Init::port
USART_TypeDef * port
The USART used for SPI.
Definition: spidrv.h:125
SPIDRV_Init
Definition: spidrv.h:123
SPIDRV_MTransferSingleItemB
Ecode_t SPIDRV_MTransferSingleItemB(SPIDRV_Handle_t handle, uint32_t txValue, void *rxValue)
Start a SPI master blocking single item (frame) transfer.
Definition: spidrv.c:743
SPIDRV_MTransferB
Ecode_t SPIDRV_MTransferB(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count)
Start a SPI master blocking transfer.
Definition: spidrv.c:694
em_device.h
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
SPIDRV_CsControl
SPIDRV_CsControl
SPI master chip select (CS) control scheme.
Definition: spidrv.h:78
spidrvClockMode2
SPI mode 2: CLKPOL=1, CLKPHA=0.
Definition: spidrv.h:73
rtcdriver.h
RTCDRV timer API definition.
SPIDRV_Init::portLocation
uint8_t portLocation
Location number for SPI pins.
Definition: spidrv.h:132
SPIDRV_Init::bitRate
uint32_t bitRate
SPI bitrate.
Definition: spidrv.h:134
SPIDRV_ClockMode
SPIDRV_ClockMode
SPI clock mode (clock polarity and phase).
Definition: spidrv.h:69
SPIDRV_SetFramelength
Ecode_t SPIDRV_SetFramelength(SPIDRV_Handle_t handle, uint32_t frameLength)
Set SPI framelength.
Definition: spidrv.c:914
spidrvClockMode1
SPI mode 1: CLKPOL=0, CLKPHA=1.
Definition: spidrv.h:72
SPIDRV_HandleData
Definition: spidrv.h:148
spidrvSlaveStartDelayed
Transfer is started when bus is idle (CS deasserted).
Definition: spidrv.h:88
CMU_Clock_TypeDef
CMU_Clock_TypeDef
Definition: em_cmu.h:257
spidrvBitOrderLsbFirst
LSB bit is transmitted first.
Definition: spidrv.h:64
Ecode_t
uint32_t Ecode_t
Typedef for API function error code return values.
Definition: ecode.h:51
SPIDRV_SetBitrate
Ecode_t SPIDRV_SetBitrate(SPIDRV_Handle_t handle, uint32_t bitRate)
Set SPI bus bitrate.
Definition: spidrv.c:879
SPIDRV_MTransmit
Ecode_t SPIDRV_MTransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback)
Start a SPI master transmit transfer.
Definition: spidrv.c:801
SPIDRV_BitOrder_t
enum SPIDRV_BitOrder SPIDRV_BitOrder_t
SPI bus bit order.
SPIDRV_HandleData_t
struct SPIDRV_HandleData SPIDRV_HandleData_t
SPIDRV_SlaveStart
SPIDRV_SlaveStart
SPI slave transfer start scheme.
Definition: spidrv.h:85
spidrvCsControlApplication
CS controlled by application.
Definition: spidrv.h:81
rxBuffer
static volatile uint8_t rxBuffer[RXBUFSIZE]
Definition: retargetserial.c:42
SPIDRV_Init_t
struct SPIDRV_Init SPIDRV_Init_t
SPIDRV_STransfer
Ecode_t SPIDRV_STransfer(SPIDRV_Handle_t handle, const void *txBuffer, void *rxBuffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transfer.
Definition: spidrv.c:1095
SPIDRV_STransmitB
Ecode_t SPIDRV_STransmitB(SPIDRV_Handle_t handle, const void *buffer, int count, int timeoutMs)
Start a SPI slave blocking transmit transfer.
Definition: spidrv.c:1299
spidrvClockMode0
SPI mode 0: CLKPOL=0, CLKPHA=0.
Definition: spidrv.h:71
SPIDRV_GetFramelength
Ecode_t SPIDRV_GetFramelength(SPIDRV_Handle_t handle, uint32_t *frameLength)
Get current SPI framelength.
Definition: spidrv.c:472
spidrvSlaveStartImmediate
Transfer is started immediately.
Definition: spidrv.h:87
SPIDRV_BitOrder
SPIDRV_BitOrder
SPI bus bit order.
Definition: spidrv.h:62
SPIDRV_Init
Ecode_t SPIDRV_Init(SPIDRV_Handle_t handle, SPIDRV_Init_t *initData)
Initialize a SPI driver instance.
Definition: spidrv.c:101
SPIDRV_STransmit
Ecode_t SPIDRV_STransmit(SPIDRV_Handle_t handle, const void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave transmit transfer.
Definition: spidrv.c:1235
spidrvCsControlAuto
CS controlled by SPI driver.
Definition: spidrv.h:80
SPIDRV_CsControl_t
enum SPIDRV_CsControl SPIDRV_CsControl_t
SPI master chip select (CS) control scheme.
spidrvMaster
Act as SPI master.
Definition: spidrv.h:57
SPIDRV_Type
SPIDRV_Type
SPI driver instance type.
Definition: spidrv.h:55
SPIDRV_SReceive
Ecode_t SPIDRV_SReceive(SPIDRV_Handle_t handle, void *buffer, int count, SPIDRV_Callback_t callback, int timeoutMs)
Start a SPI slave receive transfer.
Definition: spidrv.c:969
SPIDRV_Callback_t
void(* SPIDRV_Callback_t)(struct SPIDRV_HandleData *handle, Ecode_t transferStatus, int itemsTransferred)
SPIDRV transfer completion callback function.
Definition: spidrv.h:114
spidrvClockMode3
SPI mode 3: CLKPOL=1, CLKPHA=1.
Definition: spidrv.h:74
SPIDRV_Init::frameLength
uint32_t frameLength
SPI framelength, valid numbers are 4..16.
Definition: spidrv.h:135
SPIDRV_SReceiveB
Ecode_t SPIDRV_SReceiveB(SPIDRV_Handle_t handle, void *buffer, int count, int timeoutMs)
Start a SPI slave blocking receive transfer.
Definition: spidrv.c:1033
SPIDRV_SlaveStart_t
enum SPIDRV_SlaveStart SPIDRV_SlaveStart_t
SPI slave transfer start scheme.
SPIDRV_Handle_t
SPIDRV_HandleData_t * SPIDRV_Handle_t
SPI driver instance handle.
Definition: spidrv.h:174
SPIDRV_Init::csControl
SPIDRV_CsControl_t csControl
Select master mode chip select (CS) control scheme.
Definition: spidrv.h:140
SPIDRV_Init::clockMode
SPIDRV_ClockMode_t clockMode
SPI mode, CLKPOL/CLKPHASE setting.
Definition: spidrv.h:139
SPIDRV_MReceiveB
Ecode_t SPIDRV_MReceiveB(SPIDRV_Handle_t handle, void *buffer, int count)
Start a SPI master blocking receive transfer.
Definition: spidrv.c:602
SPIDRV_Type_t
enum SPIDRV_Type SPIDRV_Type_t
SPI driver instance type.