19 #include "si1133_config.h"
28 #define X_ORDER_MASK 0x0070
29 #define Y_ORDER_MASK 0x0007
30 #define SIGN_MASK 0x0080
31 #define get_x_order(m) ( (m & X_ORDER_MASK) >> 4 )
32 #define get_y_order(m) ( (m & Y_ORDER_MASK) )
33 #define get_sign(m) ( (m & SIGN_MASK ) >> 7 )
35 #define UV_INPUT_FRACTION 15
36 #define UV_OUTPUT_FRACTION 12
39 #define ADC_THRESHOLD 16000
40 #define INPUT_FRACTION_HIGH 7
41 #define INPUT_FRACTION_LOW 15
42 #define LUX_OUTPUT_FRACTION 12
43 #define NUMCOEFF_LOW 9
44 #define NUMCOEFF_HIGH 4
54 #ifndef SI1133_CONFIG_I2C_DEVICE
55 #define SI1133_CONFIG_I2C_DEVICE (I2C0)
58 #ifndef SI1133_CONFIG_I2C_BUS_ADDRESS
59 #define SI1133_CONFIG_I2C_BUS_ADDRESS (0xAA)
62 #define SI1133_I2C_DEVICE (SI1133_CONFIG_I2C_DEVICE)
63 #define SI1133_I2C_DEVICE_BUS_ADDRESS (SI1133_CONFIG_I2C_BUS_ADDRESS)
73 #define SI1133_OK 0x0000
74 #define SI1133_ERROR_I2C_TRANSACTION_FAILED 0x0001
75 #define SI1133_ERROR_SLEEP_FAILED 0x0002
126 #define SI1133_REG_PART_ID 0x00
127 #define SI1133_REG_HW_ID 0x01
128 #define SI1133_REG_REV_ID 0x02
129 #define SI1133_REG_HOSTIN0 0x0A
130 #define SI1133_REG_COMMAND 0x0B
131 #define SI1133_REG_IRQ_ENABLE 0x0F
132 #define SI1133_REG_RESPONSE1 0x10
133 #define SI1133_REG_RESPONSE0 0x11
134 #define SI1133_REG_IRQ_STATUS 0x12
135 #define SI1133_REG_HOSTOUT0 0x13
136 #define SI1133_REG_HOSTOUT1 0x14
137 #define SI1133_REG_HOSTOUT2 0x15
138 #define SI1133_REG_HOSTOUT3 0x16
139 #define SI1133_REG_HOSTOUT4 0x17
140 #define SI1133_REG_HOSTOUT5 0x18
141 #define SI1133_REG_HOSTOUT6 0x19
142 #define SI1133_REG_HOSTOUT7 0x1A
143 #define SI1133_REG_HOSTOUT8 0x1B
144 #define SI1133_REG_HOSTOUT9 0x1C
145 #define SI1133_REG_HOSTOUT10 0x1D
146 #define SI1133_REG_HOSTOUT11 0x1E
147 #define SI1133_REG_HOSTOUT12 0x1F
148 #define SI1133_REG_HOSTOUT13 0x20
149 #define SI1133_REG_HOSTOUT14 0x21
150 #define SI1133_REG_HOSTOUT15 0x22
151 #define SI1133_REG_HOSTOUT16 0x23
152 #define SI1133_REG_HOSTOUT17 0x24
153 #define SI1133_REG_HOSTOUT18 0x25
154 #define SI1133_REG_HOSTOUT19 0x26
155 #define SI1133_REG_HOSTOUT20 0x27
156 #define SI1133_REG_HOSTOUT21 0x28
157 #define SI1133_REG_HOSTOUT22 0x29
158 #define SI1133_REG_HOSTOUT23 0x2A
159 #define SI1133_REG_HOSTOUT24 0x2B
160 #define SI1133_REG_HOSTOUT25 0x2C
170 #define SI1133_PARAM_I2C_ADDR 0x00
171 #define SI1133_PARAM_CH_LIST 0x01
172 #define SI1133_PARAM_ADCCONFIG0 0x02
173 #define SI1133_PARAM_ADCSENS0 0x03
174 #define SI1133_PARAM_ADCPOST0 0x04
175 #define SI1133_PARAM_MEASCONFIG0 0x05
176 #define SI1133_PARAM_ADCCONFIG1 0x06
177 #define SI1133_PARAM_ADCSENS1 0x07
178 #define SI1133_PARAM_ADCPOST1 0x08
179 #define SI1133_PARAM_MEASCONFIG1 0x09
180 #define SI1133_PARAM_ADCCONFIG2 0x0A
181 #define SI1133_PARAM_ADCSENS2 0x0B
182 #define SI1133_PARAM_ADCPOST2 0x0C
183 #define SI1133_PARAM_MEASCONFIG2 0x0D
184 #define SI1133_PARAM_ADCCONFIG3 0x0E
185 #define SI1133_PARAM_ADCSENS3 0x0F
186 #define SI1133_PARAM_ADCPOST3 0x10
187 #define SI1133_PARAM_MEASCONFIG3 0x11
188 #define SI1133_PARAM_ADCCONFIG4 0x12
189 #define SI1133_PARAM_ADCSENS4 0x13
190 #define SI1133_PARAM_ADCPOST4 0x14
191 #define SI1133_PARAM_MEASCONFIG4 0x15
192 #define SI1133_PARAM_ADCCONFIG5 0x16
193 #define SI1133_PARAM_ADCSENS5 0x17
194 #define SI1133_PARAM_ADCPOST5 0x18
195 #define SI1133_PARAM_MEASCONFIG5 0x19
196 #define SI1133_PARAM_MEASRATE_H 0x1A
197 #define SI1133_PARAM_MEASRATE_L 0x1B
198 #define SI1133_PARAM_MEASCOUNT0 0x1C
199 #define SI1133_PARAM_MEASCOUNT1 0x1D
200 #define SI1133_PARAM_MEASCOUNT2 0x1E
201 #define SI1133_PARAM_THRESHOLD0_H 0x25
202 #define SI1133_PARAM_THRESHOLD0_L 0x26
203 #define SI1133_PARAM_THRESHOLD1_H 0x27
204 #define SI1133_PARAM_THRESHOLD1_L 0x28
205 #define SI1133_PARAM_THRESHOLD2_H 0x29
206 #define SI1133_PARAM_THRESHOLD2_L 0x2A
207 #define SI1133_PARAM_BURST 0x2B
217 #define SI1133_CMD_RESET_CMD_CTR 0x00
218 #define SI1133_CMD_RESET 0x01
219 #define SI1133_CMD_NEW_ADDR 0x02
220 #define SI1133_CMD_FORCE_CH 0x11
221 #define SI1133_CMD_PAUSE_CH 0x12
222 #define SI1133_CMD_START 0x13
223 #define SI1133_CMD_PARAM_SET 0x80
224 #define SI1133_CMD_PARAM_QUERY 0x40
234 #define SI1133_RSP0_CHIPSTAT_MASK 0xE0
235 #define SI1133_RSP0_COUNTER_MASK 0x1F
236 #define SI1133_RSP0_SLEEP 0x20
246 uint32_t SI1133_registerRead ( uint8_t reg, uint8_t *data );
uint32_t SI1133_getIrqStatus(uint8_t *irqStatus)
Reads the interrupt status register of the device.
int32_t SI1133_getLux(int32_t vis_high, int32_t vis_low, int32_t ir, SI1133_LuxCoeff_TypeDef *lk)
Compute lux value.
uint32_t SI1133_registerBlockWrite(uint8_t reg, uint8_t length, uint8_t *data)
Writes a block of data to the Si1133 sensor.
uint32_t SI1133_reset(void)
Resets the Si1133.
uint32_t SI1133_getHardwareID(uint8_t *hardwareID)
Reads Hardware ID from the SI1133 sensor.
uint32_t SI1133_registerBlockRead(uint8_t reg, uint8_t length, uint8_t *data)
Reads a block of data from the Si1133 sensor.
uint32_t SI1133_getMeasurement(float *lux, float *uvi)
Retrieve the sample values from the chip and convert them to lux and UV index values.
uint32_t SI1133_measurementGet(SI1133_Samples_TypeDef *samples)
Read samples from the Si1133 chip.
Structure to store the calculation coefficients.
Structure to store the data measured by the Si1133.
uint32_t SI1133_paramSet(uint8_t address, uint8_t value)
Writes a byte to an Si1133 Parameter.
uint32_t SI1133_measureLuxUvi(float *lux, float *uvi)
Measure lux and UV index using the Si1133 sensor.
uint32_t SI1133_resetCmdCtr(void)
Sends a RESET COMMAND COUNTER command to the Si1133.
int32_t SI1133_getUv(int32_t uv, SI1133_Coeff_TypeDef *uk)
Compute UV index.
Structure to store the coefficients used for Lux calculation.
uint32_t SI1133_measurementForce(void)
Sends a FORCE command to the Si1133.
uint32_t SI1133_measurementStart(void)
Sends a START command to the Si1133.
uint32_t SI1133_paramRead(uint8_t address)
Reads a parameter from the Si1133.
uint32_t SI1133_init(void)
Initializes the Si1133 chip.
static uint32_t SI1133_measurementPause(void)
Sends a PAUSE command to the Si1133.
uint32_t SI1133_registerWrite(uint8_t reg, uint8_t data)
Writes register in the Si1133 sensor.
uint32_t SI1133_deInit(void)
Stops the measurements on all channel and waits until the chip goes to sleep state.