EFM32 Gecko Software Documentation  efm32g-doc-5.1.2

Detailed Description

Si1133 register bit mask macro definitions.

Macros

#define SI1133_RSP0_CHIPSTAT_MASK   0xE0
 
#define SI1133_RSP0_COUNTER_MASK   0x1F
 
#define SI1133_RSP0_SLEEP   0x20
 

Macro Definition Documentation

#define SI1133_RSP0_CHIPSTAT_MASK   0xE0

Chip state mask in Response0 register

Definition at line 234 of file si1133.h.

Referenced by SI1133_waitUntilSleep().

#define SI1133_RSP0_COUNTER_MASK   0x1F

Command counter and error indicator mask in Response0 register

Definition at line 235 of file si1133.h.

Referenced by SI1133_paramSet(), and SI1133_sendCmd().

#define SI1133_RSP0_SLEEP   0x20

Sleep state indicator bit mask in Response0 register

Definition at line 236 of file si1133.h.

Referenced by SI1133_waitUntilSleep().