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EFM32 Gecko Software Documentation
efm32g-doc-5.1.2
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EFM32 Gecko Software Documentation
efm32g-doc-5.1.2
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| #define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ADDRB
Definition at line 141 of file efm32g_msc.h.
| #define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL |
Bit mask for MSC_ADDRB
Definition at line 140 of file efm32g_msc.h.
| #define _MSC_ADDRB_ADDRB_SHIFT 0 |
Shift value for MSC_ADDRB
Definition at line 139 of file efm32g_msc.h.
| #define _MSC_ADDRB_MASK 0xFFFFFFFFUL |
Mask for MSC_ADDRB
Definition at line 138 of file efm32g_msc.h.
| #define _MSC_ADDRB_RESETVALUE 0x00000000UL |
Default value for MSC_ADDRB
Definition at line 137 of file efm32g_msc.h.
| #define _MSC_CTRL_BUSFAULT_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_CTRL
Definition at line 71 of file efm32g_msc.h.
| #define _MSC_CTRL_BUSFAULT_GENERATE 0x00000000UL |
Mode GENERATE for MSC_CTRL
Definition at line 70 of file efm32g_msc.h.
| #define _MSC_CTRL_BUSFAULT_IGNORE 0x00000001UL |
Mode IGNORE for MSC_CTRL
Definition at line 72 of file efm32g_msc.h.
| #define _MSC_CTRL_BUSFAULT_MASK 0x1UL |
Bit mask for MSC_BUSFAULT
Definition at line 69 of file efm32g_msc.h.
| #define _MSC_CTRL_BUSFAULT_SHIFT 0 |
Shift value for MSC_BUSFAULT
Definition at line 68 of file efm32g_msc.h.
| #define _MSC_CTRL_MASK 0x00000001UL |
Mask for MSC_CTRL
Definition at line 66 of file efm32g_msc.h.
| #define _MSC_CTRL_RESETVALUE 0x00000001UL |
Default value for MSC_CTRL
Definition at line 65 of file efm32g_msc.h.
| #define _MSC_IEN_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 234 of file efm32g_msc.h.
| #define _MSC_IEN_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 233 of file efm32g_msc.h.
| #define _MSC_IEN_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 232 of file efm32g_msc.h.
| #define _MSC_IEN_MASK 0x00000003UL |
Mask for MSC_IEN
Definition at line 230 of file efm32g_msc.h.
| #define _MSC_IEN_RESETVALUE 0x00000000UL |
Default value for MSC_IEN
Definition at line 229 of file efm32g_msc.h.
| #define _MSC_IEN_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 239 of file efm32g_msc.h.
| #define _MSC_IEN_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 238 of file efm32g_msc.h.
| #define _MSC_IEN_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 237 of file efm32g_msc.h.
| #define _MSC_IF_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 192 of file efm32g_msc.h.
| #define _MSC_IF_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 191 of file efm32g_msc.h.
| #define _MSC_IF_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 190 of file efm32g_msc.h.
| #define _MSC_IF_MASK 0x00000003UL |
Mask for MSC_IF
Definition at line 188 of file efm32g_msc.h.
| #define _MSC_IF_RESETVALUE 0x00000000UL |
Default value for MSC_IF
Definition at line 187 of file efm32g_msc.h.
| #define _MSC_IF_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 197 of file efm32g_msc.h.
| #define _MSC_IF_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 196 of file efm32g_msc.h.
| #define _MSC_IF_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 195 of file efm32g_msc.h.
| #define _MSC_IFC_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 220 of file efm32g_msc.h.
| #define _MSC_IFC_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 219 of file efm32g_msc.h.
| #define _MSC_IFC_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 218 of file efm32g_msc.h.
| #define _MSC_IFC_MASK 0x00000003UL |
Mask for MSC_IFC
Definition at line 216 of file efm32g_msc.h.
| #define _MSC_IFC_RESETVALUE 0x00000000UL |
Default value for MSC_IFC
Definition at line 215 of file efm32g_msc.h.
| #define _MSC_IFC_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 225 of file efm32g_msc.h.
| #define _MSC_IFC_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 224 of file efm32g_msc.h.
| #define _MSC_IFC_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 223 of file efm32g_msc.h.
| #define _MSC_IFS_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 206 of file efm32g_msc.h.
| #define _MSC_IFS_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 205 of file efm32g_msc.h.
| #define _MSC_IFS_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 204 of file efm32g_msc.h.
| #define _MSC_IFS_MASK 0x00000003UL |
Mask for MSC_IFS
Definition at line 202 of file efm32g_msc.h.
| #define _MSC_IFS_RESETVALUE 0x00000000UL |
Default value for MSC_IFS
Definition at line 201 of file efm32g_msc.h.
| #define _MSC_IFS_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 211 of file efm32g_msc.h.
| #define _MSC_IFS_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 210 of file efm32g_msc.h.
| #define _MSC_IFS_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 209 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_LOCK
Definition at line 247 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL |
Mode LOCK for MSC_LOCK
Definition at line 248 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL |
Mode LOCKED for MSC_LOCK
Definition at line 250 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL |
Bit mask for MSC_LOCKKEY
Definition at line 246 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_SHIFT 0 |
Shift value for MSC_LOCKKEY
Definition at line 245 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL |
Mode UNLOCK for MSC_LOCK
Definition at line 251 of file efm32g_msc.h.
| #define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL |
Mode UNLOCKED for MSC_LOCK
Definition at line 249 of file efm32g_msc.h.
| #define _MSC_LOCK_MASK 0x0000FFFFUL |
Mask for MSC_LOCK
Definition at line 244 of file efm32g_msc.h.
| #define _MSC_LOCK_RESETVALUE 0x00000000UL |
Default value for MSC_LOCK
Definition at line 243 of file efm32g_msc.h.
| #define _MSC_READCTRL_MASK 0x00000007UL |
Mask for MSC_READCTRL
Definition at line 79 of file efm32g_msc.h.
| #define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 83 of file efm32g_msc.h.
| #define _MSC_READCTRL_MODE_MASK 0x7UL |
Bit mask for MSC_MODE
Definition at line 81 of file efm32g_msc.h.
Referenced by MSC_ExecConfigSet().
| #define _MSC_READCTRL_MODE_SHIFT 0 |
Shift value for MSC_MODE
Definition at line 80 of file efm32g_msc.h.
| #define _MSC_READCTRL_MODE_WS0 0x00000000UL |
Mode WS0 for MSC_READCTRL
Definition at line 82 of file efm32g_msc.h.
| #define _MSC_READCTRL_MODE_WS0SCBTP 0x00000002UL |
Mode WS0SCBTP for MSC_READCTRL
Definition at line 85 of file efm32g_msc.h.
| #define _MSC_READCTRL_MODE_WS1 0x00000001UL |
Mode WS1 for MSC_READCTRL
Definition at line 84 of file efm32g_msc.h.
| #define _MSC_READCTRL_MODE_WS1SCBTP 0x00000003UL |
Mode WS1SCBTP for MSC_READCTRL
Definition at line 86 of file efm32g_msc.h.
| #define _MSC_READCTRL_RESETVALUE 0x00000001UL |
Default value for MSC_READCTRL
Definition at line 78 of file efm32g_msc.h.
| #define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 158 of file efm32g_msc.h.
| #define _MSC_STATUS_BUSY_MASK 0x1UL |
Bit mask for MSC_BUSY
Definition at line 157 of file efm32g_msc.h.
| #define _MSC_STATUS_BUSY_SHIFT 0 |
Shift value for MSC_BUSY
Definition at line 156 of file efm32g_msc.h.
| #define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 183 of file efm32g_msc.h.
| #define _MSC_STATUS_ERASEABORTED_MASK 0x20UL |
Bit mask for MSC_ERASEABORTED
Definition at line 182 of file efm32g_msc.h.
| #define _MSC_STATUS_ERASEABORTED_SHIFT 5 |
Shift value for MSC_ERASEABORTED
Definition at line 181 of file efm32g_msc.h.
| #define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 168 of file efm32g_msc.h.
| #define _MSC_STATUS_INVADDR_MASK 0x4UL |
Bit mask for MSC_INVADDR
Definition at line 167 of file efm32g_msc.h.
| #define _MSC_STATUS_INVADDR_SHIFT 2 |
Shift value for MSC_INVADDR
Definition at line 166 of file efm32g_msc.h.
| #define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 163 of file efm32g_msc.h.
| #define _MSC_STATUS_LOCKED_MASK 0x2UL |
Bit mask for MSC_LOCKED
Definition at line 162 of file efm32g_msc.h.
| #define _MSC_STATUS_LOCKED_SHIFT 1 |
Shift value for MSC_LOCKED
Definition at line 161 of file efm32g_msc.h.
| #define _MSC_STATUS_MASK 0x0000003FUL |
Mask for MSC_STATUS
Definition at line 154 of file efm32g_msc.h.
| #define _MSC_STATUS_RESETVALUE 0x00000008UL |
Default value for MSC_STATUS
Definition at line 153 of file efm32g_msc.h.
| #define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STATUS
Definition at line 173 of file efm32g_msc.h.
| #define _MSC_STATUS_WDATAREADY_MASK 0x8UL |
Bit mask for MSC_WDATAREADY
Definition at line 172 of file efm32g_msc.h.
| #define _MSC_STATUS_WDATAREADY_SHIFT 3 |
Shift value for MSC_WDATAREADY
Definition at line 171 of file efm32g_msc.h.
| #define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 178 of file efm32g_msc.h.
| #define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL |
Bit mask for MSC_WORDTIMEOUT
Definition at line 177 of file efm32g_msc.h.
| #define _MSC_STATUS_WORDTIMEOUT_SHIFT 4 |
Shift value for MSC_WORDTIMEOUT
Definition at line 176 of file efm32g_msc.h.
| #define _MSC_WDATA_MASK 0xFFFFFFFFUL |
Mask for MSC_WDATA
Definition at line 146 of file efm32g_msc.h.
| #define _MSC_WDATA_RESETVALUE 0x00000000UL |
Default value for MSC_WDATA
Definition at line 145 of file efm32g_msc.h.
| #define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WDATA
Definition at line 149 of file efm32g_msc.h.
| #define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL |
Bit mask for MSC_WDATA
Definition at line 148 of file efm32g_msc.h.
| #define _MSC_WDATA_WDATA_SHIFT 0 |
Shift value for MSC_WDATA
Definition at line 147 of file efm32g_msc.h.
| #define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 118 of file efm32g_msc.h.
| #define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL |
Bit mask for MSC_ERASEPAGE
Definition at line 117 of file efm32g_msc.h.
| #define _MSC_WRITECMD_ERASEPAGE_SHIFT 1 |
Shift value for MSC_ERASEPAGE
Definition at line 116 of file efm32g_msc.h.
| #define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 113 of file efm32g_msc.h.
| #define _MSC_WRITECMD_LADDRIM_MASK 0x1UL |
Bit mask for MSC_LADDRIM
Definition at line 112 of file efm32g_msc.h.
| #define _MSC_WRITECMD_LADDRIM_SHIFT 0 |
Shift value for MSC_LADDRIM
Definition at line 111 of file efm32g_msc.h.
| #define _MSC_WRITECMD_MASK 0x0000001FUL |
Mask for MSC_WRITECMD
Definition at line 109 of file efm32g_msc.h.
| #define _MSC_WRITECMD_RESETVALUE 0x00000000UL |
Default value for MSC_WRITECMD
Definition at line 108 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 123 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITEEND_MASK 0x4UL |
Bit mask for MSC_WRITEEND
Definition at line 122 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITEEND_SHIFT 2 |
Shift value for MSC_WRITEEND
Definition at line 121 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 128 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL |
Bit mask for MSC_WRITEONCE
Definition at line 127 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITEONCE_SHIFT 3 |
Shift value for MSC_WRITEONCE
Definition at line 126 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 133 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL |
Bit mask for MSC_WRITETRIG
Definition at line 132 of file efm32g_msc.h.
| #define _MSC_WRITECMD_WRITETRIG_SHIFT 4 |
Shift value for MSC_WRITETRIG
Definition at line 131 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line 104 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL |
Bit mask for MSC_IRQERASEABORT
Definition at line 103 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1 |
Shift value for MSC_IRQERASEABORT
Definition at line 102 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_MASK 0x00000003UL |
Mask for MSC_WRITECTRL
Definition at line 95 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_RESETVALUE 0x00000000UL |
Default value for MSC_WRITECTRL
Definition at line 94 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line 99 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_WREN_MASK 0x1UL |
Bit mask for MSC_WREN
Definition at line 98 of file efm32g_msc.h.
| #define _MSC_WRITECTRL_WREN_SHIFT 0 |
Shift value for MSC_WREN
Definition at line 97 of file efm32g_msc.h.
| #define MSC_ADDRB_ADDRB_DEFAULT (_MSC_ADDRB_ADDRB_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_ADDRB
Definition at line 142 of file efm32g_msc.h.
| #define MSC_CTRL_BUSFAULT (0x1UL << 0) |
Bus Fault Response Enable
Definition at line 67 of file efm32g_msc.h.
| #define MSC_CTRL_BUSFAULT_DEFAULT (_MSC_CTRL_BUSFAULT_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 74 of file efm32g_msc.h.
| #define MSC_CTRL_BUSFAULT_GENERATE (_MSC_CTRL_BUSFAULT_GENERATE << 0) |
Shifted mode GENERATE for MSC_CTRL
Definition at line 73 of file efm32g_msc.h.
| #define MSC_CTRL_BUSFAULT_IGNORE (_MSC_CTRL_BUSFAULT_IGNORE << 0) |
Shifted mode IGNORE for MSC_CTRL
Definition at line 75 of file efm32g_msc.h.
| #define MSC_IEN_ERASE (0x1UL << 0) |
Erase Done Interrupt Enable
Definition at line 231 of file efm32g_msc.h.
| #define MSC_IEN_ERASE_DEFAULT (_MSC_IEN_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 235 of file efm32g_msc.h.
| #define MSC_IEN_WRITE (0x1UL << 1) |
Write Done Interrupt Enable
Definition at line 236 of file efm32g_msc.h.
| #define MSC_IEN_WRITE_DEFAULT (_MSC_IEN_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 240 of file efm32g_msc.h.
| #define MSC_IF_ERASE (0x1UL << 0) |
Erase Done Interrupt Read Flag
Definition at line 189 of file efm32g_msc.h.
| #define MSC_IF_ERASE_DEFAULT (_MSC_IF_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IF
Definition at line 193 of file efm32g_msc.h.
| #define MSC_IF_WRITE (0x1UL << 1) |
Write Done Interrupt Read Flag
Definition at line 194 of file efm32g_msc.h.
| #define MSC_IF_WRITE_DEFAULT (_MSC_IF_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IF
Definition at line 198 of file efm32g_msc.h.
| #define MSC_IFC_ERASE (0x1UL << 0) |
Erase Done Interrupt Clear
Definition at line 217 of file efm32g_msc.h.
| #define MSC_IFC_ERASE_DEFAULT (_MSC_IFC_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 221 of file efm32g_msc.h.
| #define MSC_IFC_WRITE (0x1UL << 1) |
Write Done Interrupt Clear
Definition at line 222 of file efm32g_msc.h.
| #define MSC_IFC_WRITE_DEFAULT (_MSC_IFC_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 226 of file efm32g_msc.h.
| #define MSC_IFS_ERASE (0x1UL << 0) |
Erase Done Interrupt Set
Definition at line 203 of file efm32g_msc.h.
| #define MSC_IFS_ERASE_DEFAULT (_MSC_IFS_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 207 of file efm32g_msc.h.
| #define MSC_IFS_WRITE (0x1UL << 1) |
Write Done Interrupt Set
Definition at line 208 of file efm32g_msc.h.
| #define MSC_IFS_WRITE_DEFAULT (_MSC_IFS_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 212 of file efm32g_msc.h.
| #define MSC_LOCK_LOCKKEY_DEFAULT (_MSC_LOCK_LOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_LOCK
Definition at line 252 of file efm32g_msc.h.
| #define MSC_LOCK_LOCKKEY_LOCK (_MSC_LOCK_LOCKKEY_LOCK << 0) |
Shifted mode LOCK for MSC_LOCK
Definition at line 253 of file efm32g_msc.h.
| #define MSC_LOCK_LOCKKEY_LOCKED (_MSC_LOCK_LOCKKEY_LOCKED << 0) |
Shifted mode LOCKED for MSC_LOCK
Definition at line 255 of file efm32g_msc.h.
| #define MSC_LOCK_LOCKKEY_UNLOCK (_MSC_LOCK_LOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for MSC_LOCK
Definition at line 256 of file efm32g_msc.h.
| #define MSC_LOCK_LOCKKEY_UNLOCKED (_MSC_LOCK_LOCKKEY_UNLOCKED << 0) |
Shifted mode UNLOCKED for MSC_LOCK
Definition at line 254 of file efm32g_msc.h.
| #define MSC_READCTRL_MODE_DEFAULT (_MSC_READCTRL_MODE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 88 of file efm32g_msc.h.
| #define MSC_READCTRL_MODE_WS0 (_MSC_READCTRL_MODE_WS0 << 0) |
Shifted mode WS0 for MSC_READCTRL
Definition at line 87 of file efm32g_msc.h.
Referenced by MSC_ExecConfigSet().
| #define MSC_READCTRL_MODE_WS0SCBTP (_MSC_READCTRL_MODE_WS0SCBTP << 0) |
Shifted mode WS0SCBTP for MSC_READCTRL
Definition at line 90 of file efm32g_msc.h.
Referenced by MSC_ExecConfigSet().
| #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 0) |
Shifted mode WS1 for MSC_READCTRL
Definition at line 89 of file efm32g_msc.h.
Referenced by MSC_ExecConfigSet().
| #define MSC_READCTRL_MODE_WS1SCBTP (_MSC_READCTRL_MODE_WS1SCBTP << 0) |
Shifted mode WS1SCBTP for MSC_READCTRL
Definition at line 91 of file efm32g_msc.h.
Referenced by MSC_ExecConfigSet().
| #define MSC_STATUS_BUSY (0x1UL << 0) |
| #define MSC_STATUS_BUSY_DEFAULT (_MSC_STATUS_BUSY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 159 of file efm32g_msc.h.
| #define MSC_STATUS_ERASEABORTED (0x1UL << 5) |
The Current Flash Erase Operation Aborted
Definition at line 180 of file efm32g_msc.h.
| #define MSC_STATUS_ERASEABORTED_DEFAULT (_MSC_STATUS_ERASEABORTED_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 184 of file efm32g_msc.h.
| #define MSC_STATUS_INVADDR (0x1UL << 2) |
Invalid Write Address or Erase Page
Definition at line 165 of file efm32g_msc.h.
Referenced by MSC_ErasePage().
| #define MSC_STATUS_INVADDR_DEFAULT (_MSC_STATUS_INVADDR_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 169 of file efm32g_msc.h.
| #define MSC_STATUS_LOCKED (0x1UL << 1) |
| #define MSC_STATUS_LOCKED_DEFAULT (_MSC_STATUS_LOCKED_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 164 of file efm32g_msc.h.
| #define MSC_STATUS_WDATAREADY (0x1UL << 3) |
WDATA Write Ready
Definition at line 170 of file efm32g_msc.h.
| #define MSC_STATUS_WDATAREADY_DEFAULT (_MSC_STATUS_WDATAREADY_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 174 of file efm32g_msc.h.
| #define MSC_STATUS_WORDTIMEOUT (0x1UL << 4) |
Flash Write Word Timeout
Definition at line 175 of file efm32g_msc.h.
| #define MSC_STATUS_WORDTIMEOUT_DEFAULT (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 179 of file efm32g_msc.h.
| #define MSC_WDATA_WDATA_DEFAULT (_MSC_WDATA_WDATA_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WDATA
Definition at line 150 of file efm32g_msc.h.
| #define MSC_WRITECMD_ERASEPAGE (0x1UL << 1) |
| #define MSC_WRITECMD_ERASEPAGE_DEFAULT (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 119 of file efm32g_msc.h.
| #define MSC_WRITECMD_LADDRIM (0x1UL << 0) |
Load MSC_ADDRB into ADDR
Definition at line 110 of file efm32g_msc.h.
Referenced by MSC_ErasePage().
| #define MSC_WRITECMD_LADDRIM_DEFAULT (_MSC_WRITECMD_LADDRIM_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 114 of file efm32g_msc.h.
| #define MSC_WRITECMD_WRITEEND (0x1UL << 2) |
End Write Mode
Definition at line 120 of file efm32g_msc.h.
| #define MSC_WRITECMD_WRITEEND_DEFAULT (_MSC_WRITECMD_WRITEEND_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 124 of file efm32g_msc.h.
| #define MSC_WRITECMD_WRITEONCE (0x1UL << 3) |
Word Write-Once Trigger
Definition at line 125 of file efm32g_msc.h.
| #define MSC_WRITECMD_WRITEONCE_DEFAULT (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 129 of file efm32g_msc.h.
| #define MSC_WRITECMD_WRITETRIG (0x1UL << 4) |
Word Write Sequence Trigger
Definition at line 130 of file efm32g_msc.h.
| #define MSC_WRITECMD_WRITETRIG_DEFAULT (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 134 of file efm32g_msc.h.
| #define MSC_WRITECTRL_IRQERASEABORT (0x1UL << 1) |
Abort Page Erase on Interrupt
Definition at line 101 of file efm32g_msc.h.
| #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line 105 of file efm32g_msc.h.
| #define MSC_WRITECTRL_WREN (0x1UL << 0) |
Enable Write/Erase Controller
Definition at line 96 of file efm32g_msc.h.
Referenced by MSC_Deinit(), MSC_ErasePage(), and MSC_Init().
| #define MSC_WRITECTRL_WREN_DEFAULT (_MSC_WRITECTRL_WREN_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line 100 of file efm32g_msc.h.
1.8.10 
