34 #if defined(PCNT_COUNT) && (PCNT_COUNT > 0)
65 #define PCNT_REF_VALID(ref) ((ref) == PCNT0)
66 #elif (PCNT_COUNT == 2)
67 #define PCNT_REF_VALID(ref) (((ref) == PCNT0) || ((ref) == PCNT1))
68 #elif (PCNT_COUNT == 3)
69 #define PCNT_REF_VALID(ref) (((ref) == PCNT0) || ((ref) == PCNT1) || \
72 #error "Undefined number of pulse counters (PCNT)."
94 __STATIC_INLINE
unsigned int PCNT_Map(
PCNT_TypeDef *pcnt)
111 __STATIC_INLINE
void PCNT_Sync(
PCNT_TypeDef *pcnt, uint32_t mask)
148 EFM_ASSERT(PCNT_REF_VALID(pcnt));
186 EFM_ASSERT(PCNT_REF_VALID(pcnt));
288 EFM_ASSERT(PCNT_REF_VALID(pcnt));
299 #if defined(_PCNT_INPUT_MASK)
317 PCNT_PRSInput_TypeDef prsInput,
320 EFM_ASSERT(PCNT_REF_VALID(pcnt));
373 EFM_ASSERT(PCNT_REF_VALID(pcnt));
440 EFM_ASSERT(PCNT_REF_VALID(pcnt));
467 inst = PCNT_Map(pcnt);
469 #if defined(_PCNT_INPUT_MASK)
473 tmp = pcnt->INPUT & ~(_PCNT_INPUT_S0PRSSEL_MASK | _PCNT_INPUT_S1PRSSEL_MASK);
474 tmp |= ((uint32_t)init->s0PRS << _PCNT_INPUT_S0PRSSEL_SHIFT) |
475 ((uint32_t)init->s1PRS << _PCNT_INPUT_S1PRSSEL_SHIFT);
496 #if defined(PCNT_CTRL_HYST)
499 tmp |= PCNT_CTRL_HYST;
503 #if defined(PCNT_CTRL_S1CDIR)
506 tmp |= PCNT_CTRL_S1CDIR;
511 #if defined(_PCNT_CTRL_CNTEV_SHIFT)
512 tmp |= init->cntEvent << _PCNT_CTRL_CNTEV_SHIFT;
515 #if defined(_PCNT_CTRL_AUXCNTEV_SHIFT)
522 uint32_t auxCntEventField = 0;
523 switch (init->auxCntEvent)
525 case pcntCntEventBoth:
526 auxCntEventField = pcntCntEventNone;
528 case pcntCntEventNone:
529 auxCntEventField = pcntCntEventBoth;
532 case pcntCntEventDown:
533 auxCntEventField = init->auxCntEvent;
540 tmp |= auxCntEventField << _PCNT_CTRL_AUXCNTEV_SHIFT;
648 EFM_ASSERT(PCNT_REF_VALID(pcnt));
651 inst = PCNT_Map(pcnt);
680 #if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
698 void PCNT_FilterConfiguration(
PCNT_TypeDef *pcnt,
const PCNT_Filter_TypeDef *config,
bool enable) {
701 EFM_ASSERT(PCNT_REF_VALID(pcnt));
704 ovscfg = ((config->filtLen & _PCNT_OVSCFG_FILTLEN_MASK) << _PCNT_OVSCFG_FILTLEN_SHIFT)
705 | ((config->flutterrm & 0x1) << _PCNT_OVSCFG_FLUTTERRM_SHIFT);
708 PCNT_Sync(pcnt, PCNT_SYNCBUSY_OVSCFG);
709 pcnt->OVSCFG = ovscfg;
725 #if defined(PCNT_CTRL_TCCMODE_DEFAULT)
747 void PCNT_TCCConfiguration(
PCNT_TypeDef *pcnt,
const PCNT_TCC_TypeDef *config){
749 uint32_t mask = _PCNT_CTRL_TCCMODE_MASK
750 | _PCNT_CTRL_TCCPRESC_MASK
751 | _PCNT_CTRL_TCCCOMP_MASK
752 | _PCNT_CTRL_PRSGATEEN_MASK
753 | _PCNT_CTRL_TCCPRSPOL_MASK
754 | _PCNT_CTRL_TCCPRSSEL_MASK;
756 EFM_ASSERT(PCNT_REF_VALID(pcnt));
759 ctrl |= (config->mode << _PCNT_CTRL_TCCMODE_SHIFT ) & _PCNT_CTRL_TCCMODE_MASK;
760 ctrl |= (config->prescaler << _PCNT_CTRL_TCCPRESC_SHIFT ) & _PCNT_CTRL_TCCPRESC_MASK;
761 ctrl |= (config->compare << _PCNT_CTRL_TCCCOMP_SHIFT ) & _PCNT_CTRL_TCCCOMP_MASK;
762 ctrl |= (config->tccPRS << _PCNT_CTRL_TCCPRSSEL_SHIFT ) & _PCNT_CTRL_TCCPRSSEL_MASK;
763 ctrl |= (config->prsPolarity << _PCNT_CTRL_TCCPRSPOL_SHIFT ) & _PCNT_CTRL_TCCPRSPOL_MASK;
764 ctrl |= (config->prsGateEnable << _PCNT_CTRL_PRSGATEEN_SHIFT ) & _PCNT_CTRL_PRSGATEEN_MASK;
768 pcnt->
CTRL = (pcnt->
CTRL & (~mask)) | ctrl;
790 EFM_ASSERT(PCNT_REF_VALID(pcnt));
816 EFM_ASSERT(PCNT_REF_VALID(pcnt));
Clock management unit (CMU) API.
#define PCNT_SYNCBUSY_CTRL
#define _PCNT_CTRL_RESETVALUE
void PCNT_CounterTopSet(PCNT_TypeDef *pcnt, uint32_t count, uint32_t top)
Set counter and top values.
void CMU_PCNTClockExternalSet(unsigned int instance, bool external)
Select PCNTn clock.
#define _PCNT_CTRL_MODE_MASK
#define PCNT_FREEZE_REGFREEZE
void PCNT_Enable(PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode)
Set PCNT operational mode.
Emlib peripheral API "assert" implementation.
#define _PCNT_CTRL_RSTEN_SHIFT
RAM and peripheral bit-field set and clear API.
void PCNT_TopSet(PCNT_TypeDef *pcnt, uint32_t val)
Set top value.
#define _PCNT_CTRL_MODE_SHIFT
Pulse Counter (PCNT) peripheral API.
#define PCNT_CTRL_CNTDIR_DOWN
#define PCNT_CTRL_EDGE_NEG
#define PCNT_CTRL_MODE_DISABLE
#define _PCNT_IEN_RESETVALUE
void PCNT_CounterReset(PCNT_TypeDef *pcnt)
Reset PCNT counters and TOP register.
void PCNT_Init(PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init)
Init pulse counter.
void PCNT_TopBufferSet(PCNT_TypeDef *pcnt, uint32_t val)
Set top buffer value.
#define _PCNT_TOPB_RESETVALUE
void PCNT_FreezeEnable(PCNT_TypeDef *pcnt, bool enable)
PCNT register synchronization freeze control.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
#define PCNT_SYNCBUSY_TOPB
void PCNT_Reset(PCNT_TypeDef *pcnt)
Reset PCNT to same state as after a HW reset.
#define PCNT_SYNCBUSY_CMD