88 #if !defined(__GNUC__)
92 #define SL_MIN(a, b) ((a) < (b) ? (a) : (b))
95 #define SL_MAX(a, b) ((a) > (b) ? (a) : (b))
98 #define STRINGIZE(X) #X
99 #define SL_PACK_START(X) _Pragma(STRINGIZE(pack(X)))
100 #define SL_PACK_END() _Pragma("pack()")
101 #define SL_ATTRIBUTE_PACKED
103 #if defined(__CC_ARM)
105 #define SL_ALIGN(X) __align(X)
108 #define SL_WEAK __attribute__ ((weak))
111 #define SL_NORETURN __attribute__ ((noreturn))
114 #define SL_ATTRIBUTE_SECTION(X) __attribute__ ((section(X)))
117 #if defined(__ICCARM__)
119 #define SL_ALIGN(X) _Pragma(STRINGIZE(data_alignment=X))
122 #define SL_WEAK __weak
125 #define SL_NORETURN __noreturn
128 #define SL_ATTRIBUTE_SECTION(X) @ X
131 #define SL_ATTRIBUTE_ALIGN(X)
133 #else // !defined(__GNUC__)
137 #define SL_MIN(a, b) __extension__({__typeof__(a) _a = (a); __typeof__(b) _b = (b); _a < _b ? _a : _b;})
140 #define SL_MAX(a, b) __extension__({__typeof__(a) _a = (a); __typeof__(b) _b = (b); _a > _b ? _a : _b;})
143 #define SL_ATTRIBUTE_PACKED __attribute__ ((packed))
150 #define SL_PACK_START(x)
157 #define SL_PACK_END()
160 #define SL_ATTRIBUTE_ALIGN(X) __attribute__ ((aligned(X)))
171 #define SL_WEAK __attribute__ ((weak))
174 #define SL_NORETURN __attribute__ ((noreturn))
180 #define SL_ATTRIBUTE_SECTION(X) __attribute__ ((section(X)))
182 #endif // !defined(__GNUC__)
194 __STATIC_INLINE uint32_t
SL_CTZ(uint32_t value)
196 #if (__CORTEX_M >= 3)
197 return __CLZ(__RBIT(value));
201 for(zeros=0; (zeros<32) && ((value&0x1) == 0); zeros++, value>>=1);
208 __STATIC_INLINE uint32_t EFM32_CTZ(uint32_t value)
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
__STATIC_INLINE uint32_t SL_CTZ(uint32_t value)
Count trailing number of zeros. Use CLZ instruction if available.