EFM32 Gecko Software Documentation  efm32g-doc-5.1.2
efm32g_emu.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t MEMCTRL;
45  __IOM uint32_t LOCK;
46  uint32_t RESERVED0[6];
47  __IOM uint32_t AUXCTRL;
48 } EMU_TypeDef;
50 /**************************************************************************/
55 /* Bit fields for EMU CTRL */
56 #define _EMU_CTRL_RESETVALUE 0x00000000UL
57 #define _EMU_CTRL_MASK 0x0000000FUL
58 #define EMU_CTRL_EMVREG (0x1UL << 0)
59 #define _EMU_CTRL_EMVREG_SHIFT 0
60 #define _EMU_CTRL_EMVREG_MASK 0x1UL
61 #define _EMU_CTRL_EMVREG_DEFAULT 0x00000000UL
62 #define _EMU_CTRL_EMVREG_REDUCED 0x00000000UL
63 #define _EMU_CTRL_EMVREG_FULL 0x00000001UL
64 #define EMU_CTRL_EMVREG_DEFAULT (_EMU_CTRL_EMVREG_DEFAULT << 0)
65 #define EMU_CTRL_EMVREG_REDUCED (_EMU_CTRL_EMVREG_REDUCED << 0)
66 #define EMU_CTRL_EMVREG_FULL (_EMU_CTRL_EMVREG_FULL << 0)
67 #define EMU_CTRL_EM2BLOCK (0x1UL << 1)
68 #define _EMU_CTRL_EM2BLOCK_SHIFT 1
69 #define _EMU_CTRL_EM2BLOCK_MASK 0x2UL
70 #define _EMU_CTRL_EM2BLOCK_DEFAULT 0x00000000UL
71 #define EMU_CTRL_EM2BLOCK_DEFAULT (_EMU_CTRL_EM2BLOCK_DEFAULT << 1)
72 #define _EMU_CTRL_EM4CTRL_SHIFT 2
73 #define _EMU_CTRL_EM4CTRL_MASK 0xCUL
74 #define _EMU_CTRL_EM4CTRL_DEFAULT 0x00000000UL
75 #define EMU_CTRL_EM4CTRL_DEFAULT (_EMU_CTRL_EM4CTRL_DEFAULT << 2)
77 /* Bit fields for EMU MEMCTRL */
78 #define _EMU_MEMCTRL_RESETVALUE 0x00000000UL
79 #define _EMU_MEMCTRL_MASK 0x00000007UL
80 #define _EMU_MEMCTRL_POWERDOWN_SHIFT 0
81 #define _EMU_MEMCTRL_POWERDOWN_MASK 0x7UL
82 #define _EMU_MEMCTRL_POWERDOWN_DEFAULT 0x00000000UL
83 #define _EMU_MEMCTRL_POWERDOWN_BLK3 0x00000004UL
84 #define _EMU_MEMCTRL_POWERDOWN_BLK23 0x00000006UL
85 #define _EMU_MEMCTRL_POWERDOWN_BLK123 0x00000007UL
86 #define EMU_MEMCTRL_POWERDOWN_DEFAULT (_EMU_MEMCTRL_POWERDOWN_DEFAULT << 0)
87 #define EMU_MEMCTRL_POWERDOWN_BLK3 (_EMU_MEMCTRL_POWERDOWN_BLK3 << 0)
88 #define EMU_MEMCTRL_POWERDOWN_BLK23 (_EMU_MEMCTRL_POWERDOWN_BLK23 << 0)
89 #define EMU_MEMCTRL_POWERDOWN_BLK123 (_EMU_MEMCTRL_POWERDOWN_BLK123 << 0)
91 /* Bit fields for EMU LOCK */
92 #define _EMU_LOCK_RESETVALUE 0x00000000UL
93 #define _EMU_LOCK_MASK 0x0000FFFFUL
94 #define _EMU_LOCK_LOCKKEY_SHIFT 0
95 #define _EMU_LOCK_LOCKKEY_MASK 0xFFFFUL
96 #define _EMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL
97 #define _EMU_LOCK_LOCKKEY_LOCK 0x00000000UL
98 #define _EMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
99 #define _EMU_LOCK_LOCKKEY_LOCKED 0x00000001UL
100 #define _EMU_LOCK_LOCKKEY_UNLOCK 0x0000ADE8UL
101 #define EMU_LOCK_LOCKKEY_DEFAULT (_EMU_LOCK_LOCKKEY_DEFAULT << 0)
102 #define EMU_LOCK_LOCKKEY_LOCK (_EMU_LOCK_LOCKKEY_LOCK << 0)
103 #define EMU_LOCK_LOCKKEY_UNLOCKED (_EMU_LOCK_LOCKKEY_UNLOCKED << 0)
104 #define EMU_LOCK_LOCKKEY_LOCKED (_EMU_LOCK_LOCKKEY_LOCKED << 0)
105 #define EMU_LOCK_LOCKKEY_UNLOCK (_EMU_LOCK_LOCKKEY_UNLOCK << 0)
107 /* Bit fields for EMU AUXCTRL */
108 #define _EMU_AUXCTRL_RESETVALUE 0x00000000UL
109 #define _EMU_AUXCTRL_MASK 0x00000001UL
110 #define EMU_AUXCTRL_HRCCLR (0x1UL << 0)
111 #define _EMU_AUXCTRL_HRCCLR_SHIFT 0
112 #define _EMU_AUXCTRL_HRCCLR_MASK 0x1UL
113 #define _EMU_AUXCTRL_HRCCLR_DEFAULT 0x00000000UL
114 #define EMU_AUXCTRL_HRCCLR_DEFAULT (_EMU_AUXCTRL_HRCCLR_DEFAULT << 0)
__IOM uint32_t MEMCTRL
Definition: efm32g_emu.h:44
__IOM uint32_t CTRL
Definition: efm32g_emu.h:43
__IOM uint32_t AUXCTRL
Definition: efm32g_emu.h:47
__IOM uint32_t LOCK
Definition: efm32g_emu.h:45