EZR32 Wonder Gecko Software Documentation  ezr32wg-doc-5.1.2
EZR32WG_DAC_BitFields

Detailed Description

Macros

#define _DAC_BIASPROG_BIASPROG_DEFAULT   0x00000007UL
 
#define _DAC_BIASPROG_BIASPROG_MASK   0xFUL
 
#define _DAC_BIASPROG_BIASPROG_SHIFT   0
 
#define _DAC_BIASPROG_HALFBIAS_DEFAULT   0x00000001UL
 
#define _DAC_BIASPROG_HALFBIAS_MASK   0x40UL
 
#define _DAC_BIASPROG_HALFBIAS_SHIFT   6
 
#define _DAC_BIASPROG_MASK   0x00004F4FUL
 
#define _DAC_BIASPROG_OPA2BIASPROG_DEFAULT   0x00000007UL
 
#define _DAC_BIASPROG_OPA2BIASPROG_MASK   0xF00UL
 
#define _DAC_BIASPROG_OPA2BIASPROG_SHIFT   8
 
#define _DAC_BIASPROG_OPA2HALFBIAS_DEFAULT   0x00000001UL
 
#define _DAC_BIASPROG_OPA2HALFBIAS_MASK   0x4000UL
 
#define _DAC_BIASPROG_OPA2HALFBIAS_SHIFT   14
 
#define _DAC_BIASPROG_RESETVALUE   0x00004747UL
 
#define _DAC_CAL_CH0OFFSET_DEFAULT   0x00000000UL
 
#define _DAC_CAL_CH0OFFSET_MASK   0x3FUL
 
#define _DAC_CAL_CH0OFFSET_SHIFT   0
 
#define _DAC_CAL_CH1OFFSET_DEFAULT   0x00000000UL
 
#define _DAC_CAL_CH1OFFSET_MASK   0x3F00UL
 
#define _DAC_CAL_CH1OFFSET_SHIFT   8
 
#define _DAC_CAL_GAIN_DEFAULT   0x00000040UL
 
#define _DAC_CAL_GAIN_MASK   0x7F0000UL
 
#define _DAC_CAL_GAIN_SHIFT   16
 
#define _DAC_CAL_MASK   0x007F3F3FUL
 
#define _DAC_CAL_RESETVALUE   0x00400000UL
 
#define _DAC_CH0CTRL_EN_DEFAULT   0x00000000UL
 
#define _DAC_CH0CTRL_EN_MASK   0x1UL
 
#define _DAC_CH0CTRL_EN_SHIFT   0
 
#define _DAC_CH0CTRL_MASK   0x000000F7UL
 
#define _DAC_CH0CTRL_PRSEN_DEFAULT   0x00000000UL
 
#define _DAC_CH0CTRL_PRSEN_MASK   0x4UL
 
#define _DAC_CH0CTRL_PRSEN_SHIFT   2
 
#define _DAC_CH0CTRL_PRSSEL_DEFAULT   0x00000000UL
 
#define _DAC_CH0CTRL_PRSSEL_MASK   0xF0UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH0   0x00000000UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH1   0x00000001UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH10   0x0000000AUL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH11   0x0000000BUL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH2   0x00000002UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH3   0x00000003UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH4   0x00000004UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH5   0x00000005UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH6   0x00000006UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH7   0x00000007UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH8   0x00000008UL
 
#define _DAC_CH0CTRL_PRSSEL_PRSCH9   0x00000009UL
 
#define _DAC_CH0CTRL_PRSSEL_SHIFT   4
 
#define _DAC_CH0CTRL_REFREN_DEFAULT   0x00000000UL
 
#define _DAC_CH0CTRL_REFREN_MASK   0x2UL
 
#define _DAC_CH0CTRL_REFREN_SHIFT   1
 
#define _DAC_CH0CTRL_RESETVALUE   0x00000000UL
 
#define _DAC_CH0DATA_DATA_DEFAULT   0x00000000UL
 
#define _DAC_CH0DATA_DATA_MASK   0xFFFUL
 
#define _DAC_CH0DATA_DATA_SHIFT   0
 
#define _DAC_CH0DATA_MASK   0x00000FFFUL
 
#define _DAC_CH0DATA_RESETVALUE   0x00000000UL
 
#define _DAC_CH1CTRL_EN_DEFAULT   0x00000000UL
 
#define _DAC_CH1CTRL_EN_MASK   0x1UL
 
#define _DAC_CH1CTRL_EN_SHIFT   0
 
#define _DAC_CH1CTRL_MASK   0x000000F7UL
 
#define _DAC_CH1CTRL_PRSEN_DEFAULT   0x00000000UL
 
#define _DAC_CH1CTRL_PRSEN_MASK   0x4UL
 
#define _DAC_CH1CTRL_PRSEN_SHIFT   2
 
#define _DAC_CH1CTRL_PRSSEL_DEFAULT   0x00000000UL
 
#define _DAC_CH1CTRL_PRSSEL_MASK   0xF0UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH0   0x00000000UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH1   0x00000001UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH10   0x0000000AUL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH11   0x0000000BUL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH2   0x00000002UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH3   0x00000003UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH4   0x00000004UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH5   0x00000005UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH6   0x00000006UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH7   0x00000007UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH8   0x00000008UL
 
#define _DAC_CH1CTRL_PRSSEL_PRSCH9   0x00000009UL
 
#define _DAC_CH1CTRL_PRSSEL_SHIFT   4
 
#define _DAC_CH1CTRL_REFREN_DEFAULT   0x00000000UL
 
#define _DAC_CH1CTRL_REFREN_MASK   0x2UL
 
#define _DAC_CH1CTRL_REFREN_SHIFT   1
 
#define _DAC_CH1CTRL_RESETVALUE   0x00000000UL
 
#define _DAC_CH1DATA_DATA_DEFAULT   0x00000000UL
 
#define _DAC_CH1DATA_DATA_MASK   0xFFFUL
 
#define _DAC_CH1DATA_DATA_SHIFT   0
 
#define _DAC_CH1DATA_MASK   0x00000FFFUL
 
#define _DAC_CH1DATA_RESETVALUE   0x00000000UL
 
#define _DAC_COMBDATA_CH0DATA_DEFAULT   0x00000000UL
 
#define _DAC_COMBDATA_CH0DATA_MASK   0xFFFUL
 
#define _DAC_COMBDATA_CH0DATA_SHIFT   0
 
#define _DAC_COMBDATA_CH1DATA_DEFAULT   0x00000000UL
 
#define _DAC_COMBDATA_CH1DATA_MASK   0xFFF0000UL
 
#define _DAC_COMBDATA_CH1DATA_SHIFT   16
 
#define _DAC_COMBDATA_MASK   0x0FFF0FFFUL
 
#define _DAC_COMBDATA_RESETVALUE   0x00000000UL
 
#define _DAC_CTRL_CH0PRESCRST_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_CH0PRESCRST_MASK   0x80UL
 
#define _DAC_CTRL_CH0PRESCRST_SHIFT   7
 
#define _DAC_CTRL_CONVMODE_CONTINUOUS   0x00000000UL
 
#define _DAC_CTRL_CONVMODE_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_CONVMODE_MASK   0xCUL
 
#define _DAC_CTRL_CONVMODE_SAMPLEHOLD   0x00000001UL
 
#define _DAC_CTRL_CONVMODE_SAMPLEOFF   0x00000002UL
 
#define _DAC_CTRL_CONVMODE_SHIFT   2
 
#define _DAC_CTRL_DIFF_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_DIFF_MASK   0x1UL
 
#define _DAC_CTRL_DIFF_SHIFT   0
 
#define _DAC_CTRL_MASK   0x003703FFUL
 
#define _DAC_CTRL_OUTENPRS_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_OUTENPRS_MASK   0x40UL
 
#define _DAC_CTRL_OUTENPRS_SHIFT   6
 
#define _DAC_CTRL_OUTMODE_ADC   0x00000002UL
 
#define _DAC_CTRL_OUTMODE_DEFAULT   0x00000001UL
 
#define _DAC_CTRL_OUTMODE_DISABLE   0x00000000UL
 
#define _DAC_CTRL_OUTMODE_MASK   0x30UL
 
#define _DAC_CTRL_OUTMODE_PIN   0x00000001UL
 
#define _DAC_CTRL_OUTMODE_PINADC   0x00000003UL
 
#define _DAC_CTRL_OUTMODE_SHIFT   4
 
#define _DAC_CTRL_PRESC_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_PRESC_MASK   0x70000UL
 
#define _DAC_CTRL_PRESC_NODIVISION   0x00000000UL
 
#define _DAC_CTRL_PRESC_SHIFT   16
 
#define _DAC_CTRL_REFRSEL_16CYCLES   0x00000001UL
 
#define _DAC_CTRL_REFRSEL_32CYCLES   0x00000002UL
 
#define _DAC_CTRL_REFRSEL_64CYCLES   0x00000003UL
 
#define _DAC_CTRL_REFRSEL_8CYCLES   0x00000000UL
 
#define _DAC_CTRL_REFRSEL_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_REFRSEL_MASK   0x300000UL
 
#define _DAC_CTRL_REFRSEL_SHIFT   20
 
#define _DAC_CTRL_REFSEL_1V25   0x00000000UL
 
#define _DAC_CTRL_REFSEL_2V5   0x00000001UL
 
#define _DAC_CTRL_REFSEL_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_REFSEL_MASK   0x300UL
 
#define _DAC_CTRL_REFSEL_SHIFT   8
 
#define _DAC_CTRL_REFSEL_VDD   0x00000002UL
 
#define _DAC_CTRL_RESETVALUE   0x00000010UL
 
#define _DAC_CTRL_SINEMODE_DEFAULT   0x00000000UL
 
#define _DAC_CTRL_SINEMODE_MASK   0x2UL
 
#define _DAC_CTRL_SINEMODE_SHIFT   1
 
#define _DAC_IEN_CH0_DEFAULT   0x00000000UL
 
#define _DAC_IEN_CH0_MASK   0x1UL
 
#define _DAC_IEN_CH0_SHIFT   0
 
#define _DAC_IEN_CH0UF_DEFAULT   0x00000000UL
 
#define _DAC_IEN_CH0UF_MASK   0x10UL
 
#define _DAC_IEN_CH0UF_SHIFT   4
 
#define _DAC_IEN_CH1_DEFAULT   0x00000000UL
 
#define _DAC_IEN_CH1_MASK   0x2UL
 
#define _DAC_IEN_CH1_SHIFT   1
 
#define _DAC_IEN_CH1UF_DEFAULT   0x00000000UL
 
#define _DAC_IEN_CH1UF_MASK   0x20UL
 
#define _DAC_IEN_CH1UF_SHIFT   5
 
#define _DAC_IEN_MASK   0x00000033UL
 
#define _DAC_IEN_RESETVALUE   0x00000000UL
 
#define _DAC_IF_CH0_DEFAULT   0x00000000UL
 
#define _DAC_IF_CH0_MASK   0x1UL
 
#define _DAC_IF_CH0_SHIFT   0
 
#define _DAC_IF_CH0UF_DEFAULT   0x00000000UL
 
#define _DAC_IF_CH0UF_MASK   0x10UL
 
#define _DAC_IF_CH0UF_SHIFT   4
 
#define _DAC_IF_CH1_DEFAULT   0x00000000UL
 
#define _DAC_IF_CH1_MASK   0x2UL
 
#define _DAC_IF_CH1_SHIFT   1
 
#define _DAC_IF_CH1UF_DEFAULT   0x00000000UL
 
#define _DAC_IF_CH1UF_MASK   0x20UL
 
#define _DAC_IF_CH1UF_SHIFT   5
 
#define _DAC_IF_MASK   0x00000033UL
 
#define _DAC_IF_RESETVALUE   0x00000000UL
 
#define _DAC_IFC_CH0_DEFAULT   0x00000000UL
 
#define _DAC_IFC_CH0_MASK   0x1UL
 
#define _DAC_IFC_CH0_SHIFT   0
 
#define _DAC_IFC_CH0UF_DEFAULT   0x00000000UL
 
#define _DAC_IFC_CH0UF_MASK   0x10UL
 
#define _DAC_IFC_CH0UF_SHIFT   4
 
#define _DAC_IFC_CH1_DEFAULT   0x00000000UL
 
#define _DAC_IFC_CH1_MASK   0x2UL
 
#define _DAC_IFC_CH1_SHIFT   1
 
#define _DAC_IFC_CH1UF_DEFAULT   0x00000000UL
 
#define _DAC_IFC_CH1UF_MASK   0x20UL
 
#define _DAC_IFC_CH1UF_SHIFT   5
 
#define _DAC_IFC_MASK   0x00000033UL
 
#define _DAC_IFC_RESETVALUE   0x00000000UL
 
#define _DAC_IFS_CH0_DEFAULT   0x00000000UL
 
#define _DAC_IFS_CH0_MASK   0x1UL
 
#define _DAC_IFS_CH0_SHIFT   0
 
#define _DAC_IFS_CH0UF_DEFAULT   0x00000000UL
 
#define _DAC_IFS_CH0UF_MASK   0x10UL
 
#define _DAC_IFS_CH0UF_SHIFT   4
 
#define _DAC_IFS_CH1_DEFAULT   0x00000000UL
 
#define _DAC_IFS_CH1_MASK   0x2UL
 
#define _DAC_IFS_CH1_SHIFT   1
 
#define _DAC_IFS_CH1UF_DEFAULT   0x00000000UL
 
#define _DAC_IFS_CH1UF_MASK   0x20UL
 
#define _DAC_IFS_CH1UF_SHIFT   5
 
#define _DAC_IFS_MASK   0x00000033UL
 
#define _DAC_IFS_RESETVALUE   0x00000000UL
 
#define _DAC_OPA0MUX_MASK   0x74C7F737UL
 
#define _DAC_OPA0MUX_NEGSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_NEGSEL_DISABLE   0x00000000UL
 
#define _DAC_OPA0MUX_NEGSEL_MASK   0x30UL
 
#define _DAC_OPA0MUX_NEGSEL_NEGPAD   0x00000003UL
 
#define _DAC_OPA0MUX_NEGSEL_OPATAP   0x00000002UL
 
#define _DAC_OPA0MUX_NEGSEL_SHIFT   4
 
#define _DAC_OPA0MUX_NEGSEL_UG   0x00000001UL
 
#define _DAC_OPA0MUX_NEXTOUT_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_NEXTOUT_MASK   0x4000000UL
 
#define _DAC_OPA0MUX_NEXTOUT_SHIFT   26
 
#define _DAC_OPA0MUX_NPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_NPEN_MASK   0x2000UL
 
#define _DAC_OPA0MUX_NPEN_SHIFT   13
 
#define _DAC_OPA0MUX_OUTMODE_ALL   0x00000003UL
 
#define _DAC_OPA0MUX_OUTMODE_ALT   0x00000002UL
 
#define _DAC_OPA0MUX_OUTMODE_DEFAULT   0x00000001UL
 
#define _DAC_OPA0MUX_OUTMODE_DISABLE   0x00000000UL
 
#define _DAC_OPA0MUX_OUTMODE_MAIN   0x00000001UL
 
#define _DAC_OPA0MUX_OUTMODE_MASK   0xC00000UL
 
#define _DAC_OPA0MUX_OUTMODE_SHIFT   22
 
#define _DAC_OPA0MUX_OUTPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_OUTPEN_MASK   0x7C000UL
 
#define _DAC_OPA0MUX_OUTPEN_OUT0   0x00000001UL
 
#define _DAC_OPA0MUX_OUTPEN_OUT1   0x00000002UL
 
#define _DAC_OPA0MUX_OUTPEN_OUT2   0x00000004UL
 
#define _DAC_OPA0MUX_OUTPEN_OUT3   0x00000008UL
 
#define _DAC_OPA0MUX_OUTPEN_OUT4   0x00000010UL
 
#define _DAC_OPA0MUX_OUTPEN_SHIFT   14
 
#define _DAC_OPA0MUX_POSSEL_DAC   0x00000001UL
 
#define _DAC_OPA0MUX_POSSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_POSSEL_DISABLE   0x00000000UL
 
#define _DAC_OPA0MUX_POSSEL_MASK   0x7UL
 
#define _DAC_OPA0MUX_POSSEL_OPA0INP   0x00000003UL
 
#define _DAC_OPA0MUX_POSSEL_OPATAP   0x00000004UL
 
#define _DAC_OPA0MUX_POSSEL_POSPAD   0x00000002UL
 
#define _DAC_OPA0MUX_POSSEL_SHIFT   0
 
#define _DAC_OPA0MUX_PPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_PPEN_MASK   0x1000UL
 
#define _DAC_OPA0MUX_PPEN_SHIFT   12
 
#define _DAC_OPA0MUX_RESETVALUE   0x00400000UL
 
#define _DAC_OPA0MUX_RESINMUX_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_RESINMUX_DISABLE   0x00000000UL
 
#define _DAC_OPA0MUX_RESINMUX_MASK   0x700UL
 
#define _DAC_OPA0MUX_RESINMUX_NEGPAD   0x00000002UL
 
#define _DAC_OPA0MUX_RESINMUX_OPA0INP   0x00000001UL
 
#define _DAC_OPA0MUX_RESINMUX_POSPAD   0x00000003UL
 
#define _DAC_OPA0MUX_RESINMUX_SHIFT   8
 
#define _DAC_OPA0MUX_RESINMUX_VSS   0x00000004UL
 
#define _DAC_OPA0MUX_RESSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA0MUX_RESSEL_MASK   0x70000000UL
 
#define _DAC_OPA0MUX_RESSEL_RES0   0x00000000UL
 
#define _DAC_OPA0MUX_RESSEL_RES1   0x00000001UL
 
#define _DAC_OPA0MUX_RESSEL_RES2   0x00000002UL
 
#define _DAC_OPA0MUX_RESSEL_RES3   0x00000003UL
 
#define _DAC_OPA0MUX_RESSEL_RES4   0x00000004UL
 
#define _DAC_OPA0MUX_RESSEL_RES5   0x00000005UL
 
#define _DAC_OPA0MUX_RESSEL_RES6   0x00000006UL
 
#define _DAC_OPA0MUX_RESSEL_RES7   0x00000007UL
 
#define _DAC_OPA0MUX_RESSEL_SHIFT   28
 
#define _DAC_OPA1MUX_MASK   0x74C7F737UL
 
#define _DAC_OPA1MUX_NEGSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_NEGSEL_DISABLE   0x00000000UL
 
#define _DAC_OPA1MUX_NEGSEL_MASK   0x30UL
 
#define _DAC_OPA1MUX_NEGSEL_NEGPAD   0x00000003UL
 
#define _DAC_OPA1MUX_NEGSEL_OPATAP   0x00000002UL
 
#define _DAC_OPA1MUX_NEGSEL_SHIFT   4
 
#define _DAC_OPA1MUX_NEGSEL_UG   0x00000001UL
 
#define _DAC_OPA1MUX_NEXTOUT_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_NEXTOUT_MASK   0x4000000UL
 
#define _DAC_OPA1MUX_NEXTOUT_SHIFT   26
 
#define _DAC_OPA1MUX_NPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_NPEN_MASK   0x2000UL
 
#define _DAC_OPA1MUX_NPEN_SHIFT   13
 
#define _DAC_OPA1MUX_OUTMODE_ALL   0x00000003UL
 
#define _DAC_OPA1MUX_OUTMODE_ALT   0x00000002UL
 
#define _DAC_OPA1MUX_OUTMODE_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_OUTMODE_DISABLE   0x00000000UL
 
#define _DAC_OPA1MUX_OUTMODE_MAIN   0x00000001UL
 
#define _DAC_OPA1MUX_OUTMODE_MASK   0xC00000UL
 
#define _DAC_OPA1MUX_OUTMODE_SHIFT   22
 
#define _DAC_OPA1MUX_OUTPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_OUTPEN_MASK   0x7C000UL
 
#define _DAC_OPA1MUX_OUTPEN_OUT0   0x00000001UL
 
#define _DAC_OPA1MUX_OUTPEN_OUT1   0x00000002UL
 
#define _DAC_OPA1MUX_OUTPEN_OUT2   0x00000004UL
 
#define _DAC_OPA1MUX_OUTPEN_OUT3   0x00000008UL
 
#define _DAC_OPA1MUX_OUTPEN_OUT4   0x00000010UL
 
#define _DAC_OPA1MUX_OUTPEN_SHIFT   14
 
#define _DAC_OPA1MUX_POSSEL_DAC   0x00000001UL
 
#define _DAC_OPA1MUX_POSSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_POSSEL_DISABLE   0x00000000UL
 
#define _DAC_OPA1MUX_POSSEL_MASK   0x7UL
 
#define _DAC_OPA1MUX_POSSEL_OPA0INP   0x00000003UL
 
#define _DAC_OPA1MUX_POSSEL_OPATAP   0x00000004UL
 
#define _DAC_OPA1MUX_POSSEL_POSPAD   0x00000002UL
 
#define _DAC_OPA1MUX_POSSEL_SHIFT   0
 
#define _DAC_OPA1MUX_PPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_PPEN_MASK   0x1000UL
 
#define _DAC_OPA1MUX_PPEN_SHIFT   12
 
#define _DAC_OPA1MUX_RESETVALUE   0x00000000UL
 
#define _DAC_OPA1MUX_RESINMUX_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_RESINMUX_DISABLE   0x00000000UL
 
#define _DAC_OPA1MUX_RESINMUX_MASK   0x700UL
 
#define _DAC_OPA1MUX_RESINMUX_NEGPAD   0x00000002UL
 
#define _DAC_OPA1MUX_RESINMUX_OPA0INP   0x00000001UL
 
#define _DAC_OPA1MUX_RESINMUX_POSPAD   0x00000003UL
 
#define _DAC_OPA1MUX_RESINMUX_SHIFT   8
 
#define _DAC_OPA1MUX_RESINMUX_VSS   0x00000004UL
 
#define _DAC_OPA1MUX_RESSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA1MUX_RESSEL_MASK   0x70000000UL
 
#define _DAC_OPA1MUX_RESSEL_RES0   0x00000000UL
 
#define _DAC_OPA1MUX_RESSEL_RES1   0x00000001UL
 
#define _DAC_OPA1MUX_RESSEL_RES2   0x00000002UL
 
#define _DAC_OPA1MUX_RESSEL_RES3   0x00000003UL
 
#define _DAC_OPA1MUX_RESSEL_RES4   0x00000004UL
 
#define _DAC_OPA1MUX_RESSEL_RES5   0x00000005UL
 
#define _DAC_OPA1MUX_RESSEL_RES6   0x00000006UL
 
#define _DAC_OPA1MUX_RESSEL_RES7   0x00000007UL
 
#define _DAC_OPA1MUX_RESSEL_SHIFT   28
 
#define _DAC_OPA2MUX_MASK   0x7440F737UL
 
#define _DAC_OPA2MUX_NEGSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_NEGSEL_DISABLE   0x00000000UL
 
#define _DAC_OPA2MUX_NEGSEL_MASK   0x30UL
 
#define _DAC_OPA2MUX_NEGSEL_NEGPAD   0x00000003UL
 
#define _DAC_OPA2MUX_NEGSEL_OPATAP   0x00000002UL
 
#define _DAC_OPA2MUX_NEGSEL_SHIFT   4
 
#define _DAC_OPA2MUX_NEGSEL_UG   0x00000001UL
 
#define _DAC_OPA2MUX_NEXTOUT_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_NEXTOUT_MASK   0x4000000UL
 
#define _DAC_OPA2MUX_NEXTOUT_SHIFT   26
 
#define _DAC_OPA2MUX_NPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_NPEN_MASK   0x2000UL
 
#define _DAC_OPA2MUX_NPEN_SHIFT   13
 
#define _DAC_OPA2MUX_OUTMODE_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_OUTMODE_MASK   0x400000UL
 
#define _DAC_OPA2MUX_OUTMODE_SHIFT   22
 
#define _DAC_OPA2MUX_OUTPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_OUTPEN_MASK   0xC000UL
 
#define _DAC_OPA2MUX_OUTPEN_OUT0   0x00000001UL
 
#define _DAC_OPA2MUX_OUTPEN_OUT1   0x00000002UL
 
#define _DAC_OPA2MUX_OUTPEN_SHIFT   14
 
#define _DAC_OPA2MUX_POSSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_POSSEL_DISABLE   0x00000000UL
 
#define _DAC_OPA2MUX_POSSEL_MASK   0x7UL
 
#define _DAC_OPA2MUX_POSSEL_OPA1INP   0x00000003UL
 
#define _DAC_OPA2MUX_POSSEL_OPATAP   0x00000004UL
 
#define _DAC_OPA2MUX_POSSEL_POSPAD   0x00000002UL
 
#define _DAC_OPA2MUX_POSSEL_SHIFT   0
 
#define _DAC_OPA2MUX_PPEN_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_PPEN_MASK   0x1000UL
 
#define _DAC_OPA2MUX_PPEN_SHIFT   12
 
#define _DAC_OPA2MUX_RESETVALUE   0x00000000UL
 
#define _DAC_OPA2MUX_RESINMUX_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_RESINMUX_DISABLE   0x00000000UL
 
#define _DAC_OPA2MUX_RESINMUX_MASK   0x700UL
 
#define _DAC_OPA2MUX_RESINMUX_NEGPAD   0x00000002UL
 
#define _DAC_OPA2MUX_RESINMUX_OPA1INP   0x00000001UL
 
#define _DAC_OPA2MUX_RESINMUX_POSPAD   0x00000003UL
 
#define _DAC_OPA2MUX_RESINMUX_SHIFT   8
 
#define _DAC_OPA2MUX_RESINMUX_VSS   0x00000004UL
 
#define _DAC_OPA2MUX_RESSEL_DEFAULT   0x00000000UL
 
#define _DAC_OPA2MUX_RESSEL_MASK   0x70000000UL
 
#define _DAC_OPA2MUX_RESSEL_RES0   0x00000000UL
 
#define _DAC_OPA2MUX_RESSEL_RES1   0x00000001UL
 
#define _DAC_OPA2MUX_RESSEL_RES2   0x00000002UL
 
#define _DAC_OPA2MUX_RESSEL_RES3   0x00000003UL
 
#define _DAC_OPA2MUX_RESSEL_RES4   0x00000004UL
 
#define _DAC_OPA2MUX_RESSEL_RES5   0x00000005UL
 
#define _DAC_OPA2MUX_RESSEL_RES6   0x00000006UL
 
#define _DAC_OPA2MUX_RESSEL_RES7   0x00000007UL
 
#define _DAC_OPA2MUX_RESSEL_SHIFT   28
 
#define _DAC_OPACTRL_MASK   0x01C3F1C7UL
 
#define _DAC_OPACTRL_OPA0EN_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA0EN_MASK   0x1UL
 
#define _DAC_OPACTRL_OPA0EN_SHIFT   0
 
#define _DAC_OPACTRL_OPA0HCMDIS_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA0HCMDIS_MASK   0x40UL
 
#define _DAC_OPACTRL_OPA0HCMDIS_SHIFT   6
 
#define _DAC_OPACTRL_OPA0LPFDIS_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA0LPFDIS_MASK   0x3000UL
 
#define _DAC_OPACTRL_OPA0LPFDIS_NLPFDIS   0x00000002UL
 
#define _DAC_OPACTRL_OPA0LPFDIS_PLPFDIS   0x00000001UL
 
#define _DAC_OPACTRL_OPA0LPFDIS_SHIFT   12
 
#define _DAC_OPACTRL_OPA0SHORT_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA0SHORT_MASK   0x400000UL
 
#define _DAC_OPACTRL_OPA0SHORT_SHIFT   22
 
#define _DAC_OPACTRL_OPA1EN_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA1EN_MASK   0x2UL
 
#define _DAC_OPACTRL_OPA1EN_SHIFT   1
 
#define _DAC_OPACTRL_OPA1HCMDIS_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA1HCMDIS_MASK   0x80UL
 
#define _DAC_OPACTRL_OPA1HCMDIS_SHIFT   7
 
#define _DAC_OPACTRL_OPA1LPFDIS_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA1LPFDIS_MASK   0xC000UL
 
#define _DAC_OPACTRL_OPA1LPFDIS_NLPFDIS   0x00000002UL
 
#define _DAC_OPACTRL_OPA1LPFDIS_PLPFDIS   0x00000001UL
 
#define _DAC_OPACTRL_OPA1LPFDIS_SHIFT   14
 
#define _DAC_OPACTRL_OPA1SHORT_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA1SHORT_MASK   0x800000UL
 
#define _DAC_OPACTRL_OPA1SHORT_SHIFT   23
 
#define _DAC_OPACTRL_OPA2EN_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA2EN_MASK   0x4UL
 
#define _DAC_OPACTRL_OPA2EN_SHIFT   2
 
#define _DAC_OPACTRL_OPA2HCMDIS_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA2HCMDIS_MASK   0x100UL
 
#define _DAC_OPACTRL_OPA2HCMDIS_SHIFT   8
 
#define _DAC_OPACTRL_OPA2LPFDIS_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA2LPFDIS_MASK   0x30000UL
 
#define _DAC_OPACTRL_OPA2LPFDIS_NLPFDIS   0x00000002UL
 
#define _DAC_OPACTRL_OPA2LPFDIS_PLPFDIS   0x00000001UL
 
#define _DAC_OPACTRL_OPA2LPFDIS_SHIFT   16
 
#define _DAC_OPACTRL_OPA2SHORT_DEFAULT   0x00000000UL
 
#define _DAC_OPACTRL_OPA2SHORT_MASK   0x1000000UL
 
#define _DAC_OPACTRL_OPA2SHORT_SHIFT   24
 
#define _DAC_OPACTRL_RESETVALUE   0x00000000UL
 
#define _DAC_OPAOFFSET_MASK   0x0000003FUL
 
#define _DAC_OPAOFFSET_OPA2OFFSET_DEFAULT   0x00000020UL
 
#define _DAC_OPAOFFSET_OPA2OFFSET_MASK   0x3FUL
 
#define _DAC_OPAOFFSET_OPA2OFFSET_SHIFT   0
 
#define _DAC_OPAOFFSET_RESETVALUE   0x00000020UL
 
#define _DAC_STATUS_CH0DV_DEFAULT   0x00000000UL
 
#define _DAC_STATUS_CH0DV_MASK   0x1UL
 
#define _DAC_STATUS_CH0DV_SHIFT   0
 
#define _DAC_STATUS_CH1DV_DEFAULT   0x00000000UL
 
#define _DAC_STATUS_CH1DV_MASK   0x2UL
 
#define _DAC_STATUS_CH1DV_SHIFT   1
 
#define _DAC_STATUS_MASK   0x00000003UL
 
#define _DAC_STATUS_RESETVALUE   0x00000000UL
 
#define DAC_BIASPROG_BIASPROG_DEFAULT   (_DAC_BIASPROG_BIASPROG_DEFAULT << 0)
 
#define DAC_BIASPROG_HALFBIAS   (0x1UL << 6)
 
#define DAC_BIASPROG_HALFBIAS_DEFAULT   (_DAC_BIASPROG_HALFBIAS_DEFAULT << 6)
 
#define DAC_BIASPROG_OPA2BIASPROG_DEFAULT   (_DAC_BIASPROG_OPA2BIASPROG_DEFAULT << 8)
 
#define DAC_BIASPROG_OPA2HALFBIAS   (0x1UL << 14)
 
#define DAC_BIASPROG_OPA2HALFBIAS_DEFAULT   (_DAC_BIASPROG_OPA2HALFBIAS_DEFAULT << 14)
 
#define DAC_CAL_CH0OFFSET_DEFAULT   (_DAC_CAL_CH0OFFSET_DEFAULT << 0)
 
#define DAC_CAL_CH1OFFSET_DEFAULT   (_DAC_CAL_CH1OFFSET_DEFAULT << 8)
 
#define DAC_CAL_GAIN_DEFAULT   (_DAC_CAL_GAIN_DEFAULT << 16)
 
#define DAC_CH0CTRL_EN   (0x1UL << 0)
 
#define DAC_CH0CTRL_EN_DEFAULT   (_DAC_CH0CTRL_EN_DEFAULT << 0)
 
#define DAC_CH0CTRL_PRSEN   (0x1UL << 2)
 
#define DAC_CH0CTRL_PRSEN_DEFAULT   (_DAC_CH0CTRL_PRSEN_DEFAULT << 2)
 
#define DAC_CH0CTRL_PRSSEL_DEFAULT   (_DAC_CH0CTRL_PRSSEL_DEFAULT << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH0   (_DAC_CH0CTRL_PRSSEL_PRSCH0 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH1   (_DAC_CH0CTRL_PRSSEL_PRSCH1 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH10   (_DAC_CH0CTRL_PRSSEL_PRSCH10 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH11   (_DAC_CH0CTRL_PRSSEL_PRSCH11 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH2   (_DAC_CH0CTRL_PRSSEL_PRSCH2 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH3   (_DAC_CH0CTRL_PRSSEL_PRSCH3 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH4   (_DAC_CH0CTRL_PRSSEL_PRSCH4 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH5   (_DAC_CH0CTRL_PRSSEL_PRSCH5 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH6   (_DAC_CH0CTRL_PRSSEL_PRSCH6 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH7   (_DAC_CH0CTRL_PRSSEL_PRSCH7 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH8   (_DAC_CH0CTRL_PRSSEL_PRSCH8 << 4)
 
#define DAC_CH0CTRL_PRSSEL_PRSCH9   (_DAC_CH0CTRL_PRSSEL_PRSCH9 << 4)
 
#define DAC_CH0CTRL_REFREN   (0x1UL << 1)
 
#define DAC_CH0CTRL_REFREN_DEFAULT   (_DAC_CH0CTRL_REFREN_DEFAULT << 1)
 
#define DAC_CH0DATA_DATA_DEFAULT   (_DAC_CH0DATA_DATA_DEFAULT << 0)
 
#define DAC_CH1CTRL_EN   (0x1UL << 0)
 
#define DAC_CH1CTRL_EN_DEFAULT   (_DAC_CH1CTRL_EN_DEFAULT << 0)
 
#define DAC_CH1CTRL_PRSEN   (0x1UL << 2)
 
#define DAC_CH1CTRL_PRSEN_DEFAULT   (_DAC_CH1CTRL_PRSEN_DEFAULT << 2)
 
#define DAC_CH1CTRL_PRSSEL_DEFAULT   (_DAC_CH1CTRL_PRSSEL_DEFAULT << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH0   (_DAC_CH1CTRL_PRSSEL_PRSCH0 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH1   (_DAC_CH1CTRL_PRSSEL_PRSCH1 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH10   (_DAC_CH1CTRL_PRSSEL_PRSCH10 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH11   (_DAC_CH1CTRL_PRSSEL_PRSCH11 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH2   (_DAC_CH1CTRL_PRSSEL_PRSCH2 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH3   (_DAC_CH1CTRL_PRSSEL_PRSCH3 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH4   (_DAC_CH1CTRL_PRSSEL_PRSCH4 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH5   (_DAC_CH1CTRL_PRSSEL_PRSCH5 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH6   (_DAC_CH1CTRL_PRSSEL_PRSCH6 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH7   (_DAC_CH1CTRL_PRSSEL_PRSCH7 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH8   (_DAC_CH1CTRL_PRSSEL_PRSCH8 << 4)
 
#define DAC_CH1CTRL_PRSSEL_PRSCH9   (_DAC_CH1CTRL_PRSSEL_PRSCH9 << 4)
 
#define DAC_CH1CTRL_REFREN   (0x1UL << 1)
 
#define DAC_CH1CTRL_REFREN_DEFAULT   (_DAC_CH1CTRL_REFREN_DEFAULT << 1)
 
#define DAC_CH1DATA_DATA_DEFAULT   (_DAC_CH1DATA_DATA_DEFAULT << 0)
 
#define DAC_COMBDATA_CH0DATA_DEFAULT   (_DAC_COMBDATA_CH0DATA_DEFAULT << 0)
 
#define DAC_COMBDATA_CH1DATA_DEFAULT   (_DAC_COMBDATA_CH1DATA_DEFAULT << 16)
 
#define DAC_CTRL_CH0PRESCRST   (0x1UL << 7)
 
#define DAC_CTRL_CH0PRESCRST_DEFAULT   (_DAC_CTRL_CH0PRESCRST_DEFAULT << 7)
 
#define DAC_CTRL_CONVMODE_CONTINUOUS   (_DAC_CTRL_CONVMODE_CONTINUOUS << 2)
 
#define DAC_CTRL_CONVMODE_DEFAULT   (_DAC_CTRL_CONVMODE_DEFAULT << 2)
 
#define DAC_CTRL_CONVMODE_SAMPLEHOLD   (_DAC_CTRL_CONVMODE_SAMPLEHOLD << 2)
 
#define DAC_CTRL_CONVMODE_SAMPLEOFF   (_DAC_CTRL_CONVMODE_SAMPLEOFF << 2)
 
#define DAC_CTRL_DIFF   (0x1UL << 0)
 
#define DAC_CTRL_DIFF_DEFAULT   (_DAC_CTRL_DIFF_DEFAULT << 0)
 
#define DAC_CTRL_OUTENPRS   (0x1UL << 6)
 
#define DAC_CTRL_OUTENPRS_DEFAULT   (_DAC_CTRL_OUTENPRS_DEFAULT << 6)
 
#define DAC_CTRL_OUTMODE_ADC   (_DAC_CTRL_OUTMODE_ADC << 4)
 
#define DAC_CTRL_OUTMODE_DEFAULT   (_DAC_CTRL_OUTMODE_DEFAULT << 4)
 
#define DAC_CTRL_OUTMODE_DISABLE   (_DAC_CTRL_OUTMODE_DISABLE << 4)
 
#define DAC_CTRL_OUTMODE_PIN   (_DAC_CTRL_OUTMODE_PIN << 4)
 
#define DAC_CTRL_OUTMODE_PINADC   (_DAC_CTRL_OUTMODE_PINADC << 4)
 
#define DAC_CTRL_PRESC_DEFAULT   (_DAC_CTRL_PRESC_DEFAULT << 16)
 
#define DAC_CTRL_PRESC_NODIVISION   (_DAC_CTRL_PRESC_NODIVISION << 16)
 
#define DAC_CTRL_REFRSEL_16CYCLES   (_DAC_CTRL_REFRSEL_16CYCLES << 20)
 
#define DAC_CTRL_REFRSEL_32CYCLES   (_DAC_CTRL_REFRSEL_32CYCLES << 20)
 
#define DAC_CTRL_REFRSEL_64CYCLES   (_DAC_CTRL_REFRSEL_64CYCLES << 20)
 
#define DAC_CTRL_REFRSEL_8CYCLES   (_DAC_CTRL_REFRSEL_8CYCLES << 20)
 
#define DAC_CTRL_REFRSEL_DEFAULT   (_DAC_CTRL_REFRSEL_DEFAULT << 20)
 
#define DAC_CTRL_REFSEL_1V25   (_DAC_CTRL_REFSEL_1V25 << 8)
 
#define DAC_CTRL_REFSEL_2V5   (_DAC_CTRL_REFSEL_2V5 << 8)
 
#define DAC_CTRL_REFSEL_DEFAULT   (_DAC_CTRL_REFSEL_DEFAULT << 8)
 
#define DAC_CTRL_REFSEL_VDD   (_DAC_CTRL_REFSEL_VDD << 8)
 
#define DAC_CTRL_SINEMODE   (0x1UL << 1)
 
#define DAC_CTRL_SINEMODE_DEFAULT   (_DAC_CTRL_SINEMODE_DEFAULT << 1)
 
#define DAC_IEN_CH0   (0x1UL << 0)
 
#define DAC_IEN_CH0_DEFAULT   (_DAC_IEN_CH0_DEFAULT << 0)
 
#define DAC_IEN_CH0UF   (0x1UL << 4)
 
#define DAC_IEN_CH0UF_DEFAULT   (_DAC_IEN_CH0UF_DEFAULT << 4)
 
#define DAC_IEN_CH1   (0x1UL << 1)
 
#define DAC_IEN_CH1_DEFAULT   (_DAC_IEN_CH1_DEFAULT << 1)
 
#define DAC_IEN_CH1UF   (0x1UL << 5)
 
#define DAC_IEN_CH1UF_DEFAULT   (_DAC_IEN_CH1UF_DEFAULT << 5)
 
#define DAC_IF_CH0   (0x1UL << 0)
 
#define DAC_IF_CH0_DEFAULT   (_DAC_IF_CH0_DEFAULT << 0)
 
#define DAC_IF_CH0UF   (0x1UL << 4)
 
#define DAC_IF_CH0UF_DEFAULT   (_DAC_IF_CH0UF_DEFAULT << 4)
 
#define DAC_IF_CH1   (0x1UL << 1)
 
#define DAC_IF_CH1_DEFAULT   (_DAC_IF_CH1_DEFAULT << 1)
 
#define DAC_IF_CH1UF   (0x1UL << 5)
 
#define DAC_IF_CH1UF_DEFAULT   (_DAC_IF_CH1UF_DEFAULT << 5)
 
#define DAC_IFC_CH0   (0x1UL << 0)
 
#define DAC_IFC_CH0_DEFAULT   (_DAC_IFC_CH0_DEFAULT << 0)
 
#define DAC_IFC_CH0UF   (0x1UL << 4)
 
#define DAC_IFC_CH0UF_DEFAULT   (_DAC_IFC_CH0UF_DEFAULT << 4)
 
#define DAC_IFC_CH1   (0x1UL << 1)
 
#define DAC_IFC_CH1_DEFAULT   (_DAC_IFC_CH1_DEFAULT << 1)
 
#define DAC_IFC_CH1UF   (0x1UL << 5)
 
#define DAC_IFC_CH1UF_DEFAULT   (_DAC_IFC_CH1UF_DEFAULT << 5)
 
#define DAC_IFS_CH0   (0x1UL << 0)
 
#define DAC_IFS_CH0_DEFAULT   (_DAC_IFS_CH0_DEFAULT << 0)
 
#define DAC_IFS_CH0UF   (0x1UL << 4)
 
#define DAC_IFS_CH0UF_DEFAULT   (_DAC_IFS_CH0UF_DEFAULT << 4)
 
#define DAC_IFS_CH1   (0x1UL << 1)
 
#define DAC_IFS_CH1_DEFAULT   (_DAC_IFS_CH1_DEFAULT << 1)
 
#define DAC_IFS_CH1UF   (0x1UL << 5)
 
#define DAC_IFS_CH1UF_DEFAULT   (_DAC_IFS_CH1UF_DEFAULT << 5)
 
#define DAC_OPA0MUX_NEGSEL_DEFAULT   (_DAC_OPA0MUX_NEGSEL_DEFAULT << 4)
 
#define DAC_OPA0MUX_NEGSEL_DISABLE   (_DAC_OPA0MUX_NEGSEL_DISABLE << 4)
 
#define DAC_OPA0MUX_NEGSEL_NEGPAD   (_DAC_OPA0MUX_NEGSEL_NEGPAD << 4)
 
#define DAC_OPA0MUX_NEGSEL_OPATAP   (_DAC_OPA0MUX_NEGSEL_OPATAP << 4)
 
#define DAC_OPA0MUX_NEGSEL_UG   (_DAC_OPA0MUX_NEGSEL_UG << 4)
 
#define DAC_OPA0MUX_NEXTOUT   (0x1UL << 26)
 
#define DAC_OPA0MUX_NEXTOUT_DEFAULT   (_DAC_OPA0MUX_NEXTOUT_DEFAULT << 26)
 
#define DAC_OPA0MUX_NPEN   (0x1UL << 13)
 
#define DAC_OPA0MUX_NPEN_DEFAULT   (_DAC_OPA0MUX_NPEN_DEFAULT << 13)
 
#define DAC_OPA0MUX_OUTMODE_ALL   (_DAC_OPA0MUX_OUTMODE_ALL << 22)
 
#define DAC_OPA0MUX_OUTMODE_ALT   (_DAC_OPA0MUX_OUTMODE_ALT << 22)
 
#define DAC_OPA0MUX_OUTMODE_DEFAULT   (_DAC_OPA0MUX_OUTMODE_DEFAULT << 22)
 
#define DAC_OPA0MUX_OUTMODE_DISABLE   (_DAC_OPA0MUX_OUTMODE_DISABLE << 22)
 
#define DAC_OPA0MUX_OUTMODE_MAIN   (_DAC_OPA0MUX_OUTMODE_MAIN << 22)
 
#define DAC_OPA0MUX_OUTPEN_DEFAULT   (_DAC_OPA0MUX_OUTPEN_DEFAULT << 14)
 
#define DAC_OPA0MUX_OUTPEN_OUT0   (_DAC_OPA0MUX_OUTPEN_OUT0 << 14)
 
#define DAC_OPA0MUX_OUTPEN_OUT1   (_DAC_OPA0MUX_OUTPEN_OUT1 << 14)
 
#define DAC_OPA0MUX_OUTPEN_OUT2   (_DAC_OPA0MUX_OUTPEN_OUT2 << 14)
 
#define DAC_OPA0MUX_OUTPEN_OUT3   (_DAC_OPA0MUX_OUTPEN_OUT3 << 14)
 
#define DAC_OPA0MUX_OUTPEN_OUT4   (_DAC_OPA0MUX_OUTPEN_OUT4 << 14)
 
#define DAC_OPA0MUX_POSSEL_DAC   (_DAC_OPA0MUX_POSSEL_DAC << 0)
 
#define DAC_OPA0MUX_POSSEL_DEFAULT   (_DAC_OPA0MUX_POSSEL_DEFAULT << 0)
 
#define DAC_OPA0MUX_POSSEL_DISABLE   (_DAC_OPA0MUX_POSSEL_DISABLE << 0)
 
#define DAC_OPA0MUX_POSSEL_OPA0INP   (_DAC_OPA0MUX_POSSEL_OPA0INP << 0)
 
#define DAC_OPA0MUX_POSSEL_OPATAP   (_DAC_OPA0MUX_POSSEL_OPATAP << 0)
 
#define DAC_OPA0MUX_POSSEL_POSPAD   (_DAC_OPA0MUX_POSSEL_POSPAD << 0)
 
#define DAC_OPA0MUX_PPEN   (0x1UL << 12)
 
#define DAC_OPA0MUX_PPEN_DEFAULT   (_DAC_OPA0MUX_PPEN_DEFAULT << 12)
 
#define DAC_OPA0MUX_RESINMUX_DEFAULT   (_DAC_OPA0MUX_RESINMUX_DEFAULT << 8)
 
#define DAC_OPA0MUX_RESINMUX_DISABLE   (_DAC_OPA0MUX_RESINMUX_DISABLE << 8)
 
#define DAC_OPA0MUX_RESINMUX_NEGPAD   (_DAC_OPA0MUX_RESINMUX_NEGPAD << 8)
 
#define DAC_OPA0MUX_RESINMUX_OPA0INP   (_DAC_OPA0MUX_RESINMUX_OPA0INP << 8)
 
#define DAC_OPA0MUX_RESINMUX_POSPAD   (_DAC_OPA0MUX_RESINMUX_POSPAD << 8)
 
#define DAC_OPA0MUX_RESINMUX_VSS   (_DAC_OPA0MUX_RESINMUX_VSS << 8)
 
#define DAC_OPA0MUX_RESSEL_DEFAULT   (_DAC_OPA0MUX_RESSEL_DEFAULT << 28)
 
#define DAC_OPA0MUX_RESSEL_RES0   (_DAC_OPA0MUX_RESSEL_RES0 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES1   (_DAC_OPA0MUX_RESSEL_RES1 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES2   (_DAC_OPA0MUX_RESSEL_RES2 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES3   (_DAC_OPA0MUX_RESSEL_RES3 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES4   (_DAC_OPA0MUX_RESSEL_RES4 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES5   (_DAC_OPA0MUX_RESSEL_RES5 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES6   (_DAC_OPA0MUX_RESSEL_RES6 << 28)
 
#define DAC_OPA0MUX_RESSEL_RES7   (_DAC_OPA0MUX_RESSEL_RES7 << 28)
 
#define DAC_OPA1MUX_NEGSEL_DEFAULT   (_DAC_OPA1MUX_NEGSEL_DEFAULT << 4)
 
#define DAC_OPA1MUX_NEGSEL_DISABLE   (_DAC_OPA1MUX_NEGSEL_DISABLE << 4)
 
#define DAC_OPA1MUX_NEGSEL_NEGPAD   (_DAC_OPA1MUX_NEGSEL_NEGPAD << 4)
 
#define DAC_OPA1MUX_NEGSEL_OPATAP   (_DAC_OPA1MUX_NEGSEL_OPATAP << 4)
 
#define DAC_OPA1MUX_NEGSEL_UG   (_DAC_OPA1MUX_NEGSEL_UG << 4)
 
#define DAC_OPA1MUX_NEXTOUT   (0x1UL << 26)
 
#define DAC_OPA1MUX_NEXTOUT_DEFAULT   (_DAC_OPA1MUX_NEXTOUT_DEFAULT << 26)
 
#define DAC_OPA1MUX_NPEN   (0x1UL << 13)
 
#define DAC_OPA1MUX_NPEN_DEFAULT   (_DAC_OPA1MUX_NPEN_DEFAULT << 13)
 
#define DAC_OPA1MUX_OUTMODE_ALL   (_DAC_OPA1MUX_OUTMODE_ALL << 22)
 
#define DAC_OPA1MUX_OUTMODE_ALT   (_DAC_OPA1MUX_OUTMODE_ALT << 22)
 
#define DAC_OPA1MUX_OUTMODE_DEFAULT   (_DAC_OPA1MUX_OUTMODE_DEFAULT << 22)
 
#define DAC_OPA1MUX_OUTMODE_DISABLE   (_DAC_OPA1MUX_OUTMODE_DISABLE << 22)
 
#define DAC_OPA1MUX_OUTMODE_MAIN   (_DAC_OPA1MUX_OUTMODE_MAIN << 22)
 
#define DAC_OPA1MUX_OUTPEN_DEFAULT   (_DAC_OPA1MUX_OUTPEN_DEFAULT << 14)
 
#define DAC_OPA1MUX_OUTPEN_OUT0   (_DAC_OPA1MUX_OUTPEN_OUT0 << 14)
 
#define DAC_OPA1MUX_OUTPEN_OUT1   (_DAC_OPA1MUX_OUTPEN_OUT1 << 14)
 
#define DAC_OPA1MUX_OUTPEN_OUT2   (_DAC_OPA1MUX_OUTPEN_OUT2 << 14)
 
#define DAC_OPA1MUX_OUTPEN_OUT3   (_DAC_OPA1MUX_OUTPEN_OUT3 << 14)
 
#define DAC_OPA1MUX_OUTPEN_OUT4   (_DAC_OPA1MUX_OUTPEN_OUT4 << 14)
 
#define DAC_OPA1MUX_POSSEL_DAC   (_DAC_OPA1MUX_POSSEL_DAC << 0)
 
#define DAC_OPA1MUX_POSSEL_DEFAULT   (_DAC_OPA1MUX_POSSEL_DEFAULT << 0)
 
#define DAC_OPA1MUX_POSSEL_DISABLE   (_DAC_OPA1MUX_POSSEL_DISABLE << 0)
 
#define DAC_OPA1MUX_POSSEL_OPA0INP   (_DAC_OPA1MUX_POSSEL_OPA0INP << 0)
 
#define DAC_OPA1MUX_POSSEL_OPATAP   (_DAC_OPA1MUX_POSSEL_OPATAP << 0)
 
#define DAC_OPA1MUX_POSSEL_POSPAD   (_DAC_OPA1MUX_POSSEL_POSPAD << 0)
 
#define DAC_OPA1MUX_PPEN   (0x1UL << 12)
 
#define DAC_OPA1MUX_PPEN_DEFAULT   (_DAC_OPA1MUX_PPEN_DEFAULT << 12)
 
#define DAC_OPA1MUX_RESINMUX_DEFAULT   (_DAC_OPA1MUX_RESINMUX_DEFAULT << 8)
 
#define DAC_OPA1MUX_RESINMUX_DISABLE   (_DAC_OPA1MUX_RESINMUX_DISABLE << 8)
 
#define DAC_OPA1MUX_RESINMUX_NEGPAD   (_DAC_OPA1MUX_RESINMUX_NEGPAD << 8)
 
#define DAC_OPA1MUX_RESINMUX_OPA0INP   (_DAC_OPA1MUX_RESINMUX_OPA0INP << 8)
 
#define DAC_OPA1MUX_RESINMUX_POSPAD   (_DAC_OPA1MUX_RESINMUX_POSPAD << 8)
 
#define DAC_OPA1MUX_RESINMUX_VSS   (_DAC_OPA1MUX_RESINMUX_VSS << 8)
 
#define DAC_OPA1MUX_RESSEL_DEFAULT   (_DAC_OPA1MUX_RESSEL_DEFAULT << 28)
 
#define DAC_OPA1MUX_RESSEL_RES0   (_DAC_OPA1MUX_RESSEL_RES0 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES1   (_DAC_OPA1MUX_RESSEL_RES1 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES2   (_DAC_OPA1MUX_RESSEL_RES2 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES3   (_DAC_OPA1MUX_RESSEL_RES3 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES4   (_DAC_OPA1MUX_RESSEL_RES4 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES5   (_DAC_OPA1MUX_RESSEL_RES5 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES6   (_DAC_OPA1MUX_RESSEL_RES6 << 28)
 
#define DAC_OPA1MUX_RESSEL_RES7   (_DAC_OPA1MUX_RESSEL_RES7 << 28)
 
#define DAC_OPA2MUX_NEGSEL_DEFAULT   (_DAC_OPA2MUX_NEGSEL_DEFAULT << 4)
 
#define DAC_OPA2MUX_NEGSEL_DISABLE   (_DAC_OPA2MUX_NEGSEL_DISABLE << 4)
 
#define DAC_OPA2MUX_NEGSEL_NEGPAD   (_DAC_OPA2MUX_NEGSEL_NEGPAD << 4)
 
#define DAC_OPA2MUX_NEGSEL_OPATAP   (_DAC_OPA2MUX_NEGSEL_OPATAP << 4)
 
#define DAC_OPA2MUX_NEGSEL_UG   (_DAC_OPA2MUX_NEGSEL_UG << 4)
 
#define DAC_OPA2MUX_NEXTOUT   (0x1UL << 26)
 
#define DAC_OPA2MUX_NEXTOUT_DEFAULT   (_DAC_OPA2MUX_NEXTOUT_DEFAULT << 26)
 
#define DAC_OPA2MUX_NPEN   (0x1UL << 13)
 
#define DAC_OPA2MUX_NPEN_DEFAULT   (_DAC_OPA2MUX_NPEN_DEFAULT << 13)
 
#define DAC_OPA2MUX_OUTMODE   (0x1UL << 22)
 
#define DAC_OPA2MUX_OUTMODE_DEFAULT   (_DAC_OPA2MUX_OUTMODE_DEFAULT << 22)
 
#define DAC_OPA2MUX_OUTPEN_DEFAULT   (_DAC_OPA2MUX_OUTPEN_DEFAULT << 14)
 
#define DAC_OPA2MUX_OUTPEN_OUT0   (_DAC_OPA2MUX_OUTPEN_OUT0 << 14)
 
#define DAC_OPA2MUX_OUTPEN_OUT1   (_DAC_OPA2MUX_OUTPEN_OUT1 << 14)
 
#define DAC_OPA2MUX_POSSEL_DEFAULT   (_DAC_OPA2MUX_POSSEL_DEFAULT << 0)
 
#define DAC_OPA2MUX_POSSEL_DISABLE   (_DAC_OPA2MUX_POSSEL_DISABLE << 0)
 
#define DAC_OPA2MUX_POSSEL_OPA1INP   (_DAC_OPA2MUX_POSSEL_OPA1INP << 0)
 
#define DAC_OPA2MUX_POSSEL_OPATAP   (_DAC_OPA2MUX_POSSEL_OPATAP << 0)
 
#define DAC_OPA2MUX_POSSEL_POSPAD   (_DAC_OPA2MUX_POSSEL_POSPAD << 0)
 
#define DAC_OPA2MUX_PPEN   (0x1UL << 12)
 
#define DAC_OPA2MUX_PPEN_DEFAULT   (_DAC_OPA2MUX_PPEN_DEFAULT << 12)
 
#define DAC_OPA2MUX_RESINMUX_DEFAULT   (_DAC_OPA2MUX_RESINMUX_DEFAULT << 8)
 
#define DAC_OPA2MUX_RESINMUX_DISABLE   (_DAC_OPA2MUX_RESINMUX_DISABLE << 8)
 
#define DAC_OPA2MUX_RESINMUX_NEGPAD   (_DAC_OPA2MUX_RESINMUX_NEGPAD << 8)
 
#define DAC_OPA2MUX_RESINMUX_OPA1INP   (_DAC_OPA2MUX_RESINMUX_OPA1INP << 8)
 
#define DAC_OPA2MUX_RESINMUX_POSPAD   (_DAC_OPA2MUX_RESINMUX_POSPAD << 8)
 
#define DAC_OPA2MUX_RESINMUX_VSS   (_DAC_OPA2MUX_RESINMUX_VSS << 8)
 
#define DAC_OPA2MUX_RESSEL_DEFAULT   (_DAC_OPA2MUX_RESSEL_DEFAULT << 28)
 
#define DAC_OPA2MUX_RESSEL_RES0   (_DAC_OPA2MUX_RESSEL_RES0 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES1   (_DAC_OPA2MUX_RESSEL_RES1 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES2   (_DAC_OPA2MUX_RESSEL_RES2 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES3   (_DAC_OPA2MUX_RESSEL_RES3 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES4   (_DAC_OPA2MUX_RESSEL_RES4 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES5   (_DAC_OPA2MUX_RESSEL_RES5 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES6   (_DAC_OPA2MUX_RESSEL_RES6 << 28)
 
#define DAC_OPA2MUX_RESSEL_RES7   (_DAC_OPA2MUX_RESSEL_RES7 << 28)
 
#define DAC_OPACTRL_OPA0EN   (0x1UL << 0)
 
#define DAC_OPACTRL_OPA0EN_DEFAULT   (_DAC_OPACTRL_OPA0EN_DEFAULT << 0)
 
#define DAC_OPACTRL_OPA0HCMDIS   (0x1UL << 6)
 
#define DAC_OPACTRL_OPA0HCMDIS_DEFAULT   (_DAC_OPACTRL_OPA0HCMDIS_DEFAULT << 6)
 
#define DAC_OPACTRL_OPA0LPFDIS_DEFAULT   (_DAC_OPACTRL_OPA0LPFDIS_DEFAULT << 12)
 
#define DAC_OPACTRL_OPA0LPFDIS_NLPFDIS   (_DAC_OPACTRL_OPA0LPFDIS_NLPFDIS << 12)
 
#define DAC_OPACTRL_OPA0LPFDIS_PLPFDIS   (_DAC_OPACTRL_OPA0LPFDIS_PLPFDIS << 12)
 
#define DAC_OPACTRL_OPA0SHORT   (0x1UL << 22)
 
#define DAC_OPACTRL_OPA0SHORT_DEFAULT   (_DAC_OPACTRL_OPA0SHORT_DEFAULT << 22)
 
#define DAC_OPACTRL_OPA1EN   (0x1UL << 1)
 
#define DAC_OPACTRL_OPA1EN_DEFAULT   (_DAC_OPACTRL_OPA1EN_DEFAULT << 1)
 
#define DAC_OPACTRL_OPA1HCMDIS   (0x1UL << 7)
 
#define DAC_OPACTRL_OPA1HCMDIS_DEFAULT   (_DAC_OPACTRL_OPA1HCMDIS_DEFAULT << 7)
 
#define DAC_OPACTRL_OPA1LPFDIS_DEFAULT   (_DAC_OPACTRL_OPA1LPFDIS_DEFAULT << 14)
 
#define DAC_OPACTRL_OPA1LPFDIS_NLPFDIS   (_DAC_OPACTRL_OPA1LPFDIS_NLPFDIS << 14)
 
#define DAC_OPACTRL_OPA1LPFDIS_PLPFDIS   (_DAC_OPACTRL_OPA1LPFDIS_PLPFDIS << 14)
 
#define DAC_OPACTRL_OPA1SHORT   (0x1UL << 23)
 
#define DAC_OPACTRL_OPA1SHORT_DEFAULT   (_DAC_OPACTRL_OPA1SHORT_DEFAULT << 23)
 
#define DAC_OPACTRL_OPA2EN   (0x1UL << 2)
 
#define DAC_OPACTRL_OPA2EN_DEFAULT   (_DAC_OPACTRL_OPA2EN_DEFAULT << 2)
 
#define DAC_OPACTRL_OPA2HCMDIS   (0x1UL << 8)
 
#define DAC_OPACTRL_OPA2HCMDIS_DEFAULT   (_DAC_OPACTRL_OPA2HCMDIS_DEFAULT << 8)
 
#define DAC_OPACTRL_OPA2LPFDIS_DEFAULT   (_DAC_OPACTRL_OPA2LPFDIS_DEFAULT << 16)
 
#define DAC_OPACTRL_OPA2LPFDIS_NLPFDIS   (_DAC_OPACTRL_OPA2LPFDIS_NLPFDIS << 16)
 
#define DAC_OPACTRL_OPA2LPFDIS_PLPFDIS   (_DAC_OPACTRL_OPA2LPFDIS_PLPFDIS << 16)
 
#define DAC_OPACTRL_OPA2SHORT   (0x1UL << 24)
 
#define DAC_OPACTRL_OPA2SHORT_DEFAULT   (_DAC_OPACTRL_OPA2SHORT_DEFAULT << 24)
 
#define DAC_OPAOFFSET_OPA2OFFSET_DEFAULT   (_DAC_OPAOFFSET_OPA2OFFSET_DEFAULT << 0)
 
#define DAC_STATUS_CH0DV   (0x1UL << 0)
 
#define DAC_STATUS_CH0DV_DEFAULT   (_DAC_STATUS_CH0DV_DEFAULT << 0)
 
#define DAC_STATUS_CH1DV   (0x1UL << 1)
 
#define DAC_STATUS_CH1DV_DEFAULT   (_DAC_STATUS_CH1DV_DEFAULT << 1)
 

Macro Definition Documentation

#define _DAC_BIASPROG_BIASPROG_DEFAULT   0x00000007UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 396 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_BIASPROG_MASK   0xFUL

Bit mask for DAC_BIASPROG

Definition at line 395 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_BIASPROG_BIASPROG_SHIFT   0

Shift value for DAC_BIASPROG

Definition at line 394 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_BIASPROG_HALFBIAS_DEFAULT   0x00000001UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 401 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_HALFBIAS_MASK   0x40UL

Bit mask for DAC_HALFBIAS

Definition at line 400 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_HALFBIAS_SHIFT   6

Shift value for DAC_HALFBIAS

Definition at line 399 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_MASK   0x00004F4FUL

Mask for DAC_BIASPROG

Definition at line 393 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_OPA2BIASPROG_DEFAULT   0x00000007UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 405 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_OPA2BIASPROG_MASK   0xF00UL

Bit mask for DAC_OPA2BIASPROG

Definition at line 404 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_BIASPROG_OPA2BIASPROG_SHIFT   8

Shift value for DAC_OPA2BIASPROG

Definition at line 403 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_BIASPROG_OPA2HALFBIAS_DEFAULT   0x00000001UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 410 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_OPA2HALFBIAS_MASK   0x4000UL

Bit mask for DAC_OPA2HALFBIAS

Definition at line 409 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_OPA2HALFBIAS_SHIFT   14

Shift value for DAC_OPA2HALFBIAS

Definition at line 408 of file ezr32wg_dac.h.

#define _DAC_BIASPROG_RESETVALUE   0x00004747UL

Default value for DAC_BIASPROG

Definition at line 392 of file ezr32wg_dac.h.

Referenced by DAC_Reset().

#define _DAC_CAL_CH0OFFSET_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CAL

Definition at line 380 of file ezr32wg_dac.h.

#define _DAC_CAL_CH0OFFSET_MASK   0x3FUL

Bit mask for DAC_CH0OFFSET

Definition at line 379 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_CAL_CH0OFFSET_SHIFT   0

Shift value for DAC_CH0OFFSET

Definition at line 378 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_CAL_CH1OFFSET_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CAL

Definition at line 384 of file ezr32wg_dac.h.

#define _DAC_CAL_CH1OFFSET_MASK   0x3F00UL

Bit mask for DAC_CH1OFFSET

Definition at line 383 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_CAL_CH1OFFSET_SHIFT   8

Shift value for DAC_CH1OFFSET

Definition at line 382 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_CAL_GAIN_DEFAULT   0x00000040UL

Mode DEFAULT for DAC_CAL

Definition at line 388 of file ezr32wg_dac.h.

#define _DAC_CAL_GAIN_MASK   0x7F0000UL

Bit mask for DAC_GAIN

Definition at line 387 of file ezr32wg_dac.h.

#define _DAC_CAL_GAIN_SHIFT   16

Shift value for DAC_GAIN

Definition at line 386 of file ezr32wg_dac.h.

#define _DAC_CAL_MASK   0x007F3F3FUL

Mask for DAC_CAL

Definition at line 377 of file ezr32wg_dac.h.

#define _DAC_CAL_RESETVALUE   0x00400000UL

Default value for DAC_CAL

Definition at line 376 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_EN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 163 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_EN_MASK   0x1UL

Bit mask for DAC_EN

Definition at line 162 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_EN_SHIFT   0

Shift value for DAC_EN

Definition at line 161 of file ezr32wg_dac.h.

Referenced by DAC_Enable(), and DAC_Init().

#define _DAC_CH0CTRL_MASK   0x000000F7UL

Mask for DAC_CH0CTRL

Definition at line 159 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 173 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSEN_MASK   0x4UL

Bit mask for DAC_PRSEN

Definition at line 172 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSEN_SHIFT   2

Shift value for DAC_PRSEN

Definition at line 171 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 177 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_MASK   0xF0UL

Bit mask for DAC_PRSSEL

Definition at line 176 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH0   0x00000000UL

Mode PRSCH0 for DAC_CH0CTRL

Definition at line 178 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH1   0x00000001UL

Mode PRSCH1 for DAC_CH0CTRL

Definition at line 179 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH10   0x0000000AUL

Mode PRSCH10 for DAC_CH0CTRL

Definition at line 188 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH11   0x0000000BUL

Mode PRSCH11 for DAC_CH0CTRL

Definition at line 189 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH2   0x00000002UL

Mode PRSCH2 for DAC_CH0CTRL

Definition at line 180 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH3   0x00000003UL

Mode PRSCH3 for DAC_CH0CTRL

Definition at line 181 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH4   0x00000004UL

Mode PRSCH4 for DAC_CH0CTRL

Definition at line 182 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH5   0x00000005UL

Mode PRSCH5 for DAC_CH0CTRL

Definition at line 183 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH6   0x00000006UL

Mode PRSCH6 for DAC_CH0CTRL

Definition at line 184 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH7   0x00000007UL

Mode PRSCH7 for DAC_CH0CTRL

Definition at line 185 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH8   0x00000008UL

Mode PRSCH8 for DAC_CH0CTRL

Definition at line 186 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_PRSCH9   0x00000009UL

Mode PRSCH9 for DAC_CH0CTRL

Definition at line 187 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_PRSSEL_SHIFT   4

Shift value for DAC_PRSSEL

Definition at line 175 of file ezr32wg_dac.h.

Referenced by DAC_InitChannel().

#define _DAC_CH0CTRL_REFREN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 168 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_REFREN_MASK   0x2UL

Bit mask for DAC_REFREN

Definition at line 167 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_REFREN_SHIFT   1

Shift value for DAC_REFREN

Definition at line 166 of file ezr32wg_dac.h.

#define _DAC_CH0CTRL_RESETVALUE   0x00000000UL

Default value for DAC_CH0CTRL

Definition at line 158 of file ezr32wg_dac.h.

Referenced by DAC_Reset().

#define _DAC_CH0DATA_DATA_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH0DATA

Definition at line 352 of file ezr32wg_dac.h.

#define _DAC_CH0DATA_DATA_MASK   0xFFFUL

Bit mask for DAC_DATA

Definition at line 351 of file ezr32wg_dac.h.

#define _DAC_CH0DATA_DATA_SHIFT   0

Shift value for DAC_DATA

Definition at line 350 of file ezr32wg_dac.h.

#define _DAC_CH0DATA_MASK   0x00000FFFUL

Mask for DAC_CH0DATA

Definition at line 349 of file ezr32wg_dac.h.

Referenced by DAC_Channel0OutputSet().

#define _DAC_CH0DATA_RESETVALUE   0x00000000UL

Default value for DAC_CH0DATA

Definition at line 348 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_EN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 210 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_EN_MASK   0x1UL

Bit mask for DAC_EN

Definition at line 209 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_EN_SHIFT   0

Shift value for DAC_EN

Definition at line 208 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_MASK   0x000000F7UL

Mask for DAC_CH1CTRL

Definition at line 206 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 220 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSEN_MASK   0x4UL

Bit mask for DAC_PRSEN

Definition at line 219 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSEN_SHIFT   2

Shift value for DAC_PRSEN

Definition at line 218 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 224 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_MASK   0xF0UL

Bit mask for DAC_PRSSEL

Definition at line 223 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH0   0x00000000UL

Mode PRSCH0 for DAC_CH1CTRL

Definition at line 225 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH1   0x00000001UL

Mode PRSCH1 for DAC_CH1CTRL

Definition at line 226 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH10   0x0000000AUL

Mode PRSCH10 for DAC_CH1CTRL

Definition at line 235 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH11   0x0000000BUL

Mode PRSCH11 for DAC_CH1CTRL

Definition at line 236 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH2   0x00000002UL

Mode PRSCH2 for DAC_CH1CTRL

Definition at line 227 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH3   0x00000003UL

Mode PRSCH3 for DAC_CH1CTRL

Definition at line 228 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH4   0x00000004UL

Mode PRSCH4 for DAC_CH1CTRL

Definition at line 229 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH5   0x00000005UL

Mode PRSCH5 for DAC_CH1CTRL

Definition at line 230 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH6   0x00000006UL

Mode PRSCH6 for DAC_CH1CTRL

Definition at line 231 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH7   0x00000007UL

Mode PRSCH7 for DAC_CH1CTRL

Definition at line 232 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH8   0x00000008UL

Mode PRSCH8 for DAC_CH1CTRL

Definition at line 233 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_PRSCH9   0x00000009UL

Mode PRSCH9 for DAC_CH1CTRL

Definition at line 234 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_PRSSEL_SHIFT   4

Shift value for DAC_PRSSEL

Definition at line 222 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_REFREN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 215 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_REFREN_MASK   0x2UL

Bit mask for DAC_REFREN

Definition at line 214 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_REFREN_SHIFT   1

Shift value for DAC_REFREN

Definition at line 213 of file ezr32wg_dac.h.

#define _DAC_CH1CTRL_RESETVALUE   0x00000000UL

Default value for DAC_CH1CTRL

Definition at line 205 of file ezr32wg_dac.h.

Referenced by DAC_Reset().

#define _DAC_CH1DATA_DATA_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CH1DATA

Definition at line 360 of file ezr32wg_dac.h.

#define _DAC_CH1DATA_DATA_MASK   0xFFFUL

Bit mask for DAC_DATA

Definition at line 359 of file ezr32wg_dac.h.

#define _DAC_CH1DATA_DATA_SHIFT   0

Shift value for DAC_DATA

Definition at line 358 of file ezr32wg_dac.h.

#define _DAC_CH1DATA_MASK   0x00000FFFUL

Mask for DAC_CH1DATA

Definition at line 357 of file ezr32wg_dac.h.

Referenced by DAC_Channel1OutputSet().

#define _DAC_CH1DATA_RESETVALUE   0x00000000UL

Default value for DAC_CH1DATA

Definition at line 356 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_CH0DATA_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_COMBDATA

Definition at line 368 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_CH0DATA_MASK   0xFFFUL

Bit mask for DAC_CH0DATA

Definition at line 367 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_CH0DATA_SHIFT   0

Shift value for DAC_CH0DATA

Definition at line 366 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_CH1DATA_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_COMBDATA

Definition at line 372 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_CH1DATA_MASK   0xFFF0000UL

Bit mask for DAC_CH1DATA

Definition at line 371 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_CH1DATA_SHIFT   16

Shift value for DAC_CH1DATA

Definition at line 370 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_MASK   0x0FFF0FFFUL

Mask for DAC_COMBDATA

Definition at line 365 of file ezr32wg_dac.h.

#define _DAC_COMBDATA_RESETVALUE   0x00000000UL

Default value for DAC_COMBDATA

Definition at line 364 of file ezr32wg_dac.h.

#define _DAC_CTRL_CH0PRESCRST_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 112 of file ezr32wg_dac.h.

#define _DAC_CTRL_CH0PRESCRST_MASK   0x80UL

Bit mask for DAC_CH0PRESCRST

Definition at line 111 of file ezr32wg_dac.h.

#define _DAC_CTRL_CH0PRESCRST_SHIFT   7

Shift value for DAC_CH0PRESCRST

Definition at line 110 of file ezr32wg_dac.h.

#define _DAC_CTRL_CONVMODE_CONTINUOUS   0x00000000UL

Mode CONTINUOUS for DAC_CTRL

Definition at line 85 of file ezr32wg_dac.h.

#define _DAC_CTRL_CONVMODE_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 84 of file ezr32wg_dac.h.

#define _DAC_CTRL_CONVMODE_MASK   0xCUL

Bit mask for DAC_CONVMODE

Definition at line 83 of file ezr32wg_dac.h.

#define _DAC_CTRL_CONVMODE_SAMPLEHOLD   0x00000001UL

Mode SAMPLEHOLD for DAC_CTRL

Definition at line 86 of file ezr32wg_dac.h.

#define _DAC_CTRL_CONVMODE_SAMPLEOFF   0x00000002UL

Mode SAMPLEOFF for DAC_CTRL

Definition at line 87 of file ezr32wg_dac.h.

#define _DAC_CTRL_CONVMODE_SHIFT   2

Shift value for DAC_CONVMODE

Definition at line 82 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define _DAC_CTRL_DIFF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 75 of file ezr32wg_dac.h.

#define _DAC_CTRL_DIFF_MASK   0x1UL

Bit mask for DAC_DIFF

Definition at line 74 of file ezr32wg_dac.h.

#define _DAC_CTRL_DIFF_SHIFT   0

Shift value for DAC_DIFF

Definition at line 73 of file ezr32wg_dac.h.

#define _DAC_CTRL_MASK   0x003703FFUL

Mask for DAC_CTRL

Definition at line 71 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTENPRS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 107 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTENPRS_MASK   0x40UL

Bit mask for DAC_OUTENPRS

Definition at line 106 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTENPRS_SHIFT   6

Shift value for DAC_OUTENPRS

Definition at line 105 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_ADC   0x00000002UL

Mode ADC for DAC_CTRL

Definition at line 97 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_DEFAULT   0x00000001UL

Mode DEFAULT for DAC_CTRL

Definition at line 95 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_DISABLE   0x00000000UL

Mode DISABLE for DAC_CTRL

Definition at line 94 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_MASK   0x30UL

Bit mask for DAC_OUTMODE

Definition at line 93 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_PIN   0x00000001UL

Mode PIN for DAC_CTRL

Definition at line 96 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_PINADC   0x00000003UL

Mode PINADC for DAC_CTRL

Definition at line 98 of file ezr32wg_dac.h.

#define _DAC_CTRL_OUTMODE_SHIFT   4

Shift value for DAC_OUTMODE

Definition at line 92 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define _DAC_CTRL_PRESC_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 126 of file ezr32wg_dac.h.

#define _DAC_CTRL_PRESC_MASK   0x70000UL

Bit mask for DAC_PRESC

Definition at line 125 of file ezr32wg_dac.h.

Referenced by DAC_Init(), and DAC_PrescaleCalc().

#define _DAC_CTRL_PRESC_NODIVISION   0x00000000UL

Mode NODIVISION for DAC_CTRL

Definition at line 127 of file ezr32wg_dac.h.

#define _DAC_CTRL_PRESC_SHIFT   16

Shift value for DAC_PRESC

Definition at line 124 of file ezr32wg_dac.h.

Referenced by DAC_Init(), and DAC_PrescaleCalc().

#define _DAC_CTRL_REFRSEL_16CYCLES   0x00000001UL

Mode 16CYCLES for DAC_CTRL

Definition at line 134 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFRSEL_32CYCLES   0x00000002UL

Mode 32CYCLES for DAC_CTRL

Definition at line 135 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFRSEL_64CYCLES   0x00000003UL

Mode 64CYCLES for DAC_CTRL

Definition at line 136 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFRSEL_8CYCLES   0x00000000UL

Mode 8CYCLES for DAC_CTRL

Definition at line 133 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFRSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 132 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFRSEL_MASK   0x300000UL

Bit mask for DAC_REFRSEL

Definition at line 131 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFRSEL_SHIFT   20

Shift value for DAC_REFRSEL

Definition at line 130 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define _DAC_CTRL_REFSEL_1V25   0x00000000UL

Mode 1V25 for DAC_CTRL

Definition at line 117 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFSEL_2V5   0x00000001UL

Mode 2V5 for DAC_CTRL

Definition at line 118 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 116 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFSEL_MASK   0x300UL

Bit mask for DAC_REFSEL

Definition at line 115 of file ezr32wg_dac.h.

#define _DAC_CTRL_REFSEL_SHIFT   8

Shift value for DAC_REFSEL

Definition at line 114 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define _DAC_CTRL_REFSEL_VDD   0x00000002UL

Mode VDD for DAC_CTRL

Definition at line 119 of file ezr32wg_dac.h.

#define _DAC_CTRL_RESETVALUE   0x00000010UL

Default value for DAC_CTRL

Definition at line 70 of file ezr32wg_dac.h.

Referenced by DAC_Reset().

#define _DAC_CTRL_SINEMODE_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 80 of file ezr32wg_dac.h.

#define _DAC_CTRL_SINEMODE_MASK   0x2UL

Bit mask for DAC_SINEMODE

Definition at line 79 of file ezr32wg_dac.h.

#define _DAC_CTRL_SINEMODE_SHIFT   1

Shift value for DAC_SINEMODE

Definition at line 78 of file ezr32wg_dac.h.

#define _DAC_IEN_CH0_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 257 of file ezr32wg_dac.h.

#define _DAC_IEN_CH0_MASK   0x1UL

Bit mask for DAC_CH0

Definition at line 256 of file ezr32wg_dac.h.

#define _DAC_IEN_CH0_SHIFT   0

Shift value for DAC_CH0

Definition at line 255 of file ezr32wg_dac.h.

#define _DAC_IEN_CH0UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 267 of file ezr32wg_dac.h.

#define _DAC_IEN_CH0UF_MASK   0x10UL

Bit mask for DAC_CH0UF

Definition at line 266 of file ezr32wg_dac.h.

#define _DAC_IEN_CH0UF_SHIFT   4

Shift value for DAC_CH0UF

Definition at line 265 of file ezr32wg_dac.h.

#define _DAC_IEN_CH1_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 262 of file ezr32wg_dac.h.

#define _DAC_IEN_CH1_MASK   0x2UL

Bit mask for DAC_CH1

Definition at line 261 of file ezr32wg_dac.h.

#define _DAC_IEN_CH1_SHIFT   1

Shift value for DAC_CH1

Definition at line 260 of file ezr32wg_dac.h.

#define _DAC_IEN_CH1UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 272 of file ezr32wg_dac.h.

#define _DAC_IEN_CH1UF_MASK   0x20UL

Bit mask for DAC_CH1UF

Definition at line 271 of file ezr32wg_dac.h.

#define _DAC_IEN_CH1UF_SHIFT   5

Shift value for DAC_CH1UF

Definition at line 270 of file ezr32wg_dac.h.

#define _DAC_IEN_MASK   0x00000033UL

Mask for DAC_IEN

Definition at line 253 of file ezr32wg_dac.h.

#define _DAC_IEN_RESETVALUE   0x00000000UL

Default value for DAC_IEN

Definition at line 252 of file ezr32wg_dac.h.

Referenced by DAC_Reset().

#define _DAC_IF_CH0_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 281 of file ezr32wg_dac.h.

#define _DAC_IF_CH0_MASK   0x1UL

Bit mask for DAC_CH0

Definition at line 280 of file ezr32wg_dac.h.

#define _DAC_IF_CH0_SHIFT   0

Shift value for DAC_CH0

Definition at line 279 of file ezr32wg_dac.h.

#define _DAC_IF_CH0UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 291 of file ezr32wg_dac.h.

#define _DAC_IF_CH0UF_MASK   0x10UL

Bit mask for DAC_CH0UF

Definition at line 290 of file ezr32wg_dac.h.

#define _DAC_IF_CH0UF_SHIFT   4

Shift value for DAC_CH0UF

Definition at line 289 of file ezr32wg_dac.h.

#define _DAC_IF_CH1_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 286 of file ezr32wg_dac.h.

#define _DAC_IF_CH1_MASK   0x2UL

Bit mask for DAC_CH1

Definition at line 285 of file ezr32wg_dac.h.

#define _DAC_IF_CH1_SHIFT   1

Shift value for DAC_CH1

Definition at line 284 of file ezr32wg_dac.h.

#define _DAC_IF_CH1UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 296 of file ezr32wg_dac.h.

#define _DAC_IF_CH1UF_MASK   0x20UL

Bit mask for DAC_CH1UF

Definition at line 295 of file ezr32wg_dac.h.

#define _DAC_IF_CH1UF_SHIFT   5

Shift value for DAC_CH1UF

Definition at line 294 of file ezr32wg_dac.h.

#define _DAC_IF_MASK   0x00000033UL

Mask for DAC_IF

Definition at line 277 of file ezr32wg_dac.h.

#define _DAC_IF_RESETVALUE   0x00000000UL

Default value for DAC_IF

Definition at line 276 of file ezr32wg_dac.h.

#define _DAC_IFC_CH0_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 329 of file ezr32wg_dac.h.

#define _DAC_IFC_CH0_MASK   0x1UL

Bit mask for DAC_CH0

Definition at line 328 of file ezr32wg_dac.h.

#define _DAC_IFC_CH0_SHIFT   0

Shift value for DAC_CH0

Definition at line 327 of file ezr32wg_dac.h.

#define _DAC_IFC_CH0UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 339 of file ezr32wg_dac.h.

#define _DAC_IFC_CH0UF_MASK   0x10UL

Bit mask for DAC_CH0UF

Definition at line 338 of file ezr32wg_dac.h.

#define _DAC_IFC_CH0UF_SHIFT   4

Shift value for DAC_CH0UF

Definition at line 337 of file ezr32wg_dac.h.

#define _DAC_IFC_CH1_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 334 of file ezr32wg_dac.h.

#define _DAC_IFC_CH1_MASK   0x2UL

Bit mask for DAC_CH1

Definition at line 333 of file ezr32wg_dac.h.

#define _DAC_IFC_CH1_SHIFT   1

Shift value for DAC_CH1

Definition at line 332 of file ezr32wg_dac.h.

#define _DAC_IFC_CH1UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 344 of file ezr32wg_dac.h.

#define _DAC_IFC_CH1UF_MASK   0x20UL

Bit mask for DAC_CH1UF

Definition at line 343 of file ezr32wg_dac.h.

#define _DAC_IFC_CH1UF_SHIFT   5

Shift value for DAC_CH1UF

Definition at line 342 of file ezr32wg_dac.h.

#define _DAC_IFC_MASK   0x00000033UL

Mask for DAC_IFC

Definition at line 325 of file ezr32wg_dac.h.

Referenced by DAC_Reset().

#define _DAC_IFC_RESETVALUE   0x00000000UL

Default value for DAC_IFC

Definition at line 324 of file ezr32wg_dac.h.

#define _DAC_IFS_CH0_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFS

Definition at line 305 of file ezr32wg_dac.h.

#define _DAC_IFS_CH0_MASK   0x1UL

Bit mask for DAC_CH0

Definition at line 304 of file ezr32wg_dac.h.

#define _DAC_IFS_CH0_SHIFT   0

Shift value for DAC_CH0

Definition at line 303 of file ezr32wg_dac.h.

#define _DAC_IFS_CH0UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFS

Definition at line 315 of file ezr32wg_dac.h.

#define _DAC_IFS_CH0UF_MASK   0x10UL

Bit mask for DAC_CH0UF

Definition at line 314 of file ezr32wg_dac.h.

#define _DAC_IFS_CH0UF_SHIFT   4

Shift value for DAC_CH0UF

Definition at line 313 of file ezr32wg_dac.h.

#define _DAC_IFS_CH1_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFS

Definition at line 310 of file ezr32wg_dac.h.

#define _DAC_IFS_CH1_MASK   0x2UL

Bit mask for DAC_CH1

Definition at line 309 of file ezr32wg_dac.h.

#define _DAC_IFS_CH1_SHIFT   1

Shift value for DAC_CH1

Definition at line 308 of file ezr32wg_dac.h.

#define _DAC_IFS_CH1UF_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_IFS

Definition at line 320 of file ezr32wg_dac.h.

#define _DAC_IFS_CH1UF_MASK   0x20UL

Bit mask for DAC_CH1UF

Definition at line 319 of file ezr32wg_dac.h.

#define _DAC_IFS_CH1UF_SHIFT   5

Shift value for DAC_CH1UF

Definition at line 318 of file ezr32wg_dac.h.

#define _DAC_IFS_MASK   0x00000033UL

Mask for DAC_IFS

Definition at line 301 of file ezr32wg_dac.h.

#define _DAC_IFS_RESETVALUE   0x00000000UL

Default value for DAC_IFS

Definition at line 300 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_MASK   0x74C7F737UL

Mask for DAC_OPA0MUX

Definition at line 496 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 513 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA0MUX

Definition at line 514 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_MASK   0x30UL

Bit mask for DAC_NEGSEL

Definition at line 512 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_NEGPAD   0x00000003UL

Mode NEGPAD for DAC_OPA0MUX

Definition at line 517 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_OPATAP   0x00000002UL

Mode OPATAP for DAC_OPA0MUX

Definition at line 516 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_SHIFT   4

Shift value for DAC_NEGSEL

Definition at line 511 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEGSEL_UG   0x00000001UL

Mode UG for DAC_OPA0MUX

Definition at line 515 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEXTOUT_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 576 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEXTOUT_MASK   0x4000000UL

Bit mask for DAC_NEXTOUT

Definition at line 575 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NEXTOUT_SHIFT   26

Shift value for DAC_NEXTOUT

Definition at line 574 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 545 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NPEN_MASK   0x2000UL

Bit mask for DAC_NPEN

Definition at line 544 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_NPEN_SHIFT   13

Shift value for DAC_NPEN

Definition at line 543 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_ALL   0x00000003UL

Mode ALL for DAC_OPA0MUX

Definition at line 567 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_ALT   0x00000002UL

Mode ALT for DAC_OPA0MUX

Definition at line 566 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_DEFAULT   0x00000001UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 564 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA0MUX

Definition at line 563 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_MAIN   0x00000001UL

Mode MAIN for DAC_OPA0MUX

Definition at line 565 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_MASK   0xC00000UL

Bit mask for DAC_OUTMODE

Definition at line 562 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTMODE_SHIFT   22

Shift value for DAC_OUTMODE

Definition at line 561 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 549 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_MASK   0x7C000UL

Bit mask for DAC_OUTPEN

Definition at line 548 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPA0MUX_OUTPEN_OUT0   0x00000001UL

Mode OUT0 for DAC_OPA0MUX

Definition at line 550 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_OUT1   0x00000002UL

Mode OUT1 for DAC_OPA0MUX

Definition at line 551 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_OUT2   0x00000004UL

Mode OUT2 for DAC_OPA0MUX

Definition at line 552 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_OUT3   0x00000008UL

Mode OUT3 for DAC_OPA0MUX

Definition at line 553 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_OUT4   0x00000010UL

Mode OUT4 for DAC_OPA0MUX

Definition at line 554 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_OUTPEN_SHIFT   14

Shift value for DAC_OUTPEN

Definition at line 547 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_DAC   0x00000001UL

Mode DAC for DAC_OPA0MUX

Definition at line 501 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 499 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA0MUX

Definition at line 500 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_MASK   0x7UL

Bit mask for DAC_POSSEL

Definition at line 498 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_OPA0INP   0x00000003UL

Mode OPA0INP for DAC_OPA0MUX

Definition at line 503 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_OPATAP   0x00000004UL

Mode OPATAP for DAC_OPA0MUX

Definition at line 504 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_POSPAD   0x00000002UL

Mode POSPAD for DAC_OPA0MUX

Definition at line 502 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_POSSEL_SHIFT   0

Shift value for DAC_POSSEL

Definition at line 497 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_PPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 540 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_PPEN_MASK   0x1000UL

Bit mask for DAC_PPEN

Definition at line 539 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_PPEN_SHIFT   12

Shift value for DAC_PPEN

Definition at line 538 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESETVALUE   0x00400000UL

Default value for DAC_OPA0MUX

Definition at line 495 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 525 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA0MUX

Definition at line 526 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_MASK   0x700UL

Bit mask for DAC_RESINMUX

Definition at line 524 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_NEGPAD   0x00000002UL

Mode NEGPAD for DAC_OPA0MUX

Definition at line 528 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_OPA0INP   0x00000001UL

Mode OPA0INP for DAC_OPA0MUX

Definition at line 527 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_POSPAD   0x00000003UL

Mode POSPAD for DAC_OPA0MUX

Definition at line 529 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_SHIFT   8

Shift value for DAC_RESINMUX

Definition at line 523 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESINMUX_VSS   0x00000004UL

Mode VSS for DAC_OPA0MUX

Definition at line 530 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA0MUX

Definition at line 580 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_MASK   0x70000000UL

Bit mask for DAC_RESSEL

Definition at line 579 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES0   0x00000000UL

Mode RES0 for DAC_OPA0MUX

Definition at line 581 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES1   0x00000001UL

Mode RES1 for DAC_OPA0MUX

Definition at line 582 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES2   0x00000002UL

Mode RES2 for DAC_OPA0MUX

Definition at line 583 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES3   0x00000003UL

Mode RES3 for DAC_OPA0MUX

Definition at line 584 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES4   0x00000004UL

Mode RES4 for DAC_OPA0MUX

Definition at line 585 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES5   0x00000005UL

Mode RES5 for DAC_OPA0MUX

Definition at line 586 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES6   0x00000006UL

Mode RES6 for DAC_OPA0MUX

Definition at line 587 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_RES7   0x00000007UL

Mode RES7 for DAC_OPA0MUX

Definition at line 588 of file ezr32wg_dac.h.

#define _DAC_OPA0MUX_RESSEL_SHIFT   28

Shift value for DAC_RESSEL

Definition at line 578 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_MASK   0x74C7F737UL

Mask for DAC_OPA1MUX

Definition at line 601 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 618 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA1MUX

Definition at line 619 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_MASK   0x30UL

Bit mask for DAC_NEGSEL

Definition at line 617 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_NEGPAD   0x00000003UL

Mode NEGPAD for DAC_OPA1MUX

Definition at line 622 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_OPATAP   0x00000002UL

Mode OPATAP for DAC_OPA1MUX

Definition at line 621 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_SHIFT   4

Shift value for DAC_NEGSEL

Definition at line 616 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEGSEL_UG   0x00000001UL

Mode UG for DAC_OPA1MUX

Definition at line 620 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEXTOUT_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 681 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEXTOUT_MASK   0x4000000UL

Bit mask for DAC_NEXTOUT

Definition at line 680 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NEXTOUT_SHIFT   26

Shift value for DAC_NEXTOUT

Definition at line 679 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 650 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NPEN_MASK   0x2000UL

Bit mask for DAC_NPEN

Definition at line 649 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_NPEN_SHIFT   13

Shift value for DAC_NPEN

Definition at line 648 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_ALL   0x00000003UL

Mode ALL for DAC_OPA1MUX

Definition at line 672 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_ALT   0x00000002UL

Mode ALT for DAC_OPA1MUX

Definition at line 671 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 668 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA1MUX

Definition at line 669 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_MAIN   0x00000001UL

Mode MAIN for DAC_OPA1MUX

Definition at line 670 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_MASK   0xC00000UL

Bit mask for DAC_OUTMODE

Definition at line 667 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTMODE_SHIFT   22

Shift value for DAC_OUTMODE

Definition at line 666 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 654 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_MASK   0x7C000UL

Bit mask for DAC_OUTPEN

Definition at line 653 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPA1MUX_OUTPEN_OUT0   0x00000001UL

Mode OUT0 for DAC_OPA1MUX

Definition at line 655 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_OUT1   0x00000002UL

Mode OUT1 for DAC_OPA1MUX

Definition at line 656 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_OUT2   0x00000004UL

Mode OUT2 for DAC_OPA1MUX

Definition at line 657 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_OUT3   0x00000008UL

Mode OUT3 for DAC_OPA1MUX

Definition at line 658 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_OUT4   0x00000010UL

Mode OUT4 for DAC_OPA1MUX

Definition at line 659 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_OUTPEN_SHIFT   14

Shift value for DAC_OUTPEN

Definition at line 652 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_DAC   0x00000001UL

Mode DAC for DAC_OPA1MUX

Definition at line 606 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 604 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA1MUX

Definition at line 605 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_MASK   0x7UL

Bit mask for DAC_POSSEL

Definition at line 603 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_OPA0INP   0x00000003UL

Mode OPA0INP for DAC_OPA1MUX

Definition at line 608 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_OPATAP   0x00000004UL

Mode OPATAP for DAC_OPA1MUX

Definition at line 609 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_POSPAD   0x00000002UL

Mode POSPAD for DAC_OPA1MUX

Definition at line 607 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_POSSEL_SHIFT   0

Shift value for DAC_POSSEL

Definition at line 602 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_PPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 645 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_PPEN_MASK   0x1000UL

Bit mask for DAC_PPEN

Definition at line 644 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_PPEN_SHIFT   12

Shift value for DAC_PPEN

Definition at line 643 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESETVALUE   0x00000000UL

Default value for DAC_OPA1MUX

Definition at line 600 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 630 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA1MUX

Definition at line 631 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_MASK   0x700UL

Bit mask for DAC_RESINMUX

Definition at line 629 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_NEGPAD   0x00000002UL

Mode NEGPAD for DAC_OPA1MUX

Definition at line 633 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_OPA0INP   0x00000001UL

Mode OPA0INP for DAC_OPA1MUX

Definition at line 632 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_POSPAD   0x00000003UL

Mode POSPAD for DAC_OPA1MUX

Definition at line 634 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_SHIFT   8

Shift value for DAC_RESINMUX

Definition at line 628 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESINMUX_VSS   0x00000004UL

Mode VSS for DAC_OPA1MUX

Definition at line 635 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA1MUX

Definition at line 685 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_MASK   0x70000000UL

Bit mask for DAC_RESSEL

Definition at line 684 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES0   0x00000000UL

Mode RES0 for DAC_OPA1MUX

Definition at line 686 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES1   0x00000001UL

Mode RES1 for DAC_OPA1MUX

Definition at line 687 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES2   0x00000002UL

Mode RES2 for DAC_OPA1MUX

Definition at line 688 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES3   0x00000003UL

Mode RES3 for DAC_OPA1MUX

Definition at line 689 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES4   0x00000004UL

Mode RES4 for DAC_OPA1MUX

Definition at line 690 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES5   0x00000005UL

Mode RES5 for DAC_OPA1MUX

Definition at line 691 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES6   0x00000006UL

Mode RES6 for DAC_OPA1MUX

Definition at line 692 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_RES7   0x00000007UL

Mode RES7 for DAC_OPA1MUX

Definition at line 693 of file ezr32wg_dac.h.

#define _DAC_OPA1MUX_RESSEL_SHIFT   28

Shift value for DAC_RESSEL

Definition at line 683 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_MASK   0x7440F737UL

Mask for DAC_OPA2MUX

Definition at line 706 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 721 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA2MUX

Definition at line 722 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_MASK   0x30UL

Bit mask for DAC_NEGSEL

Definition at line 720 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_NEGPAD   0x00000003UL

Mode NEGPAD for DAC_OPA2MUX

Definition at line 725 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_OPATAP   0x00000002UL

Mode OPATAP for DAC_OPA2MUX

Definition at line 724 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_SHIFT   4

Shift value for DAC_NEGSEL

Definition at line 719 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEGSEL_UG   0x00000001UL

Mode UG for DAC_OPA2MUX

Definition at line 723 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEXTOUT_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 771 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEXTOUT_MASK   0x4000000UL

Bit mask for DAC_NEXTOUT

Definition at line 770 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NEXTOUT_SHIFT   26

Shift value for DAC_NEXTOUT

Definition at line 769 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 753 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NPEN_MASK   0x2000UL

Bit mask for DAC_NPEN

Definition at line 752 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_NPEN_SHIFT   13

Shift value for DAC_NPEN

Definition at line 751 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTMODE_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 766 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTMODE_MASK   0x400000UL

Bit mask for DAC_OUTMODE

Definition at line 765 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTMODE_SHIFT   22

Shift value for DAC_OUTMODE

Definition at line 764 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 757 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTPEN_MASK   0xC000UL

Bit mask for DAC_OUTPEN

Definition at line 756 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPA2MUX_OUTPEN_OUT0   0x00000001UL

Mode OUT0 for DAC_OPA2MUX

Definition at line 758 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTPEN_OUT1   0x00000002UL

Mode OUT1 for DAC_OPA2MUX

Definition at line 759 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_OUTPEN_SHIFT   14

Shift value for DAC_OUTPEN

Definition at line 755 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 709 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA2MUX

Definition at line 710 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_MASK   0x7UL

Bit mask for DAC_POSSEL

Definition at line 708 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_OPA1INP   0x00000003UL

Mode OPA1INP for DAC_OPA2MUX

Definition at line 712 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_OPATAP   0x00000004UL

Mode OPATAP for DAC_OPA2MUX

Definition at line 713 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_POSPAD   0x00000002UL

Mode POSPAD for DAC_OPA2MUX

Definition at line 711 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_POSSEL_SHIFT   0

Shift value for DAC_POSSEL

Definition at line 707 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_PPEN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 748 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_PPEN_MASK   0x1000UL

Bit mask for DAC_PPEN

Definition at line 747 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_PPEN_SHIFT   12

Shift value for DAC_PPEN

Definition at line 746 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESETVALUE   0x00000000UL

Default value for DAC_OPA2MUX

Definition at line 705 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 733 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_DISABLE   0x00000000UL

Mode DISABLE for DAC_OPA2MUX

Definition at line 734 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_MASK   0x700UL

Bit mask for DAC_RESINMUX

Definition at line 732 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_NEGPAD   0x00000002UL

Mode NEGPAD for DAC_OPA2MUX

Definition at line 736 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_OPA1INP   0x00000001UL

Mode OPA1INP for DAC_OPA2MUX

Definition at line 735 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_POSPAD   0x00000003UL

Mode POSPAD for DAC_OPA2MUX

Definition at line 737 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_SHIFT   8

Shift value for DAC_RESINMUX

Definition at line 731 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESINMUX_VSS   0x00000004UL

Mode VSS for DAC_OPA2MUX

Definition at line 738 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPA2MUX

Definition at line 775 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_MASK   0x70000000UL

Bit mask for DAC_RESSEL

Definition at line 774 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES0   0x00000000UL

Mode RES0 for DAC_OPA2MUX

Definition at line 776 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES1   0x00000001UL

Mode RES1 for DAC_OPA2MUX

Definition at line 777 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES2   0x00000002UL

Mode RES2 for DAC_OPA2MUX

Definition at line 778 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES3   0x00000003UL

Mode RES3 for DAC_OPA2MUX

Definition at line 779 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES4   0x00000004UL

Mode RES4 for DAC_OPA2MUX

Definition at line 780 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES5   0x00000005UL

Mode RES5 for DAC_OPA2MUX

Definition at line 781 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES6   0x00000006UL

Mode RES6 for DAC_OPA2MUX

Definition at line 782 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_RES7   0x00000007UL

Mode RES7 for DAC_OPA2MUX

Definition at line 783 of file ezr32wg_dac.h.

#define _DAC_OPA2MUX_RESSEL_SHIFT   28

Shift value for DAC_RESSEL

Definition at line 773 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_MASK   0x01C3F1C7UL

Mask for DAC_OPACTRL

Definition at line 415 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0EN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 419 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0EN_MASK   0x1UL

Bit mask for DAC_OPA0EN

Definition at line 418 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0EN_SHIFT   0

Shift value for DAC_OPA0EN

Definition at line 417 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0HCMDIS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 434 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0HCMDIS_MASK   0x40UL

Bit mask for DAC_OPA0HCMDIS

Definition at line 433 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0HCMDIS_SHIFT   6

Shift value for DAC_OPA0HCMDIS

Definition at line 432 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0LPFDIS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 448 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0LPFDIS_MASK   0x3000UL

Bit mask for DAC_OPA0LPFDIS

Definition at line 447 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPACTRL_OPA0LPFDIS_NLPFDIS   0x00000002UL

Mode NLPFDIS for DAC_OPACTRL

Definition at line 450 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0LPFDIS_PLPFDIS   0x00000001UL

Mode PLPFDIS for DAC_OPACTRL

Definition at line 449 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0LPFDIS_SHIFT   12

Shift value for DAC_OPA0LPFDIS

Definition at line 446 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0SHORT_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 473 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0SHORT_MASK   0x400000UL

Bit mask for DAC_OPA0SHORT

Definition at line 472 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA0SHORT_SHIFT   22

Shift value for DAC_OPA0SHORT

Definition at line 471 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1EN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 424 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1EN_MASK   0x2UL

Bit mask for DAC_OPA1EN

Definition at line 423 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1EN_SHIFT   1

Shift value for DAC_OPA1EN

Definition at line 422 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1HCMDIS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 439 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1HCMDIS_MASK   0x80UL

Bit mask for DAC_OPA1HCMDIS

Definition at line 438 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1HCMDIS_SHIFT   7

Shift value for DAC_OPA1HCMDIS

Definition at line 437 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1LPFDIS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 456 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1LPFDIS_MASK   0xC000UL

Bit mask for DAC_OPA1LPFDIS

Definition at line 455 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPACTRL_OPA1LPFDIS_NLPFDIS   0x00000002UL

Mode NLPFDIS for DAC_OPACTRL

Definition at line 458 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1LPFDIS_PLPFDIS   0x00000001UL

Mode PLPFDIS for DAC_OPACTRL

Definition at line 457 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1LPFDIS_SHIFT   14

Shift value for DAC_OPA1LPFDIS

Definition at line 454 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1SHORT_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 478 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1SHORT_MASK   0x800000UL

Bit mask for DAC_OPA1SHORT

Definition at line 477 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA1SHORT_SHIFT   23

Shift value for DAC_OPA1SHORT

Definition at line 476 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2EN_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 429 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2EN_MASK   0x4UL

Bit mask for DAC_OPA2EN

Definition at line 428 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2EN_SHIFT   2

Shift value for DAC_OPA2EN

Definition at line 427 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2HCMDIS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 444 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2HCMDIS_MASK   0x100UL

Bit mask for DAC_OPA2HCMDIS

Definition at line 443 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2HCMDIS_SHIFT   8

Shift value for DAC_OPA2HCMDIS

Definition at line 442 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2LPFDIS_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 464 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2LPFDIS_MASK   0x30000UL

Bit mask for DAC_OPA2LPFDIS

Definition at line 463 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPACTRL_OPA2LPFDIS_NLPFDIS   0x00000002UL

Mode NLPFDIS for DAC_OPACTRL

Definition at line 466 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2LPFDIS_PLPFDIS   0x00000001UL

Mode PLPFDIS for DAC_OPACTRL

Definition at line 465 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2LPFDIS_SHIFT   16

Shift value for DAC_OPA2LPFDIS

Definition at line 462 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2SHORT_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_OPACTRL

Definition at line 483 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2SHORT_MASK   0x1000000UL

Bit mask for DAC_OPA2SHORT

Definition at line 482 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_OPA2SHORT_SHIFT   24

Shift value for DAC_OPA2SHORT

Definition at line 481 of file ezr32wg_dac.h.

#define _DAC_OPACTRL_RESETVALUE   0x00000000UL

Default value for DAC_OPACTRL

Definition at line 414 of file ezr32wg_dac.h.

#define _DAC_OPAOFFSET_MASK   0x0000003FUL

Mask for DAC_OPAOFFSET

Definition at line 488 of file ezr32wg_dac.h.

#define _DAC_OPAOFFSET_OPA2OFFSET_DEFAULT   0x00000020UL

Mode DEFAULT for DAC_OPAOFFSET

Definition at line 491 of file ezr32wg_dac.h.

#define _DAC_OPAOFFSET_OPA2OFFSET_MASK   0x3FUL

Bit mask for DAC_OPA2OFFSET

Definition at line 490 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPAOFFSET_OPA2OFFSET_SHIFT   0

Shift value for DAC_OPA2OFFSET

Definition at line 489 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define _DAC_OPAOFFSET_RESETVALUE   0x00000020UL

Default value for DAC_OPAOFFSET

Definition at line 487 of file ezr32wg_dac.h.

#define _DAC_STATUS_CH0DV_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_STATUS

Definition at line 149 of file ezr32wg_dac.h.

#define _DAC_STATUS_CH0DV_MASK   0x1UL

Bit mask for DAC_CH0DV

Definition at line 148 of file ezr32wg_dac.h.

#define _DAC_STATUS_CH0DV_SHIFT   0

Shift value for DAC_CH0DV

Definition at line 147 of file ezr32wg_dac.h.

#define _DAC_STATUS_CH1DV_DEFAULT   0x00000000UL

Mode DEFAULT for DAC_STATUS

Definition at line 154 of file ezr32wg_dac.h.

#define _DAC_STATUS_CH1DV_MASK   0x2UL

Bit mask for DAC_CH1DV

Definition at line 153 of file ezr32wg_dac.h.

#define _DAC_STATUS_CH1DV_SHIFT   1

Shift value for DAC_CH1DV

Definition at line 152 of file ezr32wg_dac.h.

#define _DAC_STATUS_MASK   0x00000003UL

Mask for DAC_STATUS

Definition at line 145 of file ezr32wg_dac.h.

#define _DAC_STATUS_RESETVALUE   0x00000000UL

Default value for DAC_STATUS

Definition at line 144 of file ezr32wg_dac.h.

#define DAC_BIASPROG_BIASPROG_DEFAULT   (_DAC_BIASPROG_BIASPROG_DEFAULT << 0)

Shifted mode DEFAULT for DAC_BIASPROG

Definition at line 397 of file ezr32wg_dac.h.

#define DAC_BIASPROG_HALFBIAS   (0x1UL << 6)

Half Bias Current

Definition at line 398 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_BIASPROG_HALFBIAS_DEFAULT   (_DAC_BIASPROG_HALFBIAS_DEFAULT << 6)

Shifted mode DEFAULT for DAC_BIASPROG

Definition at line 402 of file ezr32wg_dac.h.

#define DAC_BIASPROG_OPA2BIASPROG_DEFAULT   (_DAC_BIASPROG_OPA2BIASPROG_DEFAULT << 8)

Shifted mode DEFAULT for DAC_BIASPROG

Definition at line 406 of file ezr32wg_dac.h.

#define DAC_BIASPROG_OPA2HALFBIAS   (0x1UL << 14)

Half Bias Current

Definition at line 407 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_BIASPROG_OPA2HALFBIAS_DEFAULT   (_DAC_BIASPROG_OPA2HALFBIAS_DEFAULT << 14)

Shifted mode DEFAULT for DAC_BIASPROG

Definition at line 411 of file ezr32wg_dac.h.

#define DAC_CAL_CH0OFFSET_DEFAULT   (_DAC_CAL_CH0OFFSET_DEFAULT << 0)

Shifted mode DEFAULT for DAC_CAL

Definition at line 381 of file ezr32wg_dac.h.

#define DAC_CAL_CH1OFFSET_DEFAULT   (_DAC_CAL_CH1OFFSET_DEFAULT << 8)

Shifted mode DEFAULT for DAC_CAL

Definition at line 385 of file ezr32wg_dac.h.

#define DAC_CAL_GAIN_DEFAULT   (_DAC_CAL_GAIN_DEFAULT << 16)

Shifted mode DEFAULT for DAC_CAL

Definition at line 389 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_EN   (0x1UL << 0)

Channel 0 Enable

Definition at line 160 of file ezr32wg_dac.h.

Referenced by DAC_InitChannel(), OPAMP_Disable(), and OPAMP_Enable().

#define DAC_CH0CTRL_EN_DEFAULT   (_DAC_CH0CTRL_EN_DEFAULT << 0)

Shifted mode DEFAULT for DAC_CH0CTRL

Definition at line 164 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSEN   (0x1UL << 2)

Channel 0 PRS Trigger Enable

Definition at line 170 of file ezr32wg_dac.h.

Referenced by DAC_InitChannel().

#define DAC_CH0CTRL_PRSEN_DEFAULT   (_DAC_CH0CTRL_PRSEN_DEFAULT << 2)

Shifted mode DEFAULT for DAC_CH0CTRL

Definition at line 174 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_DEFAULT   (_DAC_CH0CTRL_PRSSEL_DEFAULT << 4)

Shifted mode DEFAULT for DAC_CH0CTRL

Definition at line 190 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH0   (_DAC_CH0CTRL_PRSSEL_PRSCH0 << 4)

Shifted mode PRSCH0 for DAC_CH0CTRL

Definition at line 191 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH1   (_DAC_CH0CTRL_PRSSEL_PRSCH1 << 4)

Shifted mode PRSCH1 for DAC_CH0CTRL

Definition at line 192 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH10   (_DAC_CH0CTRL_PRSSEL_PRSCH10 << 4)

Shifted mode PRSCH10 for DAC_CH0CTRL

Definition at line 201 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH11   (_DAC_CH0CTRL_PRSSEL_PRSCH11 << 4)

Shifted mode PRSCH11 for DAC_CH0CTRL

Definition at line 202 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH2   (_DAC_CH0CTRL_PRSSEL_PRSCH2 << 4)

Shifted mode PRSCH2 for DAC_CH0CTRL

Definition at line 193 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH3   (_DAC_CH0CTRL_PRSSEL_PRSCH3 << 4)

Shifted mode PRSCH3 for DAC_CH0CTRL

Definition at line 194 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH4   (_DAC_CH0CTRL_PRSSEL_PRSCH4 << 4)

Shifted mode PRSCH4 for DAC_CH0CTRL

Definition at line 195 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH5   (_DAC_CH0CTRL_PRSSEL_PRSCH5 << 4)

Shifted mode PRSCH5 for DAC_CH0CTRL

Definition at line 196 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH6   (_DAC_CH0CTRL_PRSSEL_PRSCH6 << 4)

Shifted mode PRSCH6 for DAC_CH0CTRL

Definition at line 197 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH7   (_DAC_CH0CTRL_PRSSEL_PRSCH7 << 4)

Shifted mode PRSCH7 for DAC_CH0CTRL

Definition at line 198 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH8   (_DAC_CH0CTRL_PRSSEL_PRSCH8 << 4)

Shifted mode PRSCH8 for DAC_CH0CTRL

Definition at line 199 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_PRSSEL_PRSCH9   (_DAC_CH0CTRL_PRSSEL_PRSCH9 << 4)

Shifted mode PRSCH9 for DAC_CH0CTRL

Definition at line 200 of file ezr32wg_dac.h.

#define DAC_CH0CTRL_REFREN   (0x1UL << 1)

Channel 0 Automatic Refresh Enable

Definition at line 165 of file ezr32wg_dac.h.

Referenced by DAC_InitChannel().

#define DAC_CH0CTRL_REFREN_DEFAULT   (_DAC_CH0CTRL_REFREN_DEFAULT << 1)

Shifted mode DEFAULT for DAC_CH0CTRL

Definition at line 169 of file ezr32wg_dac.h.

#define DAC_CH0DATA_DATA_DEFAULT   (_DAC_CH0DATA_DATA_DEFAULT << 0)

Shifted mode DEFAULT for DAC_CH0DATA

Definition at line 353 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_EN   (0x1UL << 0)

Channel 1 Enable

Definition at line 207 of file ezr32wg_dac.h.

Referenced by OPAMP_Disable(), and OPAMP_Enable().

#define DAC_CH1CTRL_EN_DEFAULT   (_DAC_CH1CTRL_EN_DEFAULT << 0)

Shifted mode DEFAULT for DAC_CH1CTRL

Definition at line 211 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSEN   (0x1UL << 2)

Channel 1 PRS Trigger Enable

Definition at line 217 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSEN_DEFAULT   (_DAC_CH1CTRL_PRSEN_DEFAULT << 2)

Shifted mode DEFAULT for DAC_CH1CTRL

Definition at line 221 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_DEFAULT   (_DAC_CH1CTRL_PRSSEL_DEFAULT << 4)

Shifted mode DEFAULT for DAC_CH1CTRL

Definition at line 237 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH0   (_DAC_CH1CTRL_PRSSEL_PRSCH0 << 4)

Shifted mode PRSCH0 for DAC_CH1CTRL

Definition at line 238 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH1   (_DAC_CH1CTRL_PRSSEL_PRSCH1 << 4)

Shifted mode PRSCH1 for DAC_CH1CTRL

Definition at line 239 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH10   (_DAC_CH1CTRL_PRSSEL_PRSCH10 << 4)

Shifted mode PRSCH10 for DAC_CH1CTRL

Definition at line 248 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH11   (_DAC_CH1CTRL_PRSSEL_PRSCH11 << 4)

Shifted mode PRSCH11 for DAC_CH1CTRL

Definition at line 249 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH2   (_DAC_CH1CTRL_PRSSEL_PRSCH2 << 4)

Shifted mode PRSCH2 for DAC_CH1CTRL

Definition at line 240 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH3   (_DAC_CH1CTRL_PRSSEL_PRSCH3 << 4)

Shifted mode PRSCH3 for DAC_CH1CTRL

Definition at line 241 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH4   (_DAC_CH1CTRL_PRSSEL_PRSCH4 << 4)

Shifted mode PRSCH4 for DAC_CH1CTRL

Definition at line 242 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH5   (_DAC_CH1CTRL_PRSSEL_PRSCH5 << 4)

Shifted mode PRSCH5 for DAC_CH1CTRL

Definition at line 243 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH6   (_DAC_CH1CTRL_PRSSEL_PRSCH6 << 4)

Shifted mode PRSCH6 for DAC_CH1CTRL

Definition at line 244 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH7   (_DAC_CH1CTRL_PRSSEL_PRSCH7 << 4)

Shifted mode PRSCH7 for DAC_CH1CTRL

Definition at line 245 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH8   (_DAC_CH1CTRL_PRSSEL_PRSCH8 << 4)

Shifted mode PRSCH8 for DAC_CH1CTRL

Definition at line 246 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_PRSSEL_PRSCH9   (_DAC_CH1CTRL_PRSSEL_PRSCH9 << 4)

Shifted mode PRSCH9 for DAC_CH1CTRL

Definition at line 247 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_REFREN   (0x1UL << 1)

Channel 1 Automatic Refresh Enable

Definition at line 212 of file ezr32wg_dac.h.

#define DAC_CH1CTRL_REFREN_DEFAULT   (_DAC_CH1CTRL_REFREN_DEFAULT << 1)

Shifted mode DEFAULT for DAC_CH1CTRL

Definition at line 216 of file ezr32wg_dac.h.

#define DAC_CH1DATA_DATA_DEFAULT   (_DAC_CH1DATA_DATA_DEFAULT << 0)

Shifted mode DEFAULT for DAC_CH1DATA

Definition at line 361 of file ezr32wg_dac.h.

#define DAC_COMBDATA_CH0DATA_DEFAULT   (_DAC_COMBDATA_CH0DATA_DEFAULT << 0)

Shifted mode DEFAULT for DAC_COMBDATA

Definition at line 369 of file ezr32wg_dac.h.

#define DAC_COMBDATA_CH1DATA_DEFAULT   (_DAC_COMBDATA_CH1DATA_DEFAULT << 16)

Shifted mode DEFAULT for DAC_COMBDATA

Definition at line 373 of file ezr32wg_dac.h.

#define DAC_CTRL_CH0PRESCRST   (0x1UL << 7)

Channel 0 Start Reset Prescaler

Definition at line 109 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define DAC_CTRL_CH0PRESCRST_DEFAULT   (_DAC_CTRL_CH0PRESCRST_DEFAULT << 7)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 113 of file ezr32wg_dac.h.

#define DAC_CTRL_CONVMODE_CONTINUOUS   (_DAC_CTRL_CONVMODE_CONTINUOUS << 2)

Shifted mode CONTINUOUS for DAC_CTRL

Definition at line 89 of file ezr32wg_dac.h.

#define DAC_CTRL_CONVMODE_DEFAULT   (_DAC_CTRL_CONVMODE_DEFAULT << 2)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 88 of file ezr32wg_dac.h.

#define DAC_CTRL_CONVMODE_SAMPLEHOLD   (_DAC_CTRL_CONVMODE_SAMPLEHOLD << 2)

Shifted mode SAMPLEHOLD for DAC_CTRL

Definition at line 90 of file ezr32wg_dac.h.

#define DAC_CTRL_CONVMODE_SAMPLEOFF   (_DAC_CTRL_CONVMODE_SAMPLEOFF << 2)

Shifted mode SAMPLEOFF for DAC_CTRL

Definition at line 91 of file ezr32wg_dac.h.

#define DAC_CTRL_DIFF   (0x1UL << 0)

Differential Mode

Definition at line 72 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define DAC_CTRL_DIFF_DEFAULT   (_DAC_CTRL_DIFF_DEFAULT << 0)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 76 of file ezr32wg_dac.h.

#define DAC_CTRL_OUTENPRS   (0x1UL << 6)

PRS Controlled Output Enable

Definition at line 104 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define DAC_CTRL_OUTENPRS_DEFAULT   (_DAC_CTRL_OUTENPRS_DEFAULT << 6)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 108 of file ezr32wg_dac.h.

#define DAC_CTRL_OUTMODE_ADC   (_DAC_CTRL_OUTMODE_ADC << 4)

Shifted mode ADC for DAC_CTRL

Definition at line 102 of file ezr32wg_dac.h.

#define DAC_CTRL_OUTMODE_DEFAULT   (_DAC_CTRL_OUTMODE_DEFAULT << 4)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 100 of file ezr32wg_dac.h.

#define DAC_CTRL_OUTMODE_DISABLE   (_DAC_CTRL_OUTMODE_DISABLE << 4)

Shifted mode DISABLE for DAC_CTRL

Definition at line 99 of file ezr32wg_dac.h.

#define DAC_CTRL_OUTMODE_PIN   (_DAC_CTRL_OUTMODE_PIN << 4)

Shifted mode PIN for DAC_CTRL

Definition at line 101 of file ezr32wg_dac.h.

#define DAC_CTRL_OUTMODE_PINADC   (_DAC_CTRL_OUTMODE_PINADC << 4)

Shifted mode PINADC for DAC_CTRL

Definition at line 103 of file ezr32wg_dac.h.

#define DAC_CTRL_PRESC_DEFAULT   (_DAC_CTRL_PRESC_DEFAULT << 16)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 128 of file ezr32wg_dac.h.

#define DAC_CTRL_PRESC_NODIVISION   (_DAC_CTRL_PRESC_NODIVISION << 16)

Shifted mode NODIVISION for DAC_CTRL

Definition at line 129 of file ezr32wg_dac.h.

#define DAC_CTRL_REFRSEL_16CYCLES   (_DAC_CTRL_REFRSEL_16CYCLES << 20)

Shifted mode 16CYCLES for DAC_CTRL

Definition at line 139 of file ezr32wg_dac.h.

#define DAC_CTRL_REFRSEL_32CYCLES   (_DAC_CTRL_REFRSEL_32CYCLES << 20)

Shifted mode 32CYCLES for DAC_CTRL

Definition at line 140 of file ezr32wg_dac.h.

#define DAC_CTRL_REFRSEL_64CYCLES   (_DAC_CTRL_REFRSEL_64CYCLES << 20)

Shifted mode 64CYCLES for DAC_CTRL

Definition at line 141 of file ezr32wg_dac.h.

#define DAC_CTRL_REFRSEL_8CYCLES   (_DAC_CTRL_REFRSEL_8CYCLES << 20)

Shifted mode 8CYCLES for DAC_CTRL

Definition at line 138 of file ezr32wg_dac.h.

#define DAC_CTRL_REFRSEL_DEFAULT   (_DAC_CTRL_REFRSEL_DEFAULT << 20)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 137 of file ezr32wg_dac.h.

#define DAC_CTRL_REFSEL_1V25   (_DAC_CTRL_REFSEL_1V25 << 8)

Shifted mode 1V25 for DAC_CTRL

Definition at line 121 of file ezr32wg_dac.h.

#define DAC_CTRL_REFSEL_2V5   (_DAC_CTRL_REFSEL_2V5 << 8)

Shifted mode 2V5 for DAC_CTRL

Definition at line 122 of file ezr32wg_dac.h.

#define DAC_CTRL_REFSEL_DEFAULT   (_DAC_CTRL_REFSEL_DEFAULT << 8)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 120 of file ezr32wg_dac.h.

#define DAC_CTRL_REFSEL_VDD   (_DAC_CTRL_REFSEL_VDD << 8)

Shifted mode VDD for DAC_CTRL

Definition at line 123 of file ezr32wg_dac.h.

#define DAC_CTRL_SINEMODE   (0x1UL << 1)

Sine Mode

Definition at line 77 of file ezr32wg_dac.h.

Referenced by DAC_Init().

#define DAC_CTRL_SINEMODE_DEFAULT   (_DAC_CTRL_SINEMODE_DEFAULT << 1)

Shifted mode DEFAULT for DAC_CTRL

Definition at line 81 of file ezr32wg_dac.h.

#define DAC_IEN_CH0   (0x1UL << 0)

Channel 0 Conversion Complete Interrupt Enable

Definition at line 254 of file ezr32wg_dac.h.

#define DAC_IEN_CH0_DEFAULT   (_DAC_IEN_CH0_DEFAULT << 0)

Shifted mode DEFAULT for DAC_IEN

Definition at line 258 of file ezr32wg_dac.h.

#define DAC_IEN_CH0UF   (0x1UL << 4)

Channel 0 Conversion Data Underflow Interrupt Enable

Definition at line 264 of file ezr32wg_dac.h.

#define DAC_IEN_CH0UF_DEFAULT   (_DAC_IEN_CH0UF_DEFAULT << 4)

Shifted mode DEFAULT for DAC_IEN

Definition at line 268 of file ezr32wg_dac.h.

#define DAC_IEN_CH1   (0x1UL << 1)

Channel 1 Conversion Complete Interrupt Enable

Definition at line 259 of file ezr32wg_dac.h.

#define DAC_IEN_CH1_DEFAULT   (_DAC_IEN_CH1_DEFAULT << 1)

Shifted mode DEFAULT for DAC_IEN

Definition at line 263 of file ezr32wg_dac.h.

#define DAC_IEN_CH1UF   (0x1UL << 5)

Channel 1 Conversion Data Underflow Interrupt Enable

Definition at line 269 of file ezr32wg_dac.h.

#define DAC_IEN_CH1UF_DEFAULT   (_DAC_IEN_CH1UF_DEFAULT << 5)

Shifted mode DEFAULT for DAC_IEN

Definition at line 273 of file ezr32wg_dac.h.

#define DAC_IF_CH0   (0x1UL << 0)

Channel 0 Conversion Complete Interrupt Flag

Definition at line 278 of file ezr32wg_dac.h.

#define DAC_IF_CH0_DEFAULT   (_DAC_IF_CH0_DEFAULT << 0)

Shifted mode DEFAULT for DAC_IF

Definition at line 282 of file ezr32wg_dac.h.

#define DAC_IF_CH0UF   (0x1UL << 4)

Channel 0 Data Underflow Interrupt Flag

Definition at line 288 of file ezr32wg_dac.h.

#define DAC_IF_CH0UF_DEFAULT   (_DAC_IF_CH0UF_DEFAULT << 4)

Shifted mode DEFAULT for DAC_IF

Definition at line 292 of file ezr32wg_dac.h.

#define DAC_IF_CH1   (0x1UL << 1)

Channel 1 Conversion Complete Interrupt Flag

Definition at line 283 of file ezr32wg_dac.h.

#define DAC_IF_CH1_DEFAULT   (_DAC_IF_CH1_DEFAULT << 1)

Shifted mode DEFAULT for DAC_IF

Definition at line 287 of file ezr32wg_dac.h.

#define DAC_IF_CH1UF   (0x1UL << 5)

Channel 1 Data Underflow Interrupt Flag

Definition at line 293 of file ezr32wg_dac.h.

#define DAC_IF_CH1UF_DEFAULT   (_DAC_IF_CH1UF_DEFAULT << 5)

Shifted mode DEFAULT for DAC_IF

Definition at line 297 of file ezr32wg_dac.h.

#define DAC_IFC_CH0   (0x1UL << 0)

Channel 0 Conversion Complete Interrupt Flag Clear

Definition at line 326 of file ezr32wg_dac.h.

#define DAC_IFC_CH0_DEFAULT   (_DAC_IFC_CH0_DEFAULT << 0)

Shifted mode DEFAULT for DAC_IFC

Definition at line 330 of file ezr32wg_dac.h.

#define DAC_IFC_CH0UF   (0x1UL << 4)

Channel 0 Data Underflow Interrupt Flag Clear

Definition at line 336 of file ezr32wg_dac.h.

#define DAC_IFC_CH0UF_DEFAULT   (_DAC_IFC_CH0UF_DEFAULT << 4)

Shifted mode DEFAULT for DAC_IFC

Definition at line 340 of file ezr32wg_dac.h.

#define DAC_IFC_CH1   (0x1UL << 1)

Channel 1 Conversion Complete Interrupt Flag Clear

Definition at line 331 of file ezr32wg_dac.h.

#define DAC_IFC_CH1_DEFAULT   (_DAC_IFC_CH1_DEFAULT << 1)

Shifted mode DEFAULT for DAC_IFC

Definition at line 335 of file ezr32wg_dac.h.

#define DAC_IFC_CH1UF   (0x1UL << 5)

Channel 1 Data Underflow Interrupt Flag Clear

Definition at line 341 of file ezr32wg_dac.h.

#define DAC_IFC_CH1UF_DEFAULT   (_DAC_IFC_CH1UF_DEFAULT << 5)

Shifted mode DEFAULT for DAC_IFC

Definition at line 345 of file ezr32wg_dac.h.

#define DAC_IFS_CH0   (0x1UL << 0)

Channel 0 Conversion Complete Interrupt Flag Set

Definition at line 302 of file ezr32wg_dac.h.

#define DAC_IFS_CH0_DEFAULT   (_DAC_IFS_CH0_DEFAULT << 0)

Shifted mode DEFAULT for DAC_IFS

Definition at line 306 of file ezr32wg_dac.h.

#define DAC_IFS_CH0UF   (0x1UL << 4)

Channel 0 Data Underflow Interrupt Flag Set

Definition at line 312 of file ezr32wg_dac.h.

#define DAC_IFS_CH0UF_DEFAULT   (_DAC_IFS_CH0UF_DEFAULT << 4)

Shifted mode DEFAULT for DAC_IFS

Definition at line 316 of file ezr32wg_dac.h.

#define DAC_IFS_CH1   (0x1UL << 1)

Channel 1 Conversion Complete Interrupt Flag Set

Definition at line 307 of file ezr32wg_dac.h.

#define DAC_IFS_CH1_DEFAULT   (_DAC_IFS_CH1_DEFAULT << 1)

Shifted mode DEFAULT for DAC_IFS

Definition at line 311 of file ezr32wg_dac.h.

#define DAC_IFS_CH1UF   (0x1UL << 5)

Channel 1 Data Underflow Interrupt Flag Set

Definition at line 317 of file ezr32wg_dac.h.

#define DAC_IFS_CH1UF_DEFAULT   (_DAC_IFS_CH1UF_DEFAULT << 5)

Shifted mode DEFAULT for DAC_IFS

Definition at line 321 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NEGSEL_DEFAULT   (_DAC_OPA0MUX_NEGSEL_DEFAULT << 4)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 518 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NEGSEL_DISABLE   (_DAC_OPA0MUX_NEGSEL_DISABLE << 4)

Shifted mode DISABLE for DAC_OPA0MUX

Definition at line 519 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NEGSEL_NEGPAD   (_DAC_OPA0MUX_NEGSEL_NEGPAD << 4)

Shifted mode NEGPAD for DAC_OPA0MUX

Definition at line 522 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NEGSEL_OPATAP   (_DAC_OPA0MUX_NEGSEL_OPATAP << 4)

Shifted mode OPATAP for DAC_OPA0MUX

Definition at line 521 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NEGSEL_UG   (_DAC_OPA0MUX_NEGSEL_UG << 4)

Shifted mode UG for DAC_OPA0MUX

Definition at line 520 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NEXTOUT   (0x1UL << 26)

OPA0 Next Enable

Definition at line 573 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA0MUX_NEXTOUT_DEFAULT   (_DAC_OPA0MUX_NEXTOUT_DEFAULT << 26)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 577 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_NPEN   (0x1UL << 13)

OPA0 Negative Pad Input Enable

Definition at line 542 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA0MUX_NPEN_DEFAULT   (_DAC_OPA0MUX_NPEN_DEFAULT << 13)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 546 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTMODE_ALL   (_DAC_OPA0MUX_OUTMODE_ALL << 22)

Shifted mode ALL for DAC_OPA0MUX

Definition at line 572 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTMODE_ALT   (_DAC_OPA0MUX_OUTMODE_ALT << 22)

Shifted mode ALT for DAC_OPA0MUX

Definition at line 571 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTMODE_DEFAULT   (_DAC_OPA0MUX_OUTMODE_DEFAULT << 22)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 569 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTMODE_DISABLE   (_DAC_OPA0MUX_OUTMODE_DISABLE << 22)

Shifted mode DISABLE for DAC_OPA0MUX

Definition at line 568 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTMODE_MAIN   (_DAC_OPA0MUX_OUTMODE_MAIN << 22)

Shifted mode MAIN for DAC_OPA0MUX

Definition at line 570 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTPEN_DEFAULT   (_DAC_OPA0MUX_OUTPEN_DEFAULT << 14)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 555 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTPEN_OUT0   (_DAC_OPA0MUX_OUTPEN_OUT0 << 14)

Shifted mode OUT0 for DAC_OPA0MUX

Definition at line 556 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTPEN_OUT1   (_DAC_OPA0MUX_OUTPEN_OUT1 << 14)

Shifted mode OUT1 for DAC_OPA0MUX

Definition at line 557 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTPEN_OUT2   (_DAC_OPA0MUX_OUTPEN_OUT2 << 14)

Shifted mode OUT2 for DAC_OPA0MUX

Definition at line 558 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTPEN_OUT3   (_DAC_OPA0MUX_OUTPEN_OUT3 << 14)

Shifted mode OUT3 for DAC_OPA0MUX

Definition at line 559 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_OUTPEN_OUT4   (_DAC_OPA0MUX_OUTPEN_OUT4 << 14)

Shifted mode OUT4 for DAC_OPA0MUX

Definition at line 560 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_POSSEL_DAC   (_DAC_OPA0MUX_POSSEL_DAC << 0)

Shifted mode DAC for DAC_OPA0MUX

Definition at line 507 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_POSSEL_DEFAULT   (_DAC_OPA0MUX_POSSEL_DEFAULT << 0)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 505 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_POSSEL_DISABLE   (_DAC_OPA0MUX_POSSEL_DISABLE << 0)

Shifted mode DISABLE for DAC_OPA0MUX

Definition at line 506 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_POSSEL_OPA0INP   (_DAC_OPA0MUX_POSSEL_OPA0INP << 0)

Shifted mode OPA0INP for DAC_OPA0MUX

Definition at line 509 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_POSSEL_OPATAP   (_DAC_OPA0MUX_POSSEL_OPATAP << 0)

Shifted mode OPATAP for DAC_OPA0MUX

Definition at line 510 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_POSSEL_POSPAD   (_DAC_OPA0MUX_POSSEL_POSPAD << 0)

Shifted mode POSPAD for DAC_OPA0MUX

Definition at line 508 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_PPEN   (0x1UL << 12)

OPA0 Positive Pad Input Enable

Definition at line 537 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA0MUX_PPEN_DEFAULT   (_DAC_OPA0MUX_PPEN_DEFAULT << 12)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 541 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESINMUX_DEFAULT   (_DAC_OPA0MUX_RESINMUX_DEFAULT << 8)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 531 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESINMUX_DISABLE   (_DAC_OPA0MUX_RESINMUX_DISABLE << 8)

Shifted mode DISABLE for DAC_OPA0MUX

Definition at line 532 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESINMUX_NEGPAD   (_DAC_OPA0MUX_RESINMUX_NEGPAD << 8)

Shifted mode NEGPAD for DAC_OPA0MUX

Definition at line 534 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESINMUX_OPA0INP   (_DAC_OPA0MUX_RESINMUX_OPA0INP << 8)

Shifted mode OPA0INP for DAC_OPA0MUX

Definition at line 533 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESINMUX_POSPAD   (_DAC_OPA0MUX_RESINMUX_POSPAD << 8)

Shifted mode POSPAD for DAC_OPA0MUX

Definition at line 535 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESINMUX_VSS   (_DAC_OPA0MUX_RESINMUX_VSS << 8)

Shifted mode VSS for DAC_OPA0MUX

Definition at line 536 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_DEFAULT   (_DAC_OPA0MUX_RESSEL_DEFAULT << 28)

Shifted mode DEFAULT for DAC_OPA0MUX

Definition at line 589 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES0   (_DAC_OPA0MUX_RESSEL_RES0 << 28)

Shifted mode RES0 for DAC_OPA0MUX

Definition at line 590 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES1   (_DAC_OPA0MUX_RESSEL_RES1 << 28)

Shifted mode RES1 for DAC_OPA0MUX

Definition at line 591 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES2   (_DAC_OPA0MUX_RESSEL_RES2 << 28)

Shifted mode RES2 for DAC_OPA0MUX

Definition at line 592 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES3   (_DAC_OPA0MUX_RESSEL_RES3 << 28)

Shifted mode RES3 for DAC_OPA0MUX

Definition at line 593 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES4   (_DAC_OPA0MUX_RESSEL_RES4 << 28)

Shifted mode RES4 for DAC_OPA0MUX

Definition at line 594 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES5   (_DAC_OPA0MUX_RESSEL_RES5 << 28)

Shifted mode RES5 for DAC_OPA0MUX

Definition at line 595 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES6   (_DAC_OPA0MUX_RESSEL_RES6 << 28)

Shifted mode RES6 for DAC_OPA0MUX

Definition at line 596 of file ezr32wg_dac.h.

#define DAC_OPA0MUX_RESSEL_RES7   (_DAC_OPA0MUX_RESSEL_RES7 << 28)

Shifted mode RES7 for DAC_OPA0MUX

Definition at line 597 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NEGSEL_DEFAULT   (_DAC_OPA1MUX_NEGSEL_DEFAULT << 4)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 623 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NEGSEL_DISABLE   (_DAC_OPA1MUX_NEGSEL_DISABLE << 4)

Shifted mode DISABLE for DAC_OPA1MUX

Definition at line 624 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NEGSEL_NEGPAD   (_DAC_OPA1MUX_NEGSEL_NEGPAD << 4)

Shifted mode NEGPAD for DAC_OPA1MUX

Definition at line 627 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NEGSEL_OPATAP   (_DAC_OPA1MUX_NEGSEL_OPATAP << 4)

Shifted mode OPATAP for DAC_OPA1MUX

Definition at line 626 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NEGSEL_UG   (_DAC_OPA1MUX_NEGSEL_UG << 4)

Shifted mode UG for DAC_OPA1MUX

Definition at line 625 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NEXTOUT   (0x1UL << 26)

OPA1 Next Enable

Definition at line 678 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA1MUX_NEXTOUT_DEFAULT   (_DAC_OPA1MUX_NEXTOUT_DEFAULT << 26)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 682 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_NPEN   (0x1UL << 13)

OPA1 Negative Pad Input Enable

Definition at line 647 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA1MUX_NPEN_DEFAULT   (_DAC_OPA1MUX_NPEN_DEFAULT << 13)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 651 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTMODE_ALL   (_DAC_OPA1MUX_OUTMODE_ALL << 22)

Shifted mode ALL for DAC_OPA1MUX

Definition at line 677 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTMODE_ALT   (_DAC_OPA1MUX_OUTMODE_ALT << 22)

Shifted mode ALT for DAC_OPA1MUX

Definition at line 676 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTMODE_DEFAULT   (_DAC_OPA1MUX_OUTMODE_DEFAULT << 22)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 673 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTMODE_DISABLE   (_DAC_OPA1MUX_OUTMODE_DISABLE << 22)

Shifted mode DISABLE for DAC_OPA1MUX

Definition at line 674 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTMODE_MAIN   (_DAC_OPA1MUX_OUTMODE_MAIN << 22)

Shifted mode MAIN for DAC_OPA1MUX

Definition at line 675 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTPEN_DEFAULT   (_DAC_OPA1MUX_OUTPEN_DEFAULT << 14)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 660 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTPEN_OUT0   (_DAC_OPA1MUX_OUTPEN_OUT0 << 14)

Shifted mode OUT0 for DAC_OPA1MUX

Definition at line 661 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTPEN_OUT1   (_DAC_OPA1MUX_OUTPEN_OUT1 << 14)

Shifted mode OUT1 for DAC_OPA1MUX

Definition at line 662 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTPEN_OUT2   (_DAC_OPA1MUX_OUTPEN_OUT2 << 14)

Shifted mode OUT2 for DAC_OPA1MUX

Definition at line 663 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTPEN_OUT3   (_DAC_OPA1MUX_OUTPEN_OUT3 << 14)

Shifted mode OUT3 for DAC_OPA1MUX

Definition at line 664 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_OUTPEN_OUT4   (_DAC_OPA1MUX_OUTPEN_OUT4 << 14)

Shifted mode OUT4 for DAC_OPA1MUX

Definition at line 665 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_POSSEL_DAC   (_DAC_OPA1MUX_POSSEL_DAC << 0)

Shifted mode DAC for DAC_OPA1MUX

Definition at line 612 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_POSSEL_DEFAULT   (_DAC_OPA1MUX_POSSEL_DEFAULT << 0)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 610 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_POSSEL_DISABLE   (_DAC_OPA1MUX_POSSEL_DISABLE << 0)

Shifted mode DISABLE for DAC_OPA1MUX

Definition at line 611 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_POSSEL_OPA0INP   (_DAC_OPA1MUX_POSSEL_OPA0INP << 0)

Shifted mode OPA0INP for DAC_OPA1MUX

Definition at line 614 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_POSSEL_OPATAP   (_DAC_OPA1MUX_POSSEL_OPATAP << 0)

Shifted mode OPATAP for DAC_OPA1MUX

Definition at line 615 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_POSSEL_POSPAD   (_DAC_OPA1MUX_POSSEL_POSPAD << 0)

Shifted mode POSPAD for DAC_OPA1MUX

Definition at line 613 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_PPEN   (0x1UL << 12)

OPA1 Positive Pad Input Enable

Definition at line 642 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA1MUX_PPEN_DEFAULT   (_DAC_OPA1MUX_PPEN_DEFAULT << 12)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 646 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESINMUX_DEFAULT   (_DAC_OPA1MUX_RESINMUX_DEFAULT << 8)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 636 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESINMUX_DISABLE   (_DAC_OPA1MUX_RESINMUX_DISABLE << 8)

Shifted mode DISABLE for DAC_OPA1MUX

Definition at line 637 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESINMUX_NEGPAD   (_DAC_OPA1MUX_RESINMUX_NEGPAD << 8)

Shifted mode NEGPAD for DAC_OPA1MUX

Definition at line 639 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESINMUX_OPA0INP   (_DAC_OPA1MUX_RESINMUX_OPA0INP << 8)

Shifted mode OPA0INP for DAC_OPA1MUX

Definition at line 638 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESINMUX_POSPAD   (_DAC_OPA1MUX_RESINMUX_POSPAD << 8)

Shifted mode POSPAD for DAC_OPA1MUX

Definition at line 640 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESINMUX_VSS   (_DAC_OPA1MUX_RESINMUX_VSS << 8)

Shifted mode VSS for DAC_OPA1MUX

Definition at line 641 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_DEFAULT   (_DAC_OPA1MUX_RESSEL_DEFAULT << 28)

Shifted mode DEFAULT for DAC_OPA1MUX

Definition at line 694 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES0   (_DAC_OPA1MUX_RESSEL_RES0 << 28)

Shifted mode RES0 for DAC_OPA1MUX

Definition at line 695 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES1   (_DAC_OPA1MUX_RESSEL_RES1 << 28)

Shifted mode RES1 for DAC_OPA1MUX

Definition at line 696 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES2   (_DAC_OPA1MUX_RESSEL_RES2 << 28)

Shifted mode RES2 for DAC_OPA1MUX

Definition at line 697 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES3   (_DAC_OPA1MUX_RESSEL_RES3 << 28)

Shifted mode RES3 for DAC_OPA1MUX

Definition at line 698 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES4   (_DAC_OPA1MUX_RESSEL_RES4 << 28)

Shifted mode RES4 for DAC_OPA1MUX

Definition at line 699 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES5   (_DAC_OPA1MUX_RESSEL_RES5 << 28)

Shifted mode RES5 for DAC_OPA1MUX

Definition at line 700 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES6   (_DAC_OPA1MUX_RESSEL_RES6 << 28)

Shifted mode RES6 for DAC_OPA1MUX

Definition at line 701 of file ezr32wg_dac.h.

#define DAC_OPA1MUX_RESSEL_RES7   (_DAC_OPA1MUX_RESSEL_RES7 << 28)

Shifted mode RES7 for DAC_OPA1MUX

Definition at line 702 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NEGSEL_DEFAULT   (_DAC_OPA2MUX_NEGSEL_DEFAULT << 4)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 726 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NEGSEL_DISABLE   (_DAC_OPA2MUX_NEGSEL_DISABLE << 4)

Shifted mode DISABLE for DAC_OPA2MUX

Definition at line 727 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NEGSEL_NEGPAD   (_DAC_OPA2MUX_NEGSEL_NEGPAD << 4)

Shifted mode NEGPAD for DAC_OPA2MUX

Definition at line 730 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NEGSEL_OPATAP   (_DAC_OPA2MUX_NEGSEL_OPATAP << 4)

Shifted mode OPATAP for DAC_OPA2MUX

Definition at line 729 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NEGSEL_UG   (_DAC_OPA2MUX_NEGSEL_UG << 4)

Shifted mode UG for DAC_OPA2MUX

Definition at line 728 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NEXTOUT   (0x1UL << 26)

OPA2 Next Enable

Definition at line 768 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_NEXTOUT_DEFAULT   (_DAC_OPA2MUX_NEXTOUT_DEFAULT << 26)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 772 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_NPEN   (0x1UL << 13)

OPA2 Negative Pad Input Enable

Definition at line 750 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_NPEN_DEFAULT   (_DAC_OPA2MUX_NPEN_DEFAULT << 13)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 754 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_OUTMODE   (0x1UL << 22)

Output Select

Definition at line 763 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_OUTMODE_DEFAULT   (_DAC_OPA2MUX_OUTMODE_DEFAULT << 22)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 767 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_OUTPEN_DEFAULT   (_DAC_OPA2MUX_OUTPEN_DEFAULT << 14)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 760 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_OUTPEN_OUT0   (_DAC_OPA2MUX_OUTPEN_OUT0 << 14)

Shifted mode OUT0 for DAC_OPA2MUX

Definition at line 761 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_OUTPEN_OUT1   (_DAC_OPA2MUX_OUTPEN_OUT1 << 14)

Shifted mode OUT1 for DAC_OPA2MUX

Definition at line 762 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_POSSEL_DEFAULT   (_DAC_OPA2MUX_POSSEL_DEFAULT << 0)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 714 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_POSSEL_DISABLE   (_DAC_OPA2MUX_POSSEL_DISABLE << 0)

Shifted mode DISABLE for DAC_OPA2MUX

Definition at line 715 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_POSSEL_OPA1INP   (_DAC_OPA2MUX_POSSEL_OPA1INP << 0)

Shifted mode OPA1INP for DAC_OPA2MUX

Definition at line 717 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_POSSEL_OPATAP   (_DAC_OPA2MUX_POSSEL_OPATAP << 0)

Shifted mode OPATAP for DAC_OPA2MUX

Definition at line 718 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_POSSEL_POSPAD   (_DAC_OPA2MUX_POSSEL_POSPAD << 0)

Shifted mode POSPAD for DAC_OPA2MUX

Definition at line 716 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_PPEN   (0x1UL << 12)

OPA2 Positive Pad Input Enable

Definition at line 745 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPA2MUX_PPEN_DEFAULT   (_DAC_OPA2MUX_PPEN_DEFAULT << 12)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 749 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESINMUX_DEFAULT   (_DAC_OPA2MUX_RESINMUX_DEFAULT << 8)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 739 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESINMUX_DISABLE   (_DAC_OPA2MUX_RESINMUX_DISABLE << 8)

Shifted mode DISABLE for DAC_OPA2MUX

Definition at line 740 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESINMUX_NEGPAD   (_DAC_OPA2MUX_RESINMUX_NEGPAD << 8)

Shifted mode NEGPAD for DAC_OPA2MUX

Definition at line 742 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESINMUX_OPA1INP   (_DAC_OPA2MUX_RESINMUX_OPA1INP << 8)

Shifted mode OPA1INP for DAC_OPA2MUX

Definition at line 741 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESINMUX_POSPAD   (_DAC_OPA2MUX_RESINMUX_POSPAD << 8)

Shifted mode POSPAD for DAC_OPA2MUX

Definition at line 743 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESINMUX_VSS   (_DAC_OPA2MUX_RESINMUX_VSS << 8)

Shifted mode VSS for DAC_OPA2MUX

Definition at line 744 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_DEFAULT   (_DAC_OPA2MUX_RESSEL_DEFAULT << 28)

Shifted mode DEFAULT for DAC_OPA2MUX

Definition at line 784 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES0   (_DAC_OPA2MUX_RESSEL_RES0 << 28)

Shifted mode RES0 for DAC_OPA2MUX

Definition at line 785 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES1   (_DAC_OPA2MUX_RESSEL_RES1 << 28)

Shifted mode RES1 for DAC_OPA2MUX

Definition at line 786 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES2   (_DAC_OPA2MUX_RESSEL_RES2 << 28)

Shifted mode RES2 for DAC_OPA2MUX

Definition at line 787 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES3   (_DAC_OPA2MUX_RESSEL_RES3 << 28)

Shifted mode RES3 for DAC_OPA2MUX

Definition at line 788 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES4   (_DAC_OPA2MUX_RESSEL_RES4 << 28)

Shifted mode RES4 for DAC_OPA2MUX

Definition at line 789 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES5   (_DAC_OPA2MUX_RESSEL_RES5 << 28)

Shifted mode RES5 for DAC_OPA2MUX

Definition at line 790 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES6   (_DAC_OPA2MUX_RESSEL_RES6 << 28)

Shifted mode RES6 for DAC_OPA2MUX

Definition at line 791 of file ezr32wg_dac.h.

#define DAC_OPA2MUX_RESSEL_RES7   (_DAC_OPA2MUX_RESSEL_RES7 << 28)

Shifted mode RES7 for DAC_OPA2MUX

Definition at line 792 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA0EN   (0x1UL << 0)

OPA0 Enable

Definition at line 416 of file ezr32wg_dac.h.

Referenced by OPAMP_Disable(), and OPAMP_Enable().

#define DAC_OPACTRL_OPA0EN_DEFAULT   (_DAC_OPACTRL_OPA0EN_DEFAULT << 0)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 420 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA0HCMDIS   (0x1UL << 6)

High Common Mode Disable.

Definition at line 431 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA0HCMDIS_DEFAULT   (_DAC_OPACTRL_OPA0HCMDIS_DEFAULT << 6)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 435 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA0LPFDIS_DEFAULT   (_DAC_OPACTRL_OPA0LPFDIS_DEFAULT << 12)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 451 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA0LPFDIS_NLPFDIS   (_DAC_OPACTRL_OPA0LPFDIS_NLPFDIS << 12)

Shifted mode NLPFDIS for DAC_OPACTRL

Definition at line 453 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA0LPFDIS_PLPFDIS   (_DAC_OPACTRL_OPA0LPFDIS_PLPFDIS << 12)

Shifted mode PLPFDIS for DAC_OPACTRL

Definition at line 452 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA0SHORT   (0x1UL << 22)

Short the non-inverting and inverting input.

Definition at line 470 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA0SHORT_DEFAULT   (_DAC_OPACTRL_OPA0SHORT_DEFAULT << 22)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 474 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA1EN   (0x1UL << 1)

OPA1 Enable

Definition at line 421 of file ezr32wg_dac.h.

Referenced by OPAMP_Disable(), and OPAMP_Enable().

#define DAC_OPACTRL_OPA1EN_DEFAULT   (_DAC_OPACTRL_OPA1EN_DEFAULT << 1)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 425 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA1HCMDIS   (0x1UL << 7)

High Common Mode Disable.

Definition at line 436 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA1HCMDIS_DEFAULT   (_DAC_OPACTRL_OPA1HCMDIS_DEFAULT << 7)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 440 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA1LPFDIS_DEFAULT   (_DAC_OPACTRL_OPA1LPFDIS_DEFAULT << 14)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 459 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA1LPFDIS_NLPFDIS   (_DAC_OPACTRL_OPA1LPFDIS_NLPFDIS << 14)

Shifted mode NLPFDIS for DAC_OPACTRL

Definition at line 461 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA1LPFDIS_PLPFDIS   (_DAC_OPACTRL_OPA1LPFDIS_PLPFDIS << 14)

Shifted mode PLPFDIS for DAC_OPACTRL

Definition at line 460 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA1SHORT   (0x1UL << 23)

Short the non-inverting and inverting input.

Definition at line 475 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA1SHORT_DEFAULT   (_DAC_OPACTRL_OPA1SHORT_DEFAULT << 23)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 479 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA2EN   (0x1UL << 2)

OPA2 Enable

Definition at line 426 of file ezr32wg_dac.h.

Referenced by OPAMP_Disable(), and OPAMP_Enable().

#define DAC_OPACTRL_OPA2EN_DEFAULT   (_DAC_OPACTRL_OPA2EN_DEFAULT << 2)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 430 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA2HCMDIS   (0x1UL << 8)

High Common Mode Disable.

Definition at line 441 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA2HCMDIS_DEFAULT   (_DAC_OPACTRL_OPA2HCMDIS_DEFAULT << 8)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 445 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA2LPFDIS_DEFAULT   (_DAC_OPACTRL_OPA2LPFDIS_DEFAULT << 16)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 467 of file ezr32wg_dac.h.

#define DAC_OPACTRL_OPA2LPFDIS_NLPFDIS   (_DAC_OPACTRL_OPA2LPFDIS_NLPFDIS << 16)

Shifted mode NLPFDIS for DAC_OPACTRL

Definition at line 469 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA2LPFDIS_PLPFDIS   (_DAC_OPACTRL_OPA2LPFDIS_PLPFDIS << 16)

Shifted mode PLPFDIS for DAC_OPACTRL

Definition at line 468 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA2SHORT   (0x1UL << 24)

Short the non-inverting and inverting input.

Definition at line 480 of file ezr32wg_dac.h.

Referenced by OPAMP_Enable().

#define DAC_OPACTRL_OPA2SHORT_DEFAULT   (_DAC_OPACTRL_OPA2SHORT_DEFAULT << 24)

Shifted mode DEFAULT for DAC_OPACTRL

Definition at line 484 of file ezr32wg_dac.h.

#define DAC_OPAOFFSET_OPA2OFFSET_DEFAULT   (_DAC_OPAOFFSET_OPA2OFFSET_DEFAULT << 0)

Shifted mode DEFAULT for DAC_OPAOFFSET

Definition at line 492 of file ezr32wg_dac.h.

#define DAC_STATUS_CH0DV   (0x1UL << 0)

Channel 0 Data Valid

Definition at line 146 of file ezr32wg_dac.h.

#define DAC_STATUS_CH0DV_DEFAULT   (_DAC_STATUS_CH0DV_DEFAULT << 0)

Shifted mode DEFAULT for DAC_STATUS

Definition at line 150 of file ezr32wg_dac.h.

#define DAC_STATUS_CH1DV   (0x1UL << 1)

Channel 1 Data Valid

Definition at line 151 of file ezr32wg_dac.h.

#define DAC_STATUS_CH1DV_DEFAULT   (_DAC_STATUS_CH1DV_DEFAULT << 1)

Shifted mode DEFAULT for DAC_STATUS

Definition at line 155 of file ezr32wg_dac.h.