Detailed Description

EZR32WG_DMAREQ register and bit field definitions.

Version: 5.1.2

License

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. has no obligation to support this Software. Silicon Laboratories, Inc. is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file ezr32wg_dmareq.h.

Go to the source code of this file.

Macros
#define	DMAREQ_ADC0_SCAN ((8 << 16) + 1)

#define	DMAREQ_ADC0_SINGLE ((8 << 16) + 0)

#define	DMAREQ_AES_DATARD ((49 << 16) + 2)

#define	DMAREQ_AES_DATAWR ((49 << 16) + 0)

#define	DMAREQ_AES_KEYWR ((49 << 16) + 3)

#define	DMAREQ_AES_XORDATAWR ((49 << 16) + 1)

#define	DMAREQ_DAC0_CH0 ((10 << 16) + 0)

#define	DMAREQ_DAC0_CH1 ((10 << 16) + 1)

#define	DMAREQ_I2C0_RXDATAV ((20 << 16) + 0)

#define	DMAREQ_I2C0_TXBL ((20 << 16) + 1)

#define	DMAREQ_I2C1_RXDATAV ((21 << 16) + 0)

#define	DMAREQ_I2C1_TXBL ((21 << 16) + 1)

#define	DMAREQ_LESENSE_BUFDATAV ((50 << 16) + 0)

#define	DMAREQ_LEUART0_RXDATAV ((16 << 16) + 0)

#define	DMAREQ_LEUART0_TXBL ((16 << 16) + 1)

#define	DMAREQ_LEUART0_TXEMPTY ((16 << 16) + 2)

#define	DMAREQ_LEUART1_RXDATAV ((17 << 16) + 0)

#define	DMAREQ_LEUART1_TXBL ((17 << 16) + 1)

#define	DMAREQ_LEUART1_TXEMPTY ((17 << 16) + 2)

#define	DMAREQ_MSC_WDATA ((48 << 16) + 0)

#define	DMAREQ_TIMER0_CC0 ((24 << 16) + 1)

#define	DMAREQ_TIMER0_CC1 ((24 << 16) + 2)

#define	DMAREQ_TIMER0_CC2 ((24 << 16) + 3)

#define	DMAREQ_TIMER0_UFOF ((24 << 16) + 0)

#define	DMAREQ_TIMER1_CC0 ((25 << 16) + 1)

#define	DMAREQ_TIMER1_CC1 ((25 << 16) + 2)

#define	DMAREQ_TIMER1_CC2 ((25 << 16) + 3)

#define	DMAREQ_TIMER1_UFOF ((25 << 16) + 0)

#define	DMAREQ_TIMER2_CC0 ((26 << 16) + 1)

#define	DMAREQ_TIMER2_CC1 ((26 << 16) + 2)

#define	DMAREQ_TIMER2_CC2 ((26 << 16) + 3)

#define	DMAREQ_TIMER2_UFOF ((26 << 16) + 0)

#define	DMAREQ_TIMER3_CC0 ((27 << 16) + 1)

#define	DMAREQ_TIMER3_CC1 ((27 << 16) + 2)

#define	DMAREQ_TIMER3_CC2 ((27 << 16) + 3)

#define	DMAREQ_TIMER3_UFOF ((27 << 16) + 0)

#define	DMAREQ_UART0_RXDATAV ((44 << 16) + 0)

#define	DMAREQ_UART0_TXBL ((44 << 16) + 1)

#define	DMAREQ_UART0_TXEMPTY ((44 << 16) + 2)

#define	DMAREQ_UART1_RXDATAV ((45 << 16) + 0)

#define	DMAREQ_UART1_TXBL ((45 << 16) + 1)

#define	DMAREQ_UART1_TXEMPTY ((45 << 16) + 2)

#define	DMAREQ_USART1_RXDATAV ((13 << 16) + 0)

#define	DMAREQ_USART1_RXDATAVRIGHT ((13 << 16) + 3)

#define	DMAREQ_USART1_TXBL ((13 << 16) + 1)

#define	DMAREQ_USART1_TXBLRIGHT ((13 << 16) + 4)

#define	DMAREQ_USART1_TXEMPTY ((13 << 16) + 2)

#define	DMAREQ_USART2_RXDATAV ((14 << 16) + 0)

#define	DMAREQ_USART2_RXDATAVRIGHT ((14 << 16) + 3)

#define	DMAREQ_USART2_TXBL ((14 << 16) + 1)

#define	DMAREQ_USART2_TXBLRIGHT ((14 << 16) + 4)

#define	DMAREQ_USART2_TXEMPTY ((14 << 16) + 2)

#define	DMAREQ_USARTRF0_RXDATAV ((12 << 16) + 0)

#define	DMAREQ_USARTRF0_TXBL ((12 << 16) + 1)

#define	DMAREQ_USARTRF0_TXEMPTY ((12 << 16) + 2)

Detailed Description

License

Macros