EZR32 Wonder Gecko Software Documentation  ezr32wg-doc-5.1.2
ezr32wg_acmp.h File Reference

Detailed Description

EZR32WG_ACMP register and bit field definitions.

Version
5.1.2

License

Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

  1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
  2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
  3. This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. has no obligation to support this Software. Silicon Laboratories, Inc. is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file ezr32wg_acmp.h.

Go to the source code of this file.

Data Structures

struct  ACMP_TypeDef
 

Macros

#define _ACMP_CTRL_BIASPROG_DEFAULT   0x00000007UL
 
#define _ACMP_CTRL_BIASPROG_MASK   0xF000000UL
 
#define _ACMP_CTRL_BIASPROG_SHIFT   24
 
#define _ACMP_CTRL_EN_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_EN_MASK   0x1UL
 
#define _ACMP_CTRL_EN_SHIFT   0
 
#define _ACMP_CTRL_FULLBIAS_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_FULLBIAS_MASK   0x80000000UL
 
#define _ACMP_CTRL_FULLBIAS_SHIFT   31
 
#define _ACMP_CTRL_GPIOINV_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_GPIOINV_INV   0x00000001UL
 
#define _ACMP_CTRL_GPIOINV_MASK   0x8UL
 
#define _ACMP_CTRL_GPIOINV_NOTINV   0x00000000UL
 
#define _ACMP_CTRL_GPIOINV_SHIFT   3
 
#define _ACMP_CTRL_HALFBIAS_DEFAULT   0x00000001UL
 
#define _ACMP_CTRL_HALFBIAS_MASK   0x40000000UL
 
#define _ACMP_CTRL_HALFBIAS_SHIFT   30
 
#define _ACMP_CTRL_HYSTSEL_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_HYSTSEL_HYST0   0x00000000UL
 
#define _ACMP_CTRL_HYSTSEL_HYST1   0x00000001UL
 
#define _ACMP_CTRL_HYSTSEL_HYST2   0x00000002UL
 
#define _ACMP_CTRL_HYSTSEL_HYST3   0x00000003UL
 
#define _ACMP_CTRL_HYSTSEL_HYST4   0x00000004UL
 
#define _ACMP_CTRL_HYSTSEL_HYST5   0x00000005UL
 
#define _ACMP_CTRL_HYSTSEL_HYST6   0x00000006UL
 
#define _ACMP_CTRL_HYSTSEL_HYST7   0x00000007UL
 
#define _ACMP_CTRL_HYSTSEL_MASK   0x70UL
 
#define _ACMP_CTRL_HYSTSEL_SHIFT   4
 
#define _ACMP_CTRL_IFALL_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_IFALL_DISABLED   0x00000000UL
 
#define _ACMP_CTRL_IFALL_ENABLED   0x00000001UL
 
#define _ACMP_CTRL_IFALL_MASK   0x20000UL
 
#define _ACMP_CTRL_IFALL_SHIFT   17
 
#define _ACMP_CTRL_INACTVAL_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_INACTVAL_HIGH   0x00000001UL
 
#define _ACMP_CTRL_INACTVAL_LOW   0x00000000UL
 
#define _ACMP_CTRL_INACTVAL_MASK   0x4UL
 
#define _ACMP_CTRL_INACTVAL_SHIFT   2
 
#define _ACMP_CTRL_IRISE_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_IRISE_DISABLED   0x00000000UL
 
#define _ACMP_CTRL_IRISE_ENABLED   0x00000001UL
 
#define _ACMP_CTRL_IRISE_MASK   0x10000UL
 
#define _ACMP_CTRL_IRISE_SHIFT   16
 
#define _ACMP_CTRL_MASK   0xCF03077FUL
 
#define _ACMP_CTRL_MUXEN_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_MUXEN_MASK   0x2UL
 
#define _ACMP_CTRL_MUXEN_SHIFT   1
 
#define _ACMP_CTRL_RESETVALUE   0x47000000UL
 
#define _ACMP_CTRL_WARMTIME_128CYCLES   0x00000005UL
 
#define _ACMP_CTRL_WARMTIME_16CYCLES   0x00000002UL
 
#define _ACMP_CTRL_WARMTIME_256CYCLES   0x00000006UL
 
#define _ACMP_CTRL_WARMTIME_32CYCLES   0x00000003UL
 
#define _ACMP_CTRL_WARMTIME_4CYCLES   0x00000000UL
 
#define _ACMP_CTRL_WARMTIME_512CYCLES   0x00000007UL
 
#define _ACMP_CTRL_WARMTIME_64CYCLES   0x00000004UL
 
#define _ACMP_CTRL_WARMTIME_8CYCLES   0x00000001UL
 
#define _ACMP_CTRL_WARMTIME_DEFAULT   0x00000000UL
 
#define _ACMP_CTRL_WARMTIME_MASK   0x700UL
 
#define _ACMP_CTRL_WARMTIME_SHIFT   8
 
#define _ACMP_IEN_EDGE_DEFAULT   0x00000000UL
 
#define _ACMP_IEN_EDGE_MASK   0x1UL
 
#define _ACMP_IEN_EDGE_SHIFT   0
 
#define _ACMP_IEN_MASK   0x00000003UL
 
#define _ACMP_IEN_RESETVALUE   0x00000000UL
 
#define _ACMP_IEN_WARMUP_DEFAULT   0x00000000UL
 
#define _ACMP_IEN_WARMUP_MASK   0x2UL
 
#define _ACMP_IEN_WARMUP_SHIFT   1
 
#define _ACMP_IF_EDGE_DEFAULT   0x00000000UL
 
#define _ACMP_IF_EDGE_MASK   0x1UL
 
#define _ACMP_IF_EDGE_SHIFT   0
 
#define _ACMP_IF_MASK   0x00000003UL
 
#define _ACMP_IF_RESETVALUE   0x00000000UL
 
#define _ACMP_IF_WARMUP_DEFAULT   0x00000000UL
 
#define _ACMP_IF_WARMUP_MASK   0x2UL
 
#define _ACMP_IF_WARMUP_SHIFT   1
 
#define _ACMP_IFC_EDGE_DEFAULT   0x00000000UL
 
#define _ACMP_IFC_EDGE_MASK   0x1UL
 
#define _ACMP_IFC_EDGE_SHIFT   0
 
#define _ACMP_IFC_MASK   0x00000003UL
 
#define _ACMP_IFC_RESETVALUE   0x00000000UL
 
#define _ACMP_IFC_WARMUP_DEFAULT   0x00000000UL
 
#define _ACMP_IFC_WARMUP_MASK   0x2UL
 
#define _ACMP_IFC_WARMUP_SHIFT   1
 
#define _ACMP_IFS_EDGE_DEFAULT   0x00000000UL
 
#define _ACMP_IFS_EDGE_MASK   0x1UL
 
#define _ACMP_IFS_EDGE_SHIFT   0
 
#define _ACMP_IFS_MASK   0x00000003UL
 
#define _ACMP_IFS_RESETVALUE   0x00000000UL
 
#define _ACMP_IFS_WARMUP_DEFAULT   0x00000000UL
 
#define _ACMP_IFS_WARMUP_MASK   0x2UL
 
#define _ACMP_IFS_WARMUP_SHIFT   1
 
#define _ACMP_INPUTSEL_CSRESEN_DEFAULT   0x00000000UL
 
#define _ACMP_INPUTSEL_CSRESEN_MASK   0x1000000UL
 
#define _ACMP_INPUTSEL_CSRESEN_SHIFT   24
 
#define _ACMP_INPUTSEL_CSRESSEL_DEFAULT   0x00000000UL
 
#define _ACMP_INPUTSEL_CSRESSEL_MASK   0x30000000UL
 
#define _ACMP_INPUTSEL_CSRESSEL_RES0   0x00000000UL
 
#define _ACMP_INPUTSEL_CSRESSEL_RES1   0x00000001UL
 
#define _ACMP_INPUTSEL_CSRESSEL_RES2   0x00000002UL
 
#define _ACMP_INPUTSEL_CSRESSEL_RES3   0x00000003UL
 
#define _ACMP_INPUTSEL_CSRESSEL_SHIFT   28
 
#define _ACMP_INPUTSEL_LPREF_DEFAULT   0x00000001UL
 
#define _ACMP_INPUTSEL_LPREF_MASK   0x10000UL
 
#define _ACMP_INPUTSEL_LPREF_SHIFT   16
 
#define _ACMP_INPUTSEL_MASK   0x31013FF7UL
 
#define _ACMP_INPUTSEL_NEGSEL_1V25   0x00000008UL
 
#define _ACMP_INPUTSEL_NEGSEL_2V5   0x00000009UL
 
#define _ACMP_INPUTSEL_NEGSEL_CAPSENSE   0x0000000BUL
 
#define _ACMP_INPUTSEL_NEGSEL_CH0   0x00000000UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH1   0x00000001UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH2   0x00000002UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH3   0x00000003UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH4   0x00000004UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH5   0x00000005UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH6   0x00000006UL
 
#define _ACMP_INPUTSEL_NEGSEL_CH7   0x00000007UL
 
#define _ACMP_INPUTSEL_NEGSEL_DAC0CH0   0x0000000CUL
 
#define _ACMP_INPUTSEL_NEGSEL_DAC0CH1   0x0000000DUL
 
#define _ACMP_INPUTSEL_NEGSEL_DEFAULT   0x00000008UL
 
#define _ACMP_INPUTSEL_NEGSEL_MASK   0xF0UL
 
#define _ACMP_INPUTSEL_NEGSEL_SHIFT   4
 
#define _ACMP_INPUTSEL_NEGSEL_VDD   0x0000000AUL
 
#define _ACMP_INPUTSEL_POSSEL_CH0   0x00000000UL
 
#define _ACMP_INPUTSEL_POSSEL_CH1   0x00000001UL
 
#define _ACMP_INPUTSEL_POSSEL_CH2   0x00000002UL
 
#define _ACMP_INPUTSEL_POSSEL_CH3   0x00000003UL
 
#define _ACMP_INPUTSEL_POSSEL_CH4   0x00000004UL
 
#define _ACMP_INPUTSEL_POSSEL_CH5   0x00000005UL
 
#define _ACMP_INPUTSEL_POSSEL_CH6   0x00000006UL
 
#define _ACMP_INPUTSEL_POSSEL_CH7   0x00000007UL
 
#define _ACMP_INPUTSEL_POSSEL_DEFAULT   0x00000000UL
 
#define _ACMP_INPUTSEL_POSSEL_MASK   0x7UL
 
#define _ACMP_INPUTSEL_POSSEL_SHIFT   0
 
#define _ACMP_INPUTSEL_RESETVALUE   0x00010080UL
 
#define _ACMP_INPUTSEL_VDDLEVEL_DEFAULT   0x00000000UL
 
#define _ACMP_INPUTSEL_VDDLEVEL_MASK   0x3F00UL
 
#define _ACMP_INPUTSEL_VDDLEVEL_SHIFT   8
 
#define _ACMP_ROUTE_ACMPPEN_DEFAULT   0x00000000UL
 
#define _ACMP_ROUTE_ACMPPEN_MASK   0x1UL
 
#define _ACMP_ROUTE_ACMPPEN_SHIFT   0
 
#define _ACMP_ROUTE_LOCATION_DEFAULT   0x00000000UL
 
#define _ACMP_ROUTE_LOCATION_LOC0   0x00000000UL
 
#define _ACMP_ROUTE_LOCATION_LOC1   0x00000001UL
 
#define _ACMP_ROUTE_LOCATION_LOC2   0x00000002UL
 
#define _ACMP_ROUTE_LOCATION_MASK   0x700UL
 
#define _ACMP_ROUTE_LOCATION_SHIFT   8
 
#define _ACMP_ROUTE_MASK   0x00000701UL
 
#define _ACMP_ROUTE_RESETVALUE   0x00000000UL
 
#define _ACMP_STATUS_ACMPACT_DEFAULT   0x00000000UL
 
#define _ACMP_STATUS_ACMPACT_MASK   0x1UL
 
#define _ACMP_STATUS_ACMPACT_SHIFT   0
 
#define _ACMP_STATUS_ACMPOUT_DEFAULT   0x00000000UL
 
#define _ACMP_STATUS_ACMPOUT_MASK   0x2UL
 
#define _ACMP_STATUS_ACMPOUT_SHIFT   1
 
#define _ACMP_STATUS_MASK   0x00000003UL
 
#define _ACMP_STATUS_RESETVALUE   0x00000000UL
 
#define ACMP_CTRL_BIASPROG_DEFAULT   (_ACMP_CTRL_BIASPROG_DEFAULT << 24)
 
#define ACMP_CTRL_EN   (0x1UL << 0)
 
#define ACMP_CTRL_EN_DEFAULT   (_ACMP_CTRL_EN_DEFAULT << 0)
 
#define ACMP_CTRL_FULLBIAS   (0x1UL << 31)
 
#define ACMP_CTRL_FULLBIAS_DEFAULT   (_ACMP_CTRL_FULLBIAS_DEFAULT << 31)
 
#define ACMP_CTRL_GPIOINV   (0x1UL << 3)
 
#define ACMP_CTRL_GPIOINV_DEFAULT   (_ACMP_CTRL_GPIOINV_DEFAULT << 3)
 
#define ACMP_CTRL_GPIOINV_INV   (_ACMP_CTRL_GPIOINV_INV << 3)
 
#define ACMP_CTRL_GPIOINV_NOTINV   (_ACMP_CTRL_GPIOINV_NOTINV << 3)
 
#define ACMP_CTRL_HALFBIAS   (0x1UL << 30)
 
#define ACMP_CTRL_HALFBIAS_DEFAULT   (_ACMP_CTRL_HALFBIAS_DEFAULT << 30)
 
#define ACMP_CTRL_HYSTSEL_DEFAULT   (_ACMP_CTRL_HYSTSEL_DEFAULT << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST0   (_ACMP_CTRL_HYSTSEL_HYST0 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST1   (_ACMP_CTRL_HYSTSEL_HYST1 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST2   (_ACMP_CTRL_HYSTSEL_HYST2 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST3   (_ACMP_CTRL_HYSTSEL_HYST3 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST4   (_ACMP_CTRL_HYSTSEL_HYST4 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST5   (_ACMP_CTRL_HYSTSEL_HYST5 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST6   (_ACMP_CTRL_HYSTSEL_HYST6 << 4)
 
#define ACMP_CTRL_HYSTSEL_HYST7   (_ACMP_CTRL_HYSTSEL_HYST7 << 4)
 
#define ACMP_CTRL_IFALL   (0x1UL << 17)
 
#define ACMP_CTRL_IFALL_DEFAULT   (_ACMP_CTRL_IFALL_DEFAULT << 17)
 
#define ACMP_CTRL_IFALL_DISABLED   (_ACMP_CTRL_IFALL_DISABLED << 17)
 
#define ACMP_CTRL_IFALL_ENABLED   (_ACMP_CTRL_IFALL_ENABLED << 17)
 
#define ACMP_CTRL_INACTVAL   (0x1UL << 2)
 
#define ACMP_CTRL_INACTVAL_DEFAULT   (_ACMP_CTRL_INACTVAL_DEFAULT << 2)
 
#define ACMP_CTRL_INACTVAL_HIGH   (_ACMP_CTRL_INACTVAL_HIGH << 2)
 
#define ACMP_CTRL_INACTVAL_LOW   (_ACMP_CTRL_INACTVAL_LOW << 2)
 
#define ACMP_CTRL_IRISE   (0x1UL << 16)
 
#define ACMP_CTRL_IRISE_DEFAULT   (_ACMP_CTRL_IRISE_DEFAULT << 16)
 
#define ACMP_CTRL_IRISE_DISABLED   (_ACMP_CTRL_IRISE_DISABLED << 16)
 
#define ACMP_CTRL_IRISE_ENABLED   (_ACMP_CTRL_IRISE_ENABLED << 16)
 
#define ACMP_CTRL_MUXEN   (0x1UL << 1)
 
#define ACMP_CTRL_MUXEN_DEFAULT   (_ACMP_CTRL_MUXEN_DEFAULT << 1)
 
#define ACMP_CTRL_WARMTIME_128CYCLES   (_ACMP_CTRL_WARMTIME_128CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_16CYCLES   (_ACMP_CTRL_WARMTIME_16CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_256CYCLES   (_ACMP_CTRL_WARMTIME_256CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_32CYCLES   (_ACMP_CTRL_WARMTIME_32CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_4CYCLES   (_ACMP_CTRL_WARMTIME_4CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_512CYCLES   (_ACMP_CTRL_WARMTIME_512CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_64CYCLES   (_ACMP_CTRL_WARMTIME_64CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_8CYCLES   (_ACMP_CTRL_WARMTIME_8CYCLES << 8)
 
#define ACMP_CTRL_WARMTIME_DEFAULT   (_ACMP_CTRL_WARMTIME_DEFAULT << 8)
 
#define ACMP_IEN_EDGE   (0x1UL << 0)
 
#define ACMP_IEN_EDGE_DEFAULT   (_ACMP_IEN_EDGE_DEFAULT << 0)
 
#define ACMP_IEN_WARMUP   (0x1UL << 1)
 
#define ACMP_IEN_WARMUP_DEFAULT   (_ACMP_IEN_WARMUP_DEFAULT << 1)
 
#define ACMP_IF_EDGE   (0x1UL << 0)
 
#define ACMP_IF_EDGE_DEFAULT   (_ACMP_IF_EDGE_DEFAULT << 0)
 
#define ACMP_IF_WARMUP   (0x1UL << 1)
 
#define ACMP_IF_WARMUP_DEFAULT   (_ACMP_IF_WARMUP_DEFAULT << 1)
 
#define ACMP_IFC_EDGE   (0x1UL << 0)
 
#define ACMP_IFC_EDGE_DEFAULT   (_ACMP_IFC_EDGE_DEFAULT << 0)
 
#define ACMP_IFC_WARMUP   (0x1UL << 1)
 
#define ACMP_IFC_WARMUP_DEFAULT   (_ACMP_IFC_WARMUP_DEFAULT << 1)
 
#define ACMP_IFS_EDGE   (0x1UL << 0)
 
#define ACMP_IFS_EDGE_DEFAULT   (_ACMP_IFS_EDGE_DEFAULT << 0)
 
#define ACMP_IFS_WARMUP   (0x1UL << 1)
 
#define ACMP_IFS_WARMUP_DEFAULT   (_ACMP_IFS_WARMUP_DEFAULT << 1)
 
#define ACMP_INPUTSEL_CSRESEN   (0x1UL << 24)
 
#define ACMP_INPUTSEL_CSRESEN_DEFAULT   (_ACMP_INPUTSEL_CSRESEN_DEFAULT << 24)
 
#define ACMP_INPUTSEL_CSRESSEL_DEFAULT   (_ACMP_INPUTSEL_CSRESSEL_DEFAULT << 28)
 
#define ACMP_INPUTSEL_CSRESSEL_RES0   (_ACMP_INPUTSEL_CSRESSEL_RES0 << 28)
 
#define ACMP_INPUTSEL_CSRESSEL_RES1   (_ACMP_INPUTSEL_CSRESSEL_RES1 << 28)
 
#define ACMP_INPUTSEL_CSRESSEL_RES2   (_ACMP_INPUTSEL_CSRESSEL_RES2 << 28)
 
#define ACMP_INPUTSEL_CSRESSEL_RES3   (_ACMP_INPUTSEL_CSRESSEL_RES3 << 28)
 
#define ACMP_INPUTSEL_LPREF   (0x1UL << 16)
 
#define ACMP_INPUTSEL_LPREF_DEFAULT   (_ACMP_INPUTSEL_LPREF_DEFAULT << 16)
 
#define ACMP_INPUTSEL_NEGSEL_1V25   (_ACMP_INPUTSEL_NEGSEL_1V25 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_2V5   (_ACMP_INPUTSEL_NEGSEL_2V5 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CAPSENSE   (_ACMP_INPUTSEL_NEGSEL_CAPSENSE << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH0   (_ACMP_INPUTSEL_NEGSEL_CH0 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH1   (_ACMP_INPUTSEL_NEGSEL_CH1 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH2   (_ACMP_INPUTSEL_NEGSEL_CH2 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH3   (_ACMP_INPUTSEL_NEGSEL_CH3 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH4   (_ACMP_INPUTSEL_NEGSEL_CH4 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH5   (_ACMP_INPUTSEL_NEGSEL_CH5 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH6   (_ACMP_INPUTSEL_NEGSEL_CH6 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_CH7   (_ACMP_INPUTSEL_NEGSEL_CH7 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_DAC0CH0   (_ACMP_INPUTSEL_NEGSEL_DAC0CH0 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_DAC0CH1   (_ACMP_INPUTSEL_NEGSEL_DAC0CH1 << 4)
 
#define ACMP_INPUTSEL_NEGSEL_DEFAULT   (_ACMP_INPUTSEL_NEGSEL_DEFAULT << 4)
 
#define ACMP_INPUTSEL_NEGSEL_VDD   (_ACMP_INPUTSEL_NEGSEL_VDD << 4)
 
#define ACMP_INPUTSEL_POSSEL_CH0   (_ACMP_INPUTSEL_POSSEL_CH0 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH1   (_ACMP_INPUTSEL_POSSEL_CH1 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH2   (_ACMP_INPUTSEL_POSSEL_CH2 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH3   (_ACMP_INPUTSEL_POSSEL_CH3 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH4   (_ACMP_INPUTSEL_POSSEL_CH4 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH5   (_ACMP_INPUTSEL_POSSEL_CH5 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH6   (_ACMP_INPUTSEL_POSSEL_CH6 << 0)
 
#define ACMP_INPUTSEL_POSSEL_CH7   (_ACMP_INPUTSEL_POSSEL_CH7 << 0)
 
#define ACMP_INPUTSEL_POSSEL_DEFAULT   (_ACMP_INPUTSEL_POSSEL_DEFAULT << 0)
 
#define ACMP_INPUTSEL_VDDLEVEL_DEFAULT   (_ACMP_INPUTSEL_VDDLEVEL_DEFAULT << 8)
 
#define ACMP_ROUTE_ACMPPEN   (0x1UL << 0)
 
#define ACMP_ROUTE_ACMPPEN_DEFAULT   (_ACMP_ROUTE_ACMPPEN_DEFAULT << 0)
 
#define ACMP_ROUTE_LOCATION_DEFAULT   (_ACMP_ROUTE_LOCATION_DEFAULT << 8)
 
#define ACMP_ROUTE_LOCATION_LOC0   (_ACMP_ROUTE_LOCATION_LOC0 << 8)
 
#define ACMP_ROUTE_LOCATION_LOC1   (_ACMP_ROUTE_LOCATION_LOC1 << 8)
 
#define ACMP_ROUTE_LOCATION_LOC2   (_ACMP_ROUTE_LOCATION_LOC2 << 8)
 
#define ACMP_STATUS_ACMPACT   (0x1UL << 0)
 
#define ACMP_STATUS_ACMPACT_DEFAULT   (_ACMP_STATUS_ACMPACT_DEFAULT << 0)
 
#define ACMP_STATUS_ACMPOUT   (0x1UL << 1)
 
#define ACMP_STATUS_ACMPOUT_DEFAULT   (_ACMP_STATUS_ACMPOUT_DEFAULT << 1)