EZR32 Wonder Gecko Software Documentation  ezr32wg-doc-5.1.2
em_usbhal.h
Go to the documentation of this file.
1 /***************************************************************************/
16 #ifndef __EM_USBHAL_H
17 #define __EM_USBHAL_H
18 
19 #include "em_device.h"
20 #if defined( USB_PRESENT ) && ( USB_COUNT == 1 )
21 #include "em_usb.h"
22 #if defined( USB_DEVICE ) || defined( USB_HOST )
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
30 #define USB_PID_DATA0 0
31 #define USB_PID_DATA2 1
32 #define USB_PID_DATA1 2
33 #define USB_PID_SETUP 3
34 
35 #define HPRT_F_SPEED ( 1 << _USB_HPRT_PRTSPD_SHIFT )
36 #define HPRT_L_SPEED ( 2 << _USB_HPRT_PRTSPD_SHIFT )
37 #define HCFG_PHYCLK_48MHZ 1
38 #define HCFG_PHYCLK_6MHZ 2
39 
40 #define DOEP0_XFERSIZE_PKTCNT_MASK ( _USB_DOEP0TSIZ_XFERSIZE_MASK | \
41  _USB_DOEP0TSIZ_PKTCNT_MASK )
42 #define DOEP_XFERSIZE_PKTCNT_MASK ( _USB_DOEP_TSIZ_XFERSIZE_MASK | \
43  _USB_DOEP_TSIZ_PKTCNT_MASK )
44 
45 #define DIEP0_XFERSIZE_PKTCNT_MASK ( _USB_DIEP0TSIZ_XFERSIZE_MASK | \
46  _USB_DIEP0TSIZ_PKTCNT_MASK )
47 #define DIEP_XFERSIZE_PKTCNT_MASK ( _USB_DIEP_TSIZ_XFERSIZE_MASK | \
48  _USB_DIEP_TSIZ_PKTCNT_MASK | \
49  _USB_DIEP_TSIZ_MC_MASK )
50 
51 #define DIEPCTL_EPTYPE_CONTROL (0 << _USB_DIEP_CTL_EPTYPE_SHIFT )
52 #define DIEPCTL_EPTYPE_ISOC (1 << _USB_DIEP_CTL_EPTYPE_SHIFT )
53 #define DIEPCTL_EPTYPE_BULK (2 << _USB_DIEP_CTL_EPTYPE_SHIFT )
54 #define DIEPCTL_EPTYPE_INTR (3 << _USB_DIEP_CTL_EPTYPE_SHIFT )
55 
56 #define DOEPCTL_EPTYPE_CONTROL (0 << _USB_DOEP_CTL_EPTYPE_SHIFT )
57 #define DOEPCTL_EPTYPE_ISOC (1 << _USB_DOEP_CTL_EPTYPE_SHIFT )
58 #define DOEPCTL_EPTYPE_BULK (2 << _USB_DOEP_CTL_EPTYPE_SHIFT )
59 #define DOEPCTL_EPTYPE_INTR (3 << _USB_DOEP_CTL_EPTYPE_SHIFT )
60 
61 #define HCCHAR_EPTYPE_CTRL (0 << _USB_HC_CHAR_EPTYPE_SHIFT )
62 #define HCCHAR_EPTYPE_ISOC (1 << _USB_HC_CHAR_EPTYPE_SHIFT )
63 #define HCCHAR_EPTYPE_BULK (2 << _USB_HC_CHAR_EPTYPE_SHIFT )
64 #define HCCHAR_EPTYPE_INTR (3 << _USB_HC_CHAR_EPTYPE_SHIFT )
65 
66 #define GRXSTSP_PKTSTS_DEVICE_GOTNAK ( 1 << _USB_GRXSTSP_PKTSTS_SHIFT )
67 #define GRXSTSP_PKTSTS_DEVICE_DATAOUTRECEIVED ( 2 << _USB_GRXSTSP_PKTSTS_SHIFT )
68 #define GRXSTSP_PKTSTS_DEVICE_DATAOUTCOMPLETE ( 3 << _USB_GRXSTSP_PKTSTS_SHIFT )
69 #define GRXSTSP_PKTSTS_DEVICE_SETUPCOMPLETE ( 4 << _USB_GRXSTSP_PKTSTS_SHIFT )
70 #define GRXSTSP_PKTSTS_DEVICE_SETUPRECEIVED ( 6 << _USB_GRXSTSP_PKTSTS_SHIFT )
71 
72 #define GRXSTSP_PKTSTS_HOST_DATAINRECEIVED ( 2 << _USB_GRXSTSP_PKTSTS_SHIFT )
73 #define GRXSTSP_PKTSTS_HOST_DATAINCOMPLETE ( 3 << _USB_GRXSTSP_PKTSTS_SHIFT )
74 #define GRXSTSP_PKTSTS_HOST_DATATOGGLEERROR ( 5 << _USB_GRXSTSP_PKTSTS_SHIFT )
75 #define GRXSTSP_PKTSTS_HOST_CHANNELHALTED ( 7 << _USB_GRXSTSP_PKTSTS_SHIFT )
76 
77 #define DCTL_WO_BITMASK \
78  ( _USB_DCTL_CGOUTNAK_MASK | _USB_DCTL_SGOUTNAK_MASK | \
79  _USB_DCTL_CGNPINNAK_MASK | _USB_DCTL_SGNPINNAK_MASK )
80 #define GUSBCFG_WO_BITMASK ( USB_GUSBCFG_CORRUPTTXPKT )
81 #define DEPCTL_WO_BITMASK \
82  ( USB_DIEP_CTL_CNAK | USB_DIEP_CTL_SNAK | \
83  USB_DIEP_CTL_SETD0PIDEF | USB_DIEP_CTL_SETD1PIDOF )
84 
85 #define HPRT_WC_MASK ( USB_HPRT_PRTCONNDET | USB_HPRT_PRTENA | \
86  USB_HPRT_PRTENCHNG | USB_HPRT_PRTOVRCURRCHNG )
87 
88 typedef __IO uint32_t USB_FIFO_TypeDef[ 0x1000 / sizeof( uint32_t ) ];
89 typedef __IO uint32_t USB_DIEPTXF_TypeDef;
90 
91 #define USB_DINEPS ((USB_DIEP_TypeDef *) &USB->DIEP0CTL )
92 #define USB_DOUTEPS ((USB_DOEP_TypeDef *) &USB->DOEP0CTL )
93 #define USB_FIFOS ((USB_FIFO_TypeDef *) &USB->FIFO0D )
94 #define USB_DIEPTXFS ((USB_DIEPTXF_TypeDef *) &USB->DIEPTXF1 )
95 
96 void USBHAL_CoreReset( void );
97 
98 #if defined( USB_DEVICE )
99 void USBDHAL_AbortAllTransfers( USB_Status_TypeDef reason );
100 USB_Status_TypeDef USBDHAL_CoreInit( const uint32_t totalRxFifoSize,
101  const uint32_t totalTxFifoSize );
102 void USBDHAL_Connect( void );
103 void USBDHAL_Disconnect( void );
104 void USBDHAL_AbortAllEps( void );
105 void USBDHAL_AbortEpIn( USBD_Ep_TypeDef *ep );
106 void USBDHAL_AbortEpOut( USBD_Ep_TypeDef *ep );
107 
108 __STATIC_INLINE USB_Status_TypeDef USBDHAL_GetStallStatusEp(
109  USBD_Ep_TypeDef *ep, uint16_t *halt );
110 __STATIC_INLINE uint32_t USBDHAL_GetInEpInts( USBD_Ep_TypeDef *ep );
111 __STATIC_INLINE uint32_t USBDHAL_GetOutEpInts( USBD_Ep_TypeDef *ep );
112 __STATIC_INLINE void USBDHAL_SetEPDISNAK( USBD_Ep_TypeDef *ep );
113 #endif /* defined( USB_DEVICE ) */
114 
115 #if defined( USB_HOST )
116 USB_Status_TypeDef USBHHAL_CoreInit( const uint32_t rxFifoSize,
117  const uint32_t nptxFifoSize,
118  const uint32_t ptxFifoSize );
119 void USBHHAL_HCHalt( int hcnum, uint32_t hcchar );
120 void USBHHAL_HCInit( int hcnum );
121 void USBHHAL_HCStart( int hcnum );
122 #endif /* defined( USB_HOST ) */
123 
124 __STATIC_INLINE void USBHAL_DisableGlobalInt( void )
125 {
126  USB->GAHBCFG &= ~USB_GAHBCFG_GLBLINTRMSK;
127 }
128 
129 __STATIC_INLINE void USBHAL_DisablePhyPins( void )
130 {
131  USB->ROUTE = _USB_ROUTE_RESETVALUE;
132 }
133 
134 __STATIC_INLINE void USBHAL_DisableUsbInt( void )
135 {
136  USB->IEN = _USB_IEN_RESETVALUE;
137 }
138 
139 __STATIC_INLINE void USBHAL_EnableGlobalInt( void )
140 {
141  USB->GAHBCFG |= USB_GAHBCFG_GLBLINTRMSK;
142 }
143 
144 __STATIC_INLINE void USBHAL_FlushRxFifo( void )
145 {
146  USB->GRSTCTL = USB_GRSTCTL_RXFFLSH;
147  while ( USB->GRSTCTL & USB_GRSTCTL_RXFFLSH ) {}
148 }
149 
150 __STATIC_INLINE void USBHAL_FlushTxFifo( uint8_t fifoNum )
151 {
152  USB->GRSTCTL = USB_GRSTCTL_TXFFLSH | ( fifoNum << _USB_GRSTCTL_TXFNUM_SHIFT );
153  while ( USB->GRSTCTL & USB_GRSTCTL_TXFFLSH ) {}
154 }
155 
156 __STATIC_INLINE uint32_t USBHAL_GetCoreInts( void )
157 {
158  uint32_t retVal;
159 
160  retVal = USB->GINTSTS;
161  retVal &= USB->GINTMSK;
162 
163  return retVal;
164 }
165 
166 __STATIC_INLINE bool USBHAL_VbusIsOn( void )
167 {
168  return ( USB->STATUS & USB_STATUS_VREGOS ) != 0;
169 }
170 
171 #if defined( USB_DEVICE )
172 __STATIC_INLINE void USBDHAL_ActivateEp( USBD_Ep_TypeDef *ep, bool forceIdle )
173 {
174 #define DIEP_MPS_EPTYPE_TXFNUM_MASK ( _USB_DIEP_CTL_MPS_MASK | \
175  _USB_DIEP_CTL_EPTYPE_MASK | \
176  _USB_DIEP_CTL_TXFNUM_MASK )
177 #define DOEP_MPS_EPTYPE_MASK ( _USB_DOEP_CTL_MPS_MASK | \
178  _USB_DOEP_CTL_EPTYPE_MASK )
179  uint32_t daintmask, depctl;
180 
181  if ( forceIdle )
182  ep->state = D_EP_IDLE;
183 
184  if ( ep->in )
185  {
186  daintmask = ep->mask;
187  depctl = USB_DINEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK;
188 
189  if ( !( depctl & USB_DIEP_CTL_USBACTEP ) )
190  {
191  depctl = ( depctl &
192  ~( DIEP_MPS_EPTYPE_TXFNUM_MASK |
193  USB_DIEP_CTL_STALL ) ) |
194  ( ep->packetSize << _USB_DIEP_CTL_MPS_SHIFT ) |
195  ( ep->type << _USB_DIEP_CTL_EPTYPE_SHIFT ) |
196  ( ep->txFifoNum << _USB_DIEP_CTL_TXFNUM_SHIFT ) |
198  USB_DIEP_CTL_USBACTEP |
200  }
201  else
202  {
203  depctl |= USB_DIEP_CTL_SETD0PIDEF;
204  }
205  USB_DINEPS[ ep->num ].CTL = depctl;
206  }
207  else
208  {
209  daintmask = ep->mask << _USB_DAINTMSK_OUTEPMSK0_SHIFT;
210  depctl = USB_DOUTEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK;
211 
212  if ( !( depctl & USB_DOEP_CTL_USBACTEP ) )
213  {
214  depctl = ( depctl &
215  ~( DOEP_MPS_EPTYPE_MASK |
216  USB_DOEP_CTL_STALL ) ) |
217  ( ep->packetSize << _USB_DOEP_CTL_MPS_SHIFT ) |
218  ( ep->type << _USB_DOEP_CTL_EPTYPE_SHIFT ) |
220  USB_DOEP_CTL_USBACTEP |
222  }
223  else
224  {
225  depctl |= USB_DOEP_CTL_SETD0PIDEF;
226  }
227  USB_DOUTEPS[ ep->num ].CTL = depctl;
228  }
229 
230  /* Enable interrupt for this EP */
231  USB->DAINTMSK |= daintmask;
232 
233 #undef DIEP_MPS_EPTYPE_TXFNUM_MASK
234 #undef DOEP_MPS_EPTYPE_MASK
235 }
236 
237 __STATIC_INLINE void USBDHAL_ClearRemoteWakeup( void )
238 {
239  USB->DCTL &= ~( DCTL_WO_BITMASK | USB_DCTL_RMTWKUPSIG );
240 }
241 
242 __STATIC_INLINE void USBDHAL_DeactivateEp( USBD_Ep_TypeDef *ep )
243 {
244  uint32_t daintmask;
245 
246  if ( ep->in )
247  {
248  USB_DINEPS[ ep->num ].CTL = 0;
249  daintmask = ep->mask;
250  }
251  else
252  {
253  USB_DOUTEPS[ ep->num ].CTL = 0;
254  daintmask = ep->mask << _USB_DAINTMSK_OUTEPMSK0_SHIFT;
255  }
256 
257  /* Disable interrupt for this EP */
258  USB->DAINTMSK &= ~daintmask;
259 }
260 
261 __STATIC_INLINE void USBDHAL_EnableInts( USBD_Device_TypeDef *dev )
262 {
263  uint32_t mask;
264 
265  /* Disable all interrupts. */
266  USB->GINTMSK = 0;
267 
268  /* Clear pending interrupts */
269  USB->GINTSTS = 0xFFFFFFFF;
270 
271  mask = USB_GINTMSK_USBSUSPMSK |
277 
278  if ( dev->callbacks->sofInt )
279  {
280  mask |= USB_GINTMSK_SOFMSK;
281  }
282 
283  USB->GINTMSK = mask;
284 }
285 
286 __STATIC_INLINE void USBDHAL_EnableUsbResetAndSuspendInt( void )
287 {
288  /* Disable all interrupts. */
289  USB->GINTMSK = 0;
290 
292 }
293 
294 __STATIC_INLINE void USBDHAL_Ep0Activate( uint32_t ep0mps )
295 {
296  USB->DCTL = ( USB->DCTL & ~DCTL_WO_BITMASK ) | USB_DCTL_CGNPINNAK;
297 
298  USB->DOEP0CTL = ( USB->DOEP0CTL & ~DEPCTL_WO_BITMASK )
300  | ep0mps;
301 }
302 
303 __STATIC_INLINE bool USBDHAL_EpIsStalled( USBD_Ep_TypeDef *ep )
304 {
305  bool retVal = false;
306  uint16_t stallStatus;
307 
308  if ( USBDHAL_GetStallStatusEp( ep, &stallStatus ) == USB_STATUS_OK )
309  {
310  retVal = stallStatus & 1 ? true : false;
311  }
312  return retVal;
313 }
314 
315 __STATIC_INLINE uint32_t USBDHAL_GetAllInEpInts( void )
316 {
317  uint32_t retVal;
318 
319  retVal = USB->DAINT;
320  retVal &= USB->DAINTMSK;
321  return retVal & 0xFFFF;
322 }
323 
324 __STATIC_INLINE uint32_t USBDHAL_GetAllOutEpInts( void )
325 {
326  uint32_t retVal;
327 
328  retVal = USB->DAINT;
329  retVal &= USB->DAINTMSK;
330  return retVal >> 16;
331 }
332 
333 __STATIC_INLINE uint32_t USBDHAL_GetInEpInts( USBD_Ep_TypeDef *ep )
334 {
335  uint32_t retVal, msk;
336 
337  msk = USB->DIEPMSK;
338  retVal = USB_DINEPS[ ep->num ].INT;
339 
340  return retVal & msk;
341 }
342 
343 __STATIC_INLINE uint32_t USBDHAL_GetOutEpInts( USBD_Ep_TypeDef *ep )
344 {
345  uint32_t retVal;
346 
347  retVal = USB_DOUTEPS[ ep->num ].INT;
348 #if defined( USB_DOEP0INT_STUPPKTRCVD )
349  retVal &= USB->DOEPMSK | USB_DOEP0INT_STUPPKTRCVD;
350 #else
351  retVal &= USB->DOEPMSK;
352 #endif
353 
354  return retVal;
355 }
356 
357 __STATIC_INLINE USB_Status_TypeDef USBDHAL_GetStallStatusEp(
358  USBD_Ep_TypeDef *ep, uint16_t *halt )
359 {
360  uint32_t depctl, eptype;
362 
363  if ( ep->in == true )
364  {
365  depctl = USB_DINEPS[ ep->num ].CTL;
366  eptype = depctl & _USB_DIEP_CTL_EPTYPE_MASK;
367 
368  if (( eptype == DIEPCTL_EPTYPE_INTR ) || ( eptype == DIEPCTL_EPTYPE_BULK ))
369  {
370  *halt = depctl & USB_DIEP_CTL_STALL ? 1 : 0;
371  retVal = USB_STATUS_OK;
372  }
373  }
374  else
375  {
376  depctl = USB_DOUTEPS[ ep->num ].CTL;
377  eptype = depctl & _USB_DOEP_CTL_EPTYPE_MASK;
378 
379  if (( eptype == DOEPCTL_EPTYPE_INTR ) || ( eptype == DOEPCTL_EPTYPE_BULK ))
380  {
381  *halt = depctl & USB_DOEP_CTL_STALL ? 1 : 0;
382  retVal = USB_STATUS_OK;
383  }
384  }
385 
386  return retVal;
387 }
388 
389 __STATIC_INLINE void USBDHAL_ReenableEp0Setup( USBD_Device_TypeDef *dev )
390 
391 {
392  USB->DOEP0DMAADDR = (uint32_t)dev->setupPkt;
393  USB->DOEP0CTL = ( USB->DOEP0CTL & ~DEPCTL_WO_BITMASK )
395  | dev->ep0MpsCode;
396 }
397 
398 __STATIC_INLINE void USBDHAL_SetAddr( uint8_t addr )
399 {
400  USB->DCFG = ( USB->DCFG &
402  (addr << _USB_DCFG_DEVADDR_SHIFT );
403 }
404 
405 __STATIC_INLINE void USBDHAL_SetEp0InDmaPtr( uint8_t* addr )
406 {
407  USB->DIEP0DMAADDR = (uint32_t)addr;
408 }
409 
410 __STATIC_INLINE void USBDHAL_SetEp0OutDmaPtr( uint8_t* addr )
411 {
412  USB->DOEP0DMAADDR = (uint32_t)addr;
413 }
414 
415 __STATIC_INLINE void USBDHAL_SetEPDISNAK( USBD_Ep_TypeDef *ep )
416 {
417  if ( ep->in )
418  {
419  USB_DINEPS[ ep->num ].CTL = ( USB_DINEPS[ ep->num ].CTL &
420  ~DEPCTL_WO_BITMASK ) |
423  }
424  else
425  {
426  USB_DOUTEPS[ ep->num ].CTL = ( USB_DOUTEPS[ ep->num ].CTL &
427  ~DEPCTL_WO_BITMASK ) |
429 
430  USB_DOUTEPS[ ep->num ].CTL = ( USB_DOUTEPS[ ep->num ].CTL &
431  ~DEPCTL_WO_BITMASK ) |
434  }
435 }
436 
437 __STATIC_INLINE void USBDHAL_SetRemoteWakeup( void )
438 {
439  USB->DCTL = ( USB->DCTL & ~DCTL_WO_BITMASK ) | USB_DCTL_RMTWKUPSIG;
440 }
441 
442 __STATIC_INLINE USB_Status_TypeDef USBDHAL_StallEp( USBD_Ep_TypeDef *ep )
443 {
444  uint32_t depctl, eptype;
446 
447  if ( ep->in == true )
448  {
449  depctl = USB_DINEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK;
450  eptype = depctl & _USB_DIEP_CTL_EPTYPE_MASK;
451 
452  if ( eptype != DIEPCTL_EPTYPE_ISOC )
453  {
454  if ( depctl & USB_DIEP_CTL_EPENA )
455  {
456  depctl |= USB_DIEP_CTL_EPDIS;
457  }
458  USB_DINEPS[ ep->num ].CTL = depctl | USB_DIEP_CTL_STALL;
459  retVal = USB_STATUS_OK;
460  }
461  }
462  else
463  {
464  depctl = USB_DOUTEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK;
465  eptype = depctl & _USB_DOEP_CTL_EPTYPE_MASK;
466 
467  if ( eptype != DIEPCTL_EPTYPE_ISOC )
468  {
469  USB_DOUTEPS[ ep->num ].CTL = depctl | USB_DOEP_CTL_STALL;
470  retVal = USB_STATUS_OK;
471  }
472  }
473 
474  return retVal;
475 }
476 
477 __STATIC_INLINE void USBDHAL_StartEp0In( uint32_t len, uint32_t ep0mps )
478 {
479  USB->DIEP0TSIZ = ( len << _USB_DIEP0TSIZ_XFERSIZE_SHIFT ) |
481 
482  USB->DIEP0CTL = ( USB->DIEP0CTL & ~DEPCTL_WO_BITMASK )
484  | ep0mps;
485 }
486 
487 __STATIC_INLINE void USBDHAL_StartEp0Out( uint32_t len, uint32_t ep0mps )
488 {
489  USB->DOEP0TSIZ = ( len << _USB_DOEP0TSIZ_XFERSIZE_SHIFT ) |
491 
492  USB->DOEP0CTL = ( USB->DOEP0CTL & ~DEPCTL_WO_BITMASK )
494  | ep0mps;
495 }
496 
497 __STATIC_INLINE void USBDHAL_StartEp0Setup( USBD_Device_TypeDef *dev )
498 {
499  dev->ep[ 0 ].in = false;
500 
501 #if defined( USB_DOEP0INT_STUPPKTRCVD )
502  USB->DOEP0TSIZ = ( 8*3 << _USB_DOEP0TSIZ_XFERSIZE_SHIFT ) |
503  ( 1 << _USB_DOEP0TSIZ_PKTCNT_SHIFT ) |
505 #else
506  USB->DOEP0TSIZ = 3 << _USB_DOEP0TSIZ_SUPCNT_SHIFT;
507 #endif
508 
509  dev->setup = dev->setupPkt;
510  USB->DOEP0DMAADDR = (uint32_t)dev->setup;
511 
512 #if defined( USB_DOEP0INT_STUPPKTRCVD )
513  USB->DOEP0CTL = ( USB->DOEP0CTL & ~DEPCTL_WO_BITMASK )
515  | dev->ep0MpsCode;
516 #else
517  USB->DOEP0CTL = ( USB->DOEP0CTL & ~DEPCTL_WO_BITMASK )
519  | dev->ep0MpsCode;
520 #endif
521 }
522 
523 __STATIC_INLINE void USBDHAL_StartEpIn( USBD_Ep_TypeDef *ep )
524 {
525  uint32_t pktcnt, xfersize;
526 
527  if ( ep->remaining == 0 ) /* ZLP ? */
528  {
529  pktcnt = 1;
530  xfersize = 0;
531  }
532  else
533  {
534  pktcnt = ( ep->remaining - 1 + ep->packetSize ) / ep->packetSize;
535  xfersize = ep->remaining;
536  }
537 
538  USB_DINEPS[ ep->num ].TSIZ =
539  ( USB_DINEPS[ ep->num ].TSIZ &
540  ~DIEP_XFERSIZE_PKTCNT_MASK ) |
541  ( xfersize << _USB_DIEP_TSIZ_XFERSIZE_SHIFT ) |
542  ( pktcnt << _USB_DIEP_TSIZ_PKTCNT_SHIFT );
543 
544  USB_DINEPS[ ep->num ].DMAADDR = (uint32_t)ep->buf;
545  USB_DINEPS[ ep->num ].CTL =
546  ( USB_DINEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK ) |
549 }
550 
551 __STATIC_INLINE void USBDHAL_StartEpOut( USBD_Ep_TypeDef *ep )
552 {
553  uint32_t pktcnt, xfersize;
554 
555  if ( ep->remaining == 0 ) /* ZLP ? */
556  {
557  pktcnt = 1;
558  xfersize = ep->packetSize;
559  }
560  else
561  {
562  pktcnt = ( ep->remaining - 1 + ep->packetSize ) / ep->packetSize;
563  xfersize = pktcnt * ep->packetSize;
564  }
565 
566  USB_DOUTEPS[ ep->num ].TSIZ =
567  ( USB_DOUTEPS[ ep->num ].TSIZ &
568  ~DOEP_XFERSIZE_PKTCNT_MASK ) |
569  ( xfersize << _USB_DOEP_TSIZ_XFERSIZE_SHIFT ) |
570  ( pktcnt << _USB_DOEP_TSIZ_PKTCNT_SHIFT );
571 
572  ep->hwXferSize = xfersize;
573  USB_DOUTEPS[ ep->num ].DMAADDR = (uint32_t)ep->buf;
574  USB_DOUTEPS[ ep->num ].CTL =
575  ( USB_DOUTEPS[ ep->num ].CTL &
576  ~DEPCTL_WO_BITMASK ) |
579 }
580 
581 __STATIC_INLINE USB_Status_TypeDef USBDHAL_UnStallEp( USBD_Ep_TypeDef *ep )
582 {
583  uint32_t depctl, eptype;
585 
586  if ( ep->in == true )
587  {
588  depctl = USB_DINEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK;
589  eptype = depctl & _USB_DIEP_CTL_EPTYPE_MASK;
590 
591  if (( eptype == DIEPCTL_EPTYPE_INTR ) || ( eptype == DIEPCTL_EPTYPE_BULK ))
592  {
593  depctl |= USB_DIEP_CTL_SETD0PIDEF;
594  depctl &= ~USB_DIEP_CTL_STALL;
595  USB_DINEPS[ ep->num ].CTL = depctl;
596  retVal = USB_STATUS_OK;
597  }
598  }
599  else
600  {
601  depctl = USB_DOUTEPS[ ep->num ].CTL & ~DEPCTL_WO_BITMASK;
602  eptype = depctl & _USB_DOEP_CTL_EPTYPE_MASK;
603 
604  if (( eptype == DIEPCTL_EPTYPE_INTR ) || ( eptype == DIEPCTL_EPTYPE_BULK ))
605  {
606  depctl |= USB_DOEP_CTL_SETD0PIDEF;
607  depctl &= ~USB_DOEP_CTL_STALL;
608  USB_DOUTEPS[ ep->num ].CTL = depctl;
609  retVal = USB_STATUS_OK;
610  }
611  }
612 
613  return retVal;
614 }
615 #endif /* defined( USB_DEVICE ) */
616 
617 #if defined( USB_HOST )
618 __STATIC_INLINE void USBHHAL_HCActivate( int hcnum, uint32_t hcchar, bool intep )
619 {
620  uint32_t oddframe;
621 
622  if ( intep )
623  {
624  oddframe = USB->HFNUM & 1;
625 
626  USB->HC[ hcnum ].CHAR =
627  ( hcchar &
629 
630  /* Schedule INT transfers to start in next frame. */
631  ( oddframe & 1 ? 0 : USB_HC_CHAR_ODDFRM ) |
632 
634  }
635  else
636  {
637  USB->HC[ hcnum ].CHAR = ( hcchar & ~USB_HC_CHAR_CHDIS ) |
639  }
640 }
641 
642 __STATIC_INLINE bool USBHHAL_InitializedAndPowered( void )
643 {
644  if ( ( USB->ROUTE & USB_ROUTE_PHYPEN ) &&
645  ( USB->HPRT & USB_HPRT_PRTPWR ) )
646  return true;
647  return false;
648 }
649 
650 __STATIC_INLINE void USBHHAL_EnableInts( void )
651 {
652  /* Disable all interrupts. */
653  USB->GINTMSK = 0;
654 
655  /* Clear pending OTG interrupts */
656  USB->GOTGINT = 0xFFFFFFFF;
657 
658  /* Clear pending interrupts */
659  USB->GINTSTS = 0xFFFFFFFF;
660 
661  USB->GINTMSK = USB_GINTMSK_PRTINTMSK |
664 }
665 
666 __STATIC_INLINE uint16_t USBHHAL_GetFrameNum( void )
667 {
668  return USB->HFNUM;
669 }
670 
671 __STATIC_INLINE uint32_t USBHHAL_GetHcChar( uint8_t hcnum )
672 {
673  return USB->HC[ hcnum ].CHAR;
674 }
675 
676 __STATIC_INLINE uint32_t USBHHAL_GetHcInts( uint8_t hcnum )
677 {
678  uint32_t retVal;
679 
680  retVal = USB->HC[ hcnum ].INT;
681  return retVal;
682 }
683 
684 __STATIC_INLINE uint32_t USBHHAL_GetHostChannelInts( void )
685 {
686  return USB->HAINT;
687 }
688 
689 __STATIC_INLINE uint8_t USBHHAL_GetPortSpeed( void )
690 {
691  return ( USB->HPRT & _USB_HPRT_PRTSPD_MASK ) >> _USB_HPRT_PRTSPD_SHIFT;
692 }
693 
694 __STATIC_INLINE void USBHHAL_PortReset( bool on )
695 {
696  if ( on )
697  {
698  DEBUG_USB_INT_LO_PUTCHAR( '+' );
699  USB->HPRT = ( USB->HPRT & ~HPRT_WC_MASK ) | USB_HPRT_PRTRST;
700  }
701  else
702  {
703  DEBUG_USB_INT_LO_PUTCHAR( '-' );
704  USB->HPRT &= ~( HPRT_WC_MASK | USB_HPRT_PRTRST );
705  }
706 }
707 
708 __STATIC_INLINE void USBHHAL_PortResume( bool on )
709 {
710  if ( on )
711  {
712  USB->HPRT = ( USB->HPRT & ~( HPRT_WC_MASK | USB_HPRT_PRTSUSP ) ) |
714  }
715  else
716  {
717  USB->HPRT &= ~( HPRT_WC_MASK | USB_HPRT_PRTSUSP | USB_HPRT_PRTRES );
718  }
719 }
720 
721 __STATIC_INLINE void USBHHAL_PortSuspend( void )
722 {
723  USB->HPRT = ( USB->HPRT & ~HPRT_WC_MASK ) | USB_HPRT_PRTSUSP;
724 }
725 
726 __STATIC_INLINE void USBHHAL_VbusOn( bool on )
727 {
728  if ( on )
729  {
730  USB->HPRT = ( USB->HPRT & ~HPRT_WC_MASK ) | USB_HPRT_PRTPWR;
731  DEBUG_USB_INT_LO_PUTCHAR( '/' );
732  }
733  else
734  {
735  USB->HPRT &= ~( HPRT_WC_MASK | USB_HPRT_PRTPWR );
736  DEBUG_USB_INT_LO_PUTCHAR( '\\' );
737  }
738 }
739 #endif /* defined( USB_HOST ) */
740 
743 #ifdef __cplusplus
744 }
745 #endif
746 
747 #endif /* defined( USB_DEVICE ) || defined( USB_HOST ) */
748 #endif /* defined( USB_PRESENT ) && ( USB_COUNT == 1 ) */
749 #endif /* __EM_USBHAL_H */
#define _USB_DOEP_CTL_EPTYPE_MASK
Definition: ezr32wg_usb.h:2368
#define USB_DOEP_CTL_EPDIS
Definition: ezr32wg_usb.h:2409
#define USB_DIEP_CTL_EPDIS
Definition: ezr32wg_usb.h:2110
#define USB_HPRT_PRTRES
Definition: ezr32wg_usb.h:1238
#define USB_GINTMSK_WKUPINTMSK
Definition: ezr32wg_usb.h:879
#define __IO
#define USB_GINTMSK_OEPINTMSK
Definition: ezr32wg_usb.h:824
#define USB_DIEP_CTL_EPENA
Definition: ezr32wg_usb.h:2115
#define _USB_ROUTE_RESETVALUE
Definition: ezr32wg_usb.h:289
#define _USB_DIEP0TSIZ_XFERSIZE_SHIFT
Definition: ezr32wg_usb.h:2018
#define USB_GINTMSK_USBSUSPMSK
Definition: ezr32wg_usb.h:794
#define USB_GINTMSK_DISCONNINTMSK
Definition: ezr32wg_usb.h:869
#define USB_DIEP_CTL_CNAK
Definition: ezr32wg_usb.h:2090
#define USB_HPRT_PRTSUSP
Definition: ezr32wg_usb.h:1243
#define USB
#define _USB_DIEP0TSIZ_PKTCNT_SHIFT
Definition: ezr32wg_usb.h:2022
#define USB_DOEP_CTL_STALL
Definition: ezr32wg_usb.h:2384
#define _USB_DIEP_CTL_TXFNUM_SHIFT
Definition: ezr32wg_usb.h:2086
#define USB_DOEP0CTL_EPENA
Definition: ezr32wg_usb.h:2261
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
#define _USB_DIEP_CTL_MPS_SHIFT
Definition: ezr32wg_usb.h:2046
#define _USB_DIEP_TSIZ_XFERSIZE_SHIFT
Definition: ezr32wg_usb.h:2178
#define USB_DOEP_CTL_SNAK
Definition: ezr32wg_usb.h:2394
#define USB_DOEP0CTL_CNAK
Definition: ezr32wg_usb.h:2246
#define _USB_DOEP0TSIZ_SUPCNT_SHIFT
Definition: ezr32wg_usb.h:2328
#define USB_DOEP_CTL_USBACTEP
Definition: ezr32wg_usb.h:2348
#define USB_DOEP_CTL_EPENA
Definition: ezr32wg_usb.h:2414
#define _USB_DOEP0TSIZ_PKTCNT_SHIFT
Definition: ezr32wg_usb.h:2324
USB_Status_TypeDef
USB transfer status enumerator.
Definition: em_usb.h:319
#define _USB_DCFG_DEVADDR_SHIFT
Definition: ezr32wg_usb.h:1515
#define USB_ROUTE_PHYPEN
Definition: ezr32wg_usb.h:291
#define USB_GINTMSK_SOFMSK
Definition: ezr32wg_usb.h:764
#define _USB_HPRT_PRTSPD_MASK
Definition: ezr32wg_usb.h:1283
#define USB_GRSTCTL_TXFFLSH
Definition: ezr32wg_usb.h:572
#define USB_GRSTCTL_RXFFLSH
Definition: ezr32wg_usb.h:567
#define USB_GINTMSK_HCHINTMSK
Definition: ezr32wg_usb.h:854
#define USB_GINTMSK_ENUMDONEMSK
Definition: ezr32wg_usb.h:804
#define USB_GINTMSK_USBRSTMSK
Definition: ezr32wg_usb.h:799
#define USB_DIEP_CTL_SNAK
Definition: ezr32wg_usb.h:2095
#define USB_HC_CHAR_CHENA
Definition: ezr32wg_usb.h:1348
#define _USB_DIEP_CTL_EPTYPE_SHIFT
Definition: ezr32wg_usb.h:2069
#define USB_GAHBCFG_GLBLINTRMSK
Definition: ezr32wg_usb.h:445
USB protocol stack library API for EFM32/EZR32.
#define USB_DIEP0CTL_CNAK
Definition: ezr32wg_usb.h:1940
#define _USB_DOEP_CTL_EPTYPE_SHIFT
Definition: ezr32wg_usb.h:2367
#define _USB_HC_CHAR_ODDFRM_MASK
Definition: ezr32wg_usb.h:1340
#define USB_DIEP_CTL_STALL
Definition: ezr32wg_usb.h:2081
#define USB_STATUS_VREGOS
Definition: ezr32wg_usb.h:226
#define _USB_DIEP_TSIZ_PKTCNT_SHIFT
Definition: ezr32wg_usb.h:2182
#define USB_HC_CHAR_ODDFRM
Definition: ezr32wg_usb.h:1338
#define USB_DIEP0CTL_EPENA
Definition: ezr32wg_usb.h:1955
#define _USB_DIEP_CTL_EPTYPE_MASK
Definition: ezr32wg_usb.h:2070
#define USB_DIEP_CTL_USBACTEP
Definition: ezr32wg_usb.h:2050
#define _USB_DAINTMSK_OUTEPMSK0_SHIFT
Definition: ezr32wg_usb.h:1843
#define USB_HPRT_PRTPWR
Definition: ezr32wg_usb.h:1257
#define _USB_DOEP_TSIZ_PKTCNT_SHIFT
Definition: ezr32wg_usb.h:2476
#define USB_DCTL_RMTWKUPSIG
Definition: ezr32wg_usb.h:1539
#define _USB_HPRT_PRTSPD_SHIFT
Definition: ezr32wg_usb.h:1282
#define _USB_GRSTCTL_TXFNUM_SHIFT
Definition: ezr32wg_usb.h:577
#define _USB_IEN_RESETVALUE
Definition: ezr32wg_usb.h:275
#define _USB_DOEP0TSIZ_XFERSIZE_SHIFT
Definition: ezr32wg_usb.h:2319
#define _USB_DOEP_CTL_MPS_SHIFT
Definition: ezr32wg_usb.h:2344
#define USB_GINTMSK_IEPINTMSK
Definition: ezr32wg_usb.h:819
#define USB_HC_CHAR_CHDIS
Definition: ezr32wg_usb.h:1343
#define USB_DOEP_CTL_SETD0PIDEF
Definition: ezr32wg_usb.h:2399
#define USB_GINTMSK_PRTINTMSK
Definition: ezr32wg_usb.h:849
#define USB_DOEP_CTL_CNAK
Definition: ezr32wg_usb.h:2389
#define USB_DCTL_CGNPINNAK
Definition: ezr32wg_usb.h:1580
#define USB_DIEP_CTL_SETD0PIDEF
Definition: ezr32wg_usb.h:2100
#define _USB_DOEP_TSIZ_XFERSIZE_SHIFT
Definition: ezr32wg_usb.h:2472
#define USB_HPRT_PRTRST
Definition: ezr32wg_usb.h:1248
#define _USB_DCFG_DEVADDR_MASK
Definition: ezr32wg_usb.h:1516