em_rtcc.h

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/***************************************************************************/
#ifndef EM_RTCC_H
#define EM_RTCC_H

#include "em_device.h"
#if defined( RTCC_COUNT ) && ( RTCC_COUNT == 1 )

#include <stdbool.h>
#include "em_assert.h"

#ifdef __cplusplus
extern "C" {
#endif

/***************************************************************************/
/***************************************************************************/
#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84)    \
    || defined(_SILICON_LABS_GECKO_INTERNAL_SDID_89)
/* Enable fix for errata "RTCC_E203 - Potential Stability Issue with RTCC
 * Registers". */
#define ERRATA_FIX_RTCC_E203
#endif

#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84)
/* Enable fix for errata "RTCC_E204 - Disabling the RTCC Backup RAM may consume extra
 * current". */
#define ERRATA_FIX_RTCC_E204
#endif

/*******************************************************************************
 *********************************   ENUM   ************************************
 ******************************************************************************/

typedef enum
{
  rtccCntModeNormal = _RTCC_CTRL_CNTTICK_PRESC,

  rtccCntModeCalendar = _RTCC_CTRL_CNTTICK_CCV0MATCH
} RTCC_CntMode_TypeDef;

typedef enum
{
  rtccCntPresc_1     = _RTCC_CTRL_CNTPRESC_DIV1,      
  rtccCntPresc_2     = _RTCC_CTRL_CNTPRESC_DIV2,      
  rtccCntPresc_4     = _RTCC_CTRL_CNTPRESC_DIV4,      
  rtccCntPresc_8     = _RTCC_CTRL_CNTPRESC_DIV8,      
  rtccCntPresc_16    = _RTCC_CTRL_CNTPRESC_DIV16,     
  rtccCntPresc_32    = _RTCC_CTRL_CNTPRESC_DIV32,     
  rtccCntPresc_64    = _RTCC_CTRL_CNTPRESC_DIV64,     
  rtccCntPresc_128   = _RTCC_CTRL_CNTPRESC_DIV128,    
  rtccCntPresc_256   = _RTCC_CTRL_CNTPRESC_DIV256,    
  rtccCntPresc_512   = _RTCC_CTRL_CNTPRESC_DIV512,    
  rtccCntPresc_1024  = _RTCC_CTRL_CNTPRESC_DIV1024,   
  rtccCntPresc_2048  = _RTCC_CTRL_CNTPRESC_DIV2048,   
  rtccCntPresc_4096  = _RTCC_CTRL_CNTPRESC_DIV4096,   
  rtccCntPresc_8192  = _RTCC_CTRL_CNTPRESC_DIV8192,   
  rtccCntPresc_16384 = _RTCC_CTRL_CNTPRESC_DIV16384,  
  rtccCntPresc_32768 = _RTCC_CTRL_CNTPRESC_DIV32768   
} RTCC_CntPresc_TypeDef;


typedef enum
{
  rtccCntTickPresc = _RTCC_CTRL_CNTTICK_PRESC,

  rtccCntTickCCV0Match = _RTCC_CTRL_CNTTICK_CCV0MATCH
} RTCC_PrescMode_TypeDef;


typedef enum
{
  rtccCapComChModeOff     = _RTCC_CC_CTRL_MODE_OFF,           
  rtccCapComChModeCapture = _RTCC_CC_CTRL_MODE_INPUTCAPTURE,  
  rtccCapComChModeCompare = _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE, 
} RTCC_CapComChMode_TypeDef;

typedef enum
{
  rtccCompMatchOutActionPulse  = _RTCC_CC_CTRL_CMOA_PULSE,  
  rtccCompMatchOutActionToggle = _RTCC_CC_CTRL_CMOA_TOGGLE, 
  rtccCompMatchOutActionClear  = _RTCC_CC_CTRL_CMOA_CLEAR,  
  rtccCompMatchOutActionSet    = _RTCC_CC_CTRL_CMOA_SET     
} RTCC_CompMatchOutAction_TypeDef;


typedef enum
{
  rtccPRSCh0 = _RTCC_CC_CTRL_PRSSEL_PRSCH0,   
  rtccPRSCh1 = _RTCC_CC_CTRL_PRSSEL_PRSCH1,   
  rtccPRSCh2 = _RTCC_CC_CTRL_PRSSEL_PRSCH2,   
  rtccPRSCh3 = _RTCC_CC_CTRL_PRSSEL_PRSCH3,   
  rtccPRSCh4 = _RTCC_CC_CTRL_PRSSEL_PRSCH4,   
  rtccPRSCh5 = _RTCC_CC_CTRL_PRSSEL_PRSCH5,   
  rtccPRSCh6 = _RTCC_CC_CTRL_PRSSEL_PRSCH6,   
  rtccPRSCh7 = _RTCC_CC_CTRL_PRSSEL_PRSCH7,   
  rtccPRSCh8 = _RTCC_CC_CTRL_PRSSEL_PRSCH8,   
  rtccPRSCh9 = _RTCC_CC_CTRL_PRSSEL_PRSCH9,   
  rtccPRSCh10 = _RTCC_CC_CTRL_PRSSEL_PRSCH10, 
  rtccPRSCh11 = _RTCC_CC_CTRL_PRSSEL_PRSCH11  
} RTCC_PRSSel_TypeDef;


typedef enum
{
  rtccInEdgeRising  = _RTCC_CC_CTRL_ICEDGE_RISING,  
  rtccInEdgeFalling = _RTCC_CC_CTRL_ICEDGE_FALLING, 
  rtccInEdgeBoth    = _RTCC_CC_CTRL_ICEDGE_BOTH,    
  rtccInEdgeNone    = _RTCC_CC_CTRL_ICEDGE_NONE     
} RTCC_InEdgeSel_TypeDef;


typedef enum
{
  rtccCompBaseCnt = _RTCC_CC_CTRL_COMPBASE_CNT,

  rtccCompBasePreCnt = _RTCC_CC_CTRL_COMPBASE_PRECNT
} RTCC_CompBase_TypeDef;

typedef enum
{
  rtccDayCompareModeMonth = _RTCC_CC_CTRL_DAYCC_MONTH,  
  rtccDayCompareModeWeek  = _RTCC_CC_CTRL_DAYCC_WEEK    
} RTCC_DayCompareMode_TypeDef;

/*******************************************************************************
 *******************************   STRUCTS   ***********************************
 ******************************************************************************/

typedef struct
{
  bool                   enable;

  bool                   debugRun;

  bool                   precntWrapOnCCV0;

  bool                   cntWrapOnCCV1;

  RTCC_CntPresc_TypeDef  presc;

  RTCC_PrescMode_TypeDef prescMode;

#if defined(_RTCC_CTRL_BUMODETSEN_MASK)

  bool                   enaBackupModeSet;
#endif

  bool                   enaOSCFailDetect;

  RTCC_CntMode_TypeDef   cntMode;

  bool                   disLeapYearCorr;
} RTCC_Init_TypeDef;


typedef struct
{
  RTCC_CapComChMode_TypeDef        chMode;

  RTCC_CompMatchOutAction_TypeDef  compMatchOutAction;

  RTCC_PRSSel_TypeDef              prsSel;

  RTCC_InEdgeSel_TypeDef           inputEdgeSel;

  RTCC_CompBase_TypeDef            compBase;

  uint8_t                          compMask;

  RTCC_DayCompareMode_TypeDef      dayCompMode;
} RTCC_CCChConf_TypeDef;


/*******************************************************************************
 *******************************   DEFINES   ***********************************
 ******************************************************************************/

#if defined(_RTCC_CTRL_BUMODETSEN_MASK)
#define RTCC_INIT_DEFAULT                                                   \
{                                                                           \
  true,     /* Start counting when init done.                           */  \
  false,    /* Disable RTCC during debug halt.                          */  \
  false,    /* Disable precounter wrap on ch. 0 CCV value.              */  \
  false,    /* Disable counter wrap on ch. 1 CCV value.                 */  \
  rtccCntPresc_32, /* 977 us per tick.                                  */  \
  rtccCntTickPresc, /* Counter increments according to prescaler value. */  \
  false,    /* No RTCC storage on backup mode entry.                    */  \
  false,    /* No RTCC oscillator failure detection.                    */  \
  rtccCntModeNormal, /* Normal RTCC mode.                               */  \
  false,    /* No leap year correction.                                 */  \
}
#else
#define RTCC_INIT_DEFAULT                                                   \
{                                                                           \
  true,     /* Start counting when init done.                           */  \
  false,    /* Disable RTCC during debug halt.                          */  \
  false,    /* Disable precounter wrap on ch. 0 CCV value.              */  \
  false,    /* Disable counter wrap on ch. 1 CCV value.                 */  \
  rtccCntPresc_32, /* 977 us per tick.                                  */  \
  rtccCntTickPresc, /* Counter increments according to prescaler value. */  \
  false,    /* No RTCC oscillator failure detection.                    */  \
  rtccCntModeNormal, /* Normal RTCC mode.                               */  \
  false,    /* No leap year correction.                                 */  \
}
#endif

#define RTCC_CH_INIT_COMPARE_DEFAULT                                        \
{                                                                           \
  rtccCapComChModeCompare,     /* Select output compare mode.     */        \
  rtccCompMatchOutActionPulse, /* Create pulse on compare match.  */        \
  rtccPRSCh0,                  /* PRS channel 0 (not used).       */        \
  rtccInEdgeNone,              /* No edge detection.              */        \
  rtccCompBaseCnt,             /* Counter comparison base.        */        \
  0,                           /* No compare mask bits set.       */        \
  rtccDayCompareModeMonth      /* Don't care */                             \
}

#define RTCC_CH_INIT_CAPTURE_DEFAULT                                        \
{                                                                           \
  rtccCapComChModeCapture,     /* Select input capture mode.      */        \
  rtccCompMatchOutActionPulse, /* Create pulse on capture.        */        \
  rtccPRSCh0,                  /* PRS channel 0.                  */        \
  rtccInEdgeRising,            /* Rising edge detection.          */        \
  rtccCompBaseCnt,             /* Don't care.                     */        \
  0,                           /* Don't care.                     */        \
  rtccDayCompareModeMonth      /* Don't care                      */        \
}

#define RTCC_CH_VALID( ch )    ( ( ch ) < 3 )

/*******************************************************************************
 *****************************   PROTOTYPES   **********************************
 ******************************************************************************/

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_ChannelCCVGet( int ch )
{
  EFM_ASSERT( RTCC_CH_VALID( ch ) );
  return RTCC->CC[ ch ].CCV;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_ChannelCCVSet( int ch, uint32_t value )
{
  EFM_ASSERT( RTCC_CH_VALID( ch ) );
  RTCC->CC[ ch ].CCV = value;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_ChannelDateGet( int ch )
{
  EFM_ASSERT( RTCC_CH_VALID( ch ) );
  return RTCC->CC[ ch ].DATE;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_ChannelDateSet( int ch, uint32_t date )
{
  EFM_ASSERT( RTCC_CH_VALID( ch ) );
  RTCC->CC[ ch ].DATE = date;
}

void RTCC_ChannelInit( int ch, RTCC_CCChConf_TypeDef const *confPtr );

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_ChannelTimeGet( int ch )
{
  EFM_ASSERT( RTCC_CH_VALID( ch ) );
  return RTCC->CC[ ch ].TIME;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_ChannelTimeSet( int ch, uint32_t time )
{
  EFM_ASSERT( RTCC_CH_VALID( ch ) );
  RTCC->CC[ ch ].TIME = time;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_CombinedCounterGet( void )
{
  return RTCC->COMBCNT;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_CounterGet( void )
{
  return RTCC->CNT;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_CounterSet( uint32_t value )
{
  RTCC->CNT = value;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_DateGet( void )
{
  return RTCC->DATE;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_DateSet( uint32_t date )
{
  RTCC->DATE = date;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_EM4WakeupEnable( bool enable )
{
  if ( enable )
  {
    RTCC->EM4WUEN = RTCC_EM4WUEN_EM4WU;
  }
  else
  {
    RTCC->EM4WUEN = 0;
  }
}

void RTCC_Enable( bool enable );

void RTCC_Init( const RTCC_Init_TypeDef *init );

/***************************************************************************/
__STATIC_INLINE void RTCC_IntClear( uint32_t flags )
{
  RTCC->IFC = flags;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_IntDisable( uint32_t flags )
{
  RTCC->IEN &= ~flags;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_IntEnable( uint32_t flags )
{
  RTCC->IEN |= flags;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_IntGet( void )
{
  return RTCC->IF;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_IntGetEnabled( void )
{
  uint32_t tmp;

  tmp = RTCC->IEN;

  /* Bitwise AND of pending and enabled interrupt flags. */
  return RTCC->IF & tmp;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_IntSet( uint32_t flags )
{
  RTCC->IFS = flags;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_Lock( void )
{
#if defined(ERRATA_FIX_RTCC_E203)
  /* RTCC_E203 - Potential Stability Issue with RTCC Registers
   * RTCC_LOCK register must be modified while RTCC clock is disabled. */
  uint32_t lfeReg = CMU->LFECLKEN0;
  bool cmuLocked = (CMU->LOCK == CMU_LOCK_LOCKKEY_LOCKED);
  if (cmuLocked)
  {
    CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK;
  }
  CMU->LFECLKEN0 = 0x0;
#endif
  RTCC->LOCK = RTCC_LOCK_LOCKKEY_LOCK;
#if defined(ERRATA_FIX_RTCC_E203)
  /* Restore clock state after RTCC_E203 fix. */
  CMU->LFECLKEN0 = lfeReg;
  if (cmuLocked)
  {
    CMU->LOCK = CMU_LOCK_LOCKKEY_LOCK;
  }
#endif
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_PreCounterGet( void )
{
  return RTCC->PRECNT;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_PreCounterSet( uint32_t preCntVal )
{
  RTCC->PRECNT = preCntVal;
}

void RTCC_Reset( void );

/***************************************************************************/
__STATIC_INLINE void RTCC_RetentionRamPowerDown( void )
{
#if !defined(ERRATA_FIX_RTCC_E204)
  /* Devices that are affected by RTCC_E204 should always keep the RTCC
   * backup RAM retained. */
  RTCC->POWERDOWN = RTCC_POWERDOWN_RAM;
#endif
}

void RTCC_StatusClear( void );

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_StatusGet( void )
{
  while ( RTCC->SYNCBUSY & RTCC_SYNCBUSY_CMD )
  {
    // Wait for syncronization.
  }
  return RTCC->STATUS;
}

/***************************************************************************/
__STATIC_INLINE uint32_t RTCC_TimeGet( void )
{
  return RTCC->TIME;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_TimeSet( uint32_t time )
{
  RTCC->TIME = time;
}

/***************************************************************************/
__STATIC_INLINE void RTCC_Unlock( void )
{
#if defined(ERRATA_FIX_RTCC_E203)
  /* RTCC_E203 - Potential Stability Issue with RTCC Registers
   * RTCC_LOCK register must be modified while RTCC clock is disabled. */
  uint32_t lfeReg = CMU->LFECLKEN0;
  bool cmuLocked = (CMU->LOCK == CMU_LOCK_LOCKKEY_LOCKED);
  if (cmuLocked)
  {
    CMU->LOCK = CMU_LOCK_LOCKKEY_UNLOCK;
  }
  CMU->LFECLKEN0 = 0x0;
#endif
  RTCC->LOCK = RTCC_LOCK_LOCKKEY_UNLOCK;
#if defined(ERRATA_FIX_RTCC_E203)
  /* Restore clock state after RTCC_E203 fix. */
  CMU->LFECLKEN0 = lfeReg;
  if (cmuLocked)
  {
    CMU->LOCK = CMU_LOCK_LOCKKEY_LOCK;
  }
#endif
}

#ifdef __cplusplus
}
#endif

#endif /* defined( RTCC_COUNT ) && ( RTC_COUNT == 1 ) */
#endif /* EM_RTCC_H */