EZR32 Wonder Gecko Software Documentation  ezr32wg-doc-5.1.2
em_adc.h
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1 /***************************************************************************/
33 #ifndef EM_ADC_H
34 #define EM_ADC_H
35 
36 #include "em_device.h"
37 #if defined( ADC_COUNT ) && ( ADC_COUNT > 0 )
38 
39 #include <stdbool.h>
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 /***************************************************************************/
50 /***************************************************************************/
55 /*******************************************************************************
56  ******************************** ENUMS ************************************
57  ******************************************************************************/
58 
60 typedef enum
61 {
62  adcAcqTime1 = _ADC_SINGLECTRL_AT_1CYCLE,
63  adcAcqTime2 = _ADC_SINGLECTRL_AT_2CYCLES,
64  adcAcqTime4 = _ADC_SINGLECTRL_AT_4CYCLES,
65  adcAcqTime8 = _ADC_SINGLECTRL_AT_8CYCLES,
66  adcAcqTime16 = _ADC_SINGLECTRL_AT_16CYCLES,
67  adcAcqTime32 = _ADC_SINGLECTRL_AT_32CYCLES,
68  adcAcqTime64 = _ADC_SINGLECTRL_AT_64CYCLES,
69  adcAcqTime128 = _ADC_SINGLECTRL_AT_128CYCLES,
70  adcAcqTime256 = _ADC_SINGLECTRL_AT_256CYCLES
71 } ADC_AcqTime_TypeDef;
72 
73 #if defined( _ADC_CTRL_LPFMODE_MASK )
74 
75 typedef enum
76 {
78  adcLPFilterBypass = _ADC_CTRL_LPFMODE_BYPASS,
79 
81  adcLPFilterRC = _ADC_CTRL_LPFMODE_RCFILT,
82 
84  adcLPFilterDeCap = _ADC_CTRL_LPFMODE_DECAP
85 } ADC_LPFilter_TypeDef;
86 #endif
87 
89 typedef enum
90 {
92  adcOvsRateSel2 = _ADC_CTRL_OVSRSEL_X2,
93 
95  adcOvsRateSel4 = _ADC_CTRL_OVSRSEL_X4,
96 
98  adcOvsRateSel8 = _ADC_CTRL_OVSRSEL_X8,
99 
101  adcOvsRateSel16 = _ADC_CTRL_OVSRSEL_X16,
102 
104  adcOvsRateSel32 = _ADC_CTRL_OVSRSEL_X32,
105 
107  adcOvsRateSel64 = _ADC_CTRL_OVSRSEL_X64,
108 
110  adcOvsRateSel128 = _ADC_CTRL_OVSRSEL_X128,
111 
113  adcOvsRateSel256 = _ADC_CTRL_OVSRSEL_X256,
114 
116  adcOvsRateSel512 = _ADC_CTRL_OVSRSEL_X512,
117 
119  adcOvsRateSel1024 = _ADC_CTRL_OVSRSEL_X1024,
120 
122  adcOvsRateSel2048 = _ADC_CTRL_OVSRSEL_X2048,
123 
125  adcOvsRateSel4096 = _ADC_CTRL_OVSRSEL_X4096
126 } ADC_OvsRateSel_TypeDef;
127 
128 
130 typedef enum
131 {
132 #if defined( _ADC_SINGLECTRL_PRSSEL_MASK )
133  adcPRSSELCh0 = _ADC_SINGLECTRL_PRSSEL_PRSCH0,
134  adcPRSSELCh1 = _ADC_SINGLECTRL_PRSSEL_PRSCH1,
135  adcPRSSELCh2 = _ADC_SINGLECTRL_PRSSEL_PRSCH2,
136  adcPRSSELCh3 = _ADC_SINGLECTRL_PRSSEL_PRSCH3,
137 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH4 )
138  adcPRSSELCh4 = _ADC_SINGLECTRL_PRSSEL_PRSCH4,
139 #endif
140 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH5 )
141  adcPRSSELCh5 = _ADC_SINGLECTRL_PRSSEL_PRSCH5,
142 #endif
143 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH6 )
144  adcPRSSELCh6 = _ADC_SINGLECTRL_PRSSEL_PRSCH6,
145 #endif
146 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH7 )
147  adcPRSSELCh7 = _ADC_SINGLECTRL_PRSSEL_PRSCH7,
148 #endif
149 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH8 )
150  adcPRSSELCh8 = _ADC_SINGLECTRL_PRSSEL_PRSCH8,
151 #endif
152 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH9 )
153  adcPRSSELCh9 = _ADC_SINGLECTRL_PRSSEL_PRSCH9,
154 #endif
155 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH10 )
156  adcPRSSELCh10 = _ADC_SINGLECTRL_PRSSEL_PRSCH10,
157 #endif
158 #if defined( _ADC_SINGLECTRL_PRSSEL_PRSCH11 )
159  adcPRSSELCh11 = _ADC_SINGLECTRL_PRSSEL_PRSCH11,
160 #endif
161 #elif defined(_ADC_SINGLECTRLX_PRSSEL_MASK)
162  adcPRSSELCh0 = _ADC_SINGLECTRLX_PRSSEL_PRSCH0,
163  adcPRSSELCh1 = _ADC_SINGLECTRLX_PRSSEL_PRSCH1,
164  adcPRSSELCh2 = _ADC_SINGLECTRLX_PRSSEL_PRSCH2,
165  adcPRSSELCh3 = _ADC_SINGLECTRLX_PRSSEL_PRSCH3,
166  adcPRSSELCh4 = _ADC_SINGLECTRLX_PRSSEL_PRSCH4,
167  adcPRSSELCh5 = _ADC_SINGLECTRLX_PRSSEL_PRSCH5,
168  adcPRSSELCh6 = _ADC_SINGLECTRLX_PRSSEL_PRSCH6,
169  adcPRSSELCh7 = _ADC_SINGLECTRLX_PRSSEL_PRSCH7,
170  adcPRSSELCh8 = _ADC_SINGLECTRLX_PRSSEL_PRSCH8,
171  adcPRSSELCh9 = _ADC_SINGLECTRLX_PRSSEL_PRSCH9,
172  adcPRSSELCh10 = _ADC_SINGLECTRLX_PRSSEL_PRSCH10,
173  adcPRSSELCh11 = _ADC_SINGLECTRLX_PRSSEL_PRSCH11,
174 #if defined( _ADC_SINGLECTRLX_PRSSEL_PRSCH12 )
175  adcPRSSELCh12 = _ADC_SINGLECTRLX_PRSSEL_PRSCH12,
176  adcPRSSELCh13 = _ADC_SINGLECTRLX_PRSSEL_PRSCH13,
177  adcPRSSELCh14 = _ADC_SINGLECTRLX_PRSSEL_PRSCH14,
178  adcPRSSELCh15 = _ADC_SINGLECTRLX_PRSSEL_PRSCH15,
179 #endif
180 #endif
181 } ADC_PRSSEL_TypeDef;
182 
183 
186 #if defined( _ADC_SCANCTRLX_VREFSEL_MASK )
187 #define ADC_CTRLX_VREFSEL_REG 0x80
188 #endif
189 typedef enum
190 {
192  adcRef1V25 = _ADC_SINGLECTRL_REF_1V25,
193 
195  adcRef2V5 = _ADC_SINGLECTRL_REF_2V5,
196 
198  adcRefVDD = _ADC_SINGLECTRL_REF_VDD,
199 
200 #if defined( _ADC_SINGLECTRL_REF_5VDIFF )
201 
202  adcRef5VDIFF = _ADC_SINGLECTRL_REF_5VDIFF,
203 #endif
204 
205 #if defined( _ADC_SINGLECTRL_REF_5V )
206 
207  adcRef5V = _ADC_SINGLECTRL_REF_5V,
208 #endif
209 
211  adcRefExtSingle = _ADC_SINGLECTRL_REF_EXTSINGLE,
212 
214  adcRef2xExtDiff = _ADC_SINGLECTRL_REF_2XEXTDIFF,
215 
217  adcRef2xVDD = _ADC_SINGLECTRL_REF_2XVDD,
218 
219 #if defined( _ADC_SINGLECTRLX_VREFSEL_VBGR )
220 
221  adcRefVBGR = _ADC_SINGLECTRLX_VREFSEL_VBGR | ADC_CTRLX_VREFSEL_REG,
222 #endif
223 
224 #if defined( _ADC_SINGLECTRLX_VREFSEL_VDDXWATT )
225 
226  adcRefVddxAtt = _ADC_SINGLECTRLX_VREFSEL_VDDXWATT | ADC_CTRLX_VREFSEL_REG,
227 #endif
228 
229 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFPWATT )
230 
232  adcRefVPxAtt = _ADC_SINGLECTRLX_VREFSEL_VREFPWATT | ADC_CTRLX_VREFSEL_REG,
233 #endif
234 
235 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFP )
236 
237  adcRefP = _ADC_SINGLECTRLX_VREFSEL_VREFP | ADC_CTRLX_VREFSEL_REG,
238 #endif
239 
240 #if defined( _ADC_SINGLECTRLX_VREFSEL_VENTROPY )
241 
242  adcRefVEntropy = _ADC_SINGLECTRLX_VREFSEL_VENTROPY | ADC_CTRLX_VREFSEL_REG,
243 #endif
244 
245 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFPNWATT )
246 
248  adcRefVPNxAtt = _ADC_SINGLECTRLX_VREFSEL_VREFPNWATT | ADC_CTRLX_VREFSEL_REG,
249 #endif
250 
251 #if defined( _ADC_SINGLECTRLX_VREFSEL_VREFPN )
252 
254  adcRefPN = _ADC_SINGLECTRLX_VREFSEL_VREFPN | ADC_CTRLX_VREFSEL_REG,
255 #endif
256 } ADC_Ref_TypeDef;
257 
259 /* Deprecated enum names */
260 #if !defined( _ADC_SINGLECTRL_REF_5VDIFF )
261 #define adcRef5VDIFF adcRef5V
262 #endif
263 
267 typedef enum
268 {
269  adcRes12Bit = _ADC_SINGLECTRL_RES_12BIT,
270  adcRes8Bit = _ADC_SINGLECTRL_RES_8BIT,
271  adcRes6Bit = _ADC_SINGLECTRL_RES_6BIT,
272  adcResOVS = _ADC_SINGLECTRL_RES_OVS
273 } ADC_Res_TypeDef;
274 
275 
276 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
277 
278 typedef enum
279 {
280  /* Differential mode disabled */
281  adcSingleInputCh0 = _ADC_SINGLECTRL_INPUTSEL_CH0,
282  adcSingleInputCh1 = _ADC_SINGLECTRL_INPUTSEL_CH1,
283  adcSingleInputCh2 = _ADC_SINGLECTRL_INPUTSEL_CH2,
284  adcSingleInputCh3 = _ADC_SINGLECTRL_INPUTSEL_CH3,
285  adcSingleInputCh4 = _ADC_SINGLECTRL_INPUTSEL_CH4,
286  adcSingleInputCh5 = _ADC_SINGLECTRL_INPUTSEL_CH5,
287  adcSingleInputCh6 = _ADC_SINGLECTRL_INPUTSEL_CH6,
288  adcSingleInputCh7 = _ADC_SINGLECTRL_INPUTSEL_CH7,
289  adcSingleInputTemp = _ADC_SINGLECTRL_INPUTSEL_TEMP,
290  adcSingleInputVDDDiv3 = _ADC_SINGLECTRL_INPUTSEL_VDDDIV3,
291  adcSingleInputVDD = _ADC_SINGLECTRL_INPUTSEL_VDD,
292  adcSingleInputVSS = _ADC_SINGLECTRL_INPUTSEL_VSS,
293  adcSingleInputVrefDiv2 = _ADC_SINGLECTRL_INPUTSEL_VREFDIV2,
294  adcSingleInputDACOut0 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0,
295  adcSingleInputDACOut1 = _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1,
296  adcSingleInputATEST = 15,
298  /* Differential mode enabled */
299  adcSingleInputCh0Ch1 = _ADC_SINGLECTRL_INPUTSEL_CH0CH1,
300  adcSingleInputCh2Ch3 = _ADC_SINGLECTRL_INPUTSEL_CH2CH3,
301  adcSingleInputCh4Ch5 = _ADC_SINGLECTRL_INPUTSEL_CH4CH5,
302  adcSingleInputCh6Ch7 = _ADC_SINGLECTRL_INPUTSEL_CH6CH7,
303  adcSingleInputDiff0 = 4
304 } ADC_SingleInput_TypeDef;
305 
307 /* Deprecated enum names */
308 #define adcSingleInpCh0 adcSingleInputCh0
309 #define adcSingleInpCh1 adcSingleInputCh1
310 #define adcSingleInpCh2 adcSingleInputCh2
311 #define adcSingleInpCh3 adcSingleInputCh3
312 #define adcSingleInpCh4 adcSingleInputCh4
313 #define adcSingleInpCh5 adcSingleInputCh5
314 #define adcSingleInpCh6 adcSingleInputCh6
315 #define adcSingleInpCh7 adcSingleInputCh7
316 #define adcSingleInpTemp adcSingleInputTemp
317 #define adcSingleInpVDDDiv3 adcSingleInputVDDDiv3
318 #define adcSingleInpVDD adcSingleInputVDD
319 #define adcSingleInpVSS adcSingleInputVSS
320 #define adcSingleInpVrefDiv2 adcSingleInputVrefDiv2
321 #define adcSingleInpDACOut0 adcSingleInputDACOut0
322 #define adcSingleInpDACOut1 adcSingleInputDACOut1
323 #define adcSingleInpATEST adcSingleInputATEST
324 #define adcSingleInpCh0Ch1 adcSingleInputCh0Ch1
325 #define adcSingleInpCh2Ch3 adcSingleInputCh2Ch3
326 #define adcSingleInpCh4Ch5 adcSingleInputCh4Ch5
327 #define adcSingleInpCh6Ch7 adcSingleInputCh6Ch7
328 #define adcSingleInpDiff0 adcSingleInputDiff0
329 
330 #endif
331 
332 #if defined( _ADC_SINGLECTRL_POSSEL_MASK )
333 
334 typedef enum
335 {
336  adcPosSelAPORT0XCH0 = _ADC_SINGLECTRL_POSSEL_APORT0XCH0,
337  adcPosSelAPORT0XCH1 = _ADC_SINGLECTRL_POSSEL_APORT0XCH1,
338  adcPosSelAPORT0XCH2 = _ADC_SINGLECTRL_POSSEL_APORT0XCH2,
339  adcPosSelAPORT0XCH3 = _ADC_SINGLECTRL_POSSEL_APORT0XCH3,
340  adcPosSelAPORT0XCH4 = _ADC_SINGLECTRL_POSSEL_APORT0XCH4,
341  adcPosSelAPORT0XCH5 = _ADC_SINGLECTRL_POSSEL_APORT0XCH5,
342  adcPosSelAPORT0XCH6 = _ADC_SINGLECTRL_POSSEL_APORT0XCH6,
343  adcPosSelAPORT0XCH7 = _ADC_SINGLECTRL_POSSEL_APORT0XCH7,
344  adcPosSelAPORT0XCH8 = _ADC_SINGLECTRL_POSSEL_APORT0XCH8,
345  adcPosSelAPORT0XCH9 = _ADC_SINGLECTRL_POSSEL_APORT0XCH9,
346  adcPosSelAPORT0XCH10 = _ADC_SINGLECTRL_POSSEL_APORT0XCH10,
347  adcPosSelAPORT0XCH11 = _ADC_SINGLECTRL_POSSEL_APORT0XCH11,
348  adcPosSelAPORT0XCH12 = _ADC_SINGLECTRL_POSSEL_APORT0XCH12,
349  adcPosSelAPORT0XCH13 = _ADC_SINGLECTRL_POSSEL_APORT0XCH13,
350  adcPosSelAPORT0XCH14 = _ADC_SINGLECTRL_POSSEL_APORT0XCH14,
351  adcPosSelAPORT0XCH15 = _ADC_SINGLECTRL_POSSEL_APORT0XCH15,
352  adcPosSelAPORT0YCH0 = _ADC_SINGLECTRL_POSSEL_APORT0YCH0,
353  adcPosSelAPORT0YCH1 = _ADC_SINGLECTRL_POSSEL_APORT0YCH1,
354  adcPosSelAPORT0YCH2 = _ADC_SINGLECTRL_POSSEL_APORT0YCH2,
355  adcPosSelAPORT0YCH3 = _ADC_SINGLECTRL_POSSEL_APORT0YCH3,
356  adcPosSelAPORT0YCH4 = _ADC_SINGLECTRL_POSSEL_APORT0YCH4,
357  adcPosSelAPORT0YCH5 = _ADC_SINGLECTRL_POSSEL_APORT0YCH5,
358  adcPosSelAPORT0YCH6 = _ADC_SINGLECTRL_POSSEL_APORT0YCH6,
359  adcPosSelAPORT0YCH7 = _ADC_SINGLECTRL_POSSEL_APORT0YCH7,
360  adcPosSelAPORT0YCH8 = _ADC_SINGLECTRL_POSSEL_APORT0YCH8,
361  adcPosSelAPORT0YCH9 = _ADC_SINGLECTRL_POSSEL_APORT0YCH9,
362  adcPosSelAPORT0YCH10 = _ADC_SINGLECTRL_POSSEL_APORT0YCH10,
363  adcPosSelAPORT0YCH11 = _ADC_SINGLECTRL_POSSEL_APORT0YCH11,
364  adcPosSelAPORT0YCH12 = _ADC_SINGLECTRL_POSSEL_APORT0YCH12,
365  adcPosSelAPORT0YCH13 = _ADC_SINGLECTRL_POSSEL_APORT0YCH13,
366  adcPosSelAPORT0YCH14 = _ADC_SINGLECTRL_POSSEL_APORT0YCH14,
367  adcPosSelAPORT0YCH15 = _ADC_SINGLECTRL_POSSEL_APORT0YCH15,
368  adcPosSelAPORT1XCH0 = _ADC_SINGLECTRL_POSSEL_APORT1XCH0,
369  adcPosSelAPORT1YCH1 = _ADC_SINGLECTRL_POSSEL_APORT1YCH1,
370  adcPosSelAPORT1XCH2 = _ADC_SINGLECTRL_POSSEL_APORT1XCH2,
371  adcPosSelAPORT1YCH3 = _ADC_SINGLECTRL_POSSEL_APORT1YCH3,
372  adcPosSelAPORT1XCH4 = _ADC_SINGLECTRL_POSSEL_APORT1XCH4,
373  adcPosSelAPORT1YCH5 = _ADC_SINGLECTRL_POSSEL_APORT1YCH5,
374  adcPosSelAPORT1XCH6 = _ADC_SINGLECTRL_POSSEL_APORT1XCH6,
375  adcPosSelAPORT1YCH7 = _ADC_SINGLECTRL_POSSEL_APORT1YCH7,
376  adcPosSelAPORT1XCH8 = _ADC_SINGLECTRL_POSSEL_APORT1XCH8,
377  adcPosSelAPORT1YCH9 = _ADC_SINGLECTRL_POSSEL_APORT1YCH9,
378  adcPosSelAPORT1XCH10 = _ADC_SINGLECTRL_POSSEL_APORT1XCH10,
379  adcPosSelAPORT1YCH11 = _ADC_SINGLECTRL_POSSEL_APORT1YCH11,
380  adcPosSelAPORT1XCH12 = _ADC_SINGLECTRL_POSSEL_APORT1XCH12,
381  adcPosSelAPORT1YCH13 = _ADC_SINGLECTRL_POSSEL_APORT1YCH13,
382  adcPosSelAPORT1XCH14 = _ADC_SINGLECTRL_POSSEL_APORT1XCH14,
383  adcPosSelAPORT1YCH15 = _ADC_SINGLECTRL_POSSEL_APORT1YCH15,
384  adcPosSelAPORT1XCH16 = _ADC_SINGLECTRL_POSSEL_APORT1XCH16,
385  adcPosSelAPORT1YCH17 = _ADC_SINGLECTRL_POSSEL_APORT1YCH17,
386  adcPosSelAPORT1XCH18 = _ADC_SINGLECTRL_POSSEL_APORT1XCH18,
387  adcPosSelAPORT1YCH19 = _ADC_SINGLECTRL_POSSEL_APORT1YCH19,
388  adcPosSelAPORT1XCH20 = _ADC_SINGLECTRL_POSSEL_APORT1XCH20,
389  adcPosSelAPORT1YCH21 = _ADC_SINGLECTRL_POSSEL_APORT1YCH21,
390  adcPosSelAPORT1XCH22 = _ADC_SINGLECTRL_POSSEL_APORT1XCH22,
391  adcPosSelAPORT1YCH23 = _ADC_SINGLECTRL_POSSEL_APORT1YCH23,
392  adcPosSelAPORT1XCH24 = _ADC_SINGLECTRL_POSSEL_APORT1XCH24,
393  adcPosSelAPORT1YCH25 = _ADC_SINGLECTRL_POSSEL_APORT1YCH25,
394  adcPosSelAPORT1XCH26 = _ADC_SINGLECTRL_POSSEL_APORT1XCH26,
395  adcPosSelAPORT1YCH27 = _ADC_SINGLECTRL_POSSEL_APORT1YCH27,
396  adcPosSelAPORT1XCH28 = _ADC_SINGLECTRL_POSSEL_APORT1XCH28,
397  adcPosSelAPORT1YCH29 = _ADC_SINGLECTRL_POSSEL_APORT1YCH29,
398  adcPosSelAPORT1XCH30 = _ADC_SINGLECTRL_POSSEL_APORT1XCH30,
399  adcPosSelAPORT1YCH31 = _ADC_SINGLECTRL_POSSEL_APORT1YCH31,
400  adcPosSelAPORT2YCH0 = _ADC_SINGLECTRL_POSSEL_APORT2YCH0,
401  adcPosSelAPORT2XCH1 = _ADC_SINGLECTRL_POSSEL_APORT2XCH1,
402  adcPosSelAPORT2YCH2 = _ADC_SINGLECTRL_POSSEL_APORT2YCH2,
403  adcPosSelAPORT2XCH3 = _ADC_SINGLECTRL_POSSEL_APORT2XCH3,
404  adcPosSelAPORT2YCH4 = _ADC_SINGLECTRL_POSSEL_APORT2YCH4,
405  adcPosSelAPORT2XCH5 = _ADC_SINGLECTRL_POSSEL_APORT2XCH5,
406  adcPosSelAPORT2YCH6 = _ADC_SINGLECTRL_POSSEL_APORT2YCH6,
407  adcPosSelAPORT2XCH7 = _ADC_SINGLECTRL_POSSEL_APORT2XCH7,
408  adcPosSelAPORT2YCH8 = _ADC_SINGLECTRL_POSSEL_APORT2YCH8,
409  adcPosSelAPORT2XCH9 = _ADC_SINGLECTRL_POSSEL_APORT2XCH9,
410  adcPosSelAPORT2YCH10 = _ADC_SINGLECTRL_POSSEL_APORT2YCH10,
411  adcPosSelAPORT2XCH11 = _ADC_SINGLECTRL_POSSEL_APORT2XCH11,
412  adcPosSelAPORT2YCH12 = _ADC_SINGLECTRL_POSSEL_APORT2YCH12,
413  adcPosSelAPORT2XCH13 = _ADC_SINGLECTRL_POSSEL_APORT2XCH13,
414  adcPosSelAPORT2YCH14 = _ADC_SINGLECTRL_POSSEL_APORT2YCH14,
415  adcPosSelAPORT2XCH15 = _ADC_SINGLECTRL_POSSEL_APORT2XCH15,
416  adcPosSelAPORT2YCH16 = _ADC_SINGLECTRL_POSSEL_APORT2YCH16,
417  adcPosSelAPORT2XCH17 = _ADC_SINGLECTRL_POSSEL_APORT2XCH17,
418  adcPosSelAPORT2YCH18 = _ADC_SINGLECTRL_POSSEL_APORT2YCH18,
419  adcPosSelAPORT2XCH19 = _ADC_SINGLECTRL_POSSEL_APORT2XCH19,
420  adcPosSelAPORT2YCH20 = _ADC_SINGLECTRL_POSSEL_APORT2YCH20,
421  adcPosSelAPORT2XCH21 = _ADC_SINGLECTRL_POSSEL_APORT2XCH21,
422  adcPosSelAPORT2YCH22 = _ADC_SINGLECTRL_POSSEL_APORT2YCH22,
423  adcPosSelAPORT2XCH23 = _ADC_SINGLECTRL_POSSEL_APORT2XCH23,
424  adcPosSelAPORT2YCH24 = _ADC_SINGLECTRL_POSSEL_APORT2YCH24,
425  adcPosSelAPORT2XCH25 = _ADC_SINGLECTRL_POSSEL_APORT2XCH25,
426  adcPosSelAPORT2YCH26 = _ADC_SINGLECTRL_POSSEL_APORT2YCH26,
427  adcPosSelAPORT2XCH27 = _ADC_SINGLECTRL_POSSEL_APORT2XCH27,
428  adcPosSelAPORT2YCH28 = _ADC_SINGLECTRL_POSSEL_APORT2YCH28,
429  adcPosSelAPORT2XCH29 = _ADC_SINGLECTRL_POSSEL_APORT2XCH29,
430  adcPosSelAPORT2YCH30 = _ADC_SINGLECTRL_POSSEL_APORT2YCH30,
431  adcPosSelAPORT2XCH31 = _ADC_SINGLECTRL_POSSEL_APORT2XCH31,
432  adcPosSelAPORT3XCH0 = _ADC_SINGLECTRL_POSSEL_APORT3XCH0,
433  adcPosSelAPORT3YCH1 = _ADC_SINGLECTRL_POSSEL_APORT3YCH1,
434  adcPosSelAPORT3XCH2 = _ADC_SINGLECTRL_POSSEL_APORT3XCH2,
435  adcPosSelAPORT3YCH3 = _ADC_SINGLECTRL_POSSEL_APORT3YCH3,
436  adcPosSelAPORT3XCH4 = _ADC_SINGLECTRL_POSSEL_APORT3XCH4,
437  adcPosSelAPORT3YCH5 = _ADC_SINGLECTRL_POSSEL_APORT3YCH5,
438  adcPosSelAPORT3XCH6 = _ADC_SINGLECTRL_POSSEL_APORT3XCH6,
439  adcPosSelAPORT3YCH7 = _ADC_SINGLECTRL_POSSEL_APORT3YCH7,
440  adcPosSelAPORT3XCH8 = _ADC_SINGLECTRL_POSSEL_APORT3XCH8,
441  adcPosSelAPORT3YCH9 = _ADC_SINGLECTRL_POSSEL_APORT3YCH9,
442  adcPosSelAPORT3XCH10 = _ADC_SINGLECTRL_POSSEL_APORT3XCH10,
443  adcPosSelAPORT3YCH11 = _ADC_SINGLECTRL_POSSEL_APORT3YCH11,
444  adcPosSelAPORT3XCH12 = _ADC_SINGLECTRL_POSSEL_APORT3XCH12,
445  adcPosSelAPORT3YCH13 = _ADC_SINGLECTRL_POSSEL_APORT3YCH13,
446  adcPosSelAPORT3XCH14 = _ADC_SINGLECTRL_POSSEL_APORT3XCH14,
447  adcPosSelAPORT3YCH15 = _ADC_SINGLECTRL_POSSEL_APORT3YCH15,
448  adcPosSelAPORT3XCH16 = _ADC_SINGLECTRL_POSSEL_APORT3XCH16,
449  adcPosSelAPORT3YCH17 = _ADC_SINGLECTRL_POSSEL_APORT3YCH17,
450  adcPosSelAPORT3XCH18 = _ADC_SINGLECTRL_POSSEL_APORT3XCH18,
451  adcPosSelAPORT3YCH19 = _ADC_SINGLECTRL_POSSEL_APORT3YCH19,
452  adcPosSelAPORT3XCH20 = _ADC_SINGLECTRL_POSSEL_APORT3XCH20,
453  adcPosSelAPORT3YCH21 = _ADC_SINGLECTRL_POSSEL_APORT3YCH21,
454  adcPosSelAPORT3XCH22 = _ADC_SINGLECTRL_POSSEL_APORT3XCH22,
455  adcPosSelAPORT3YCH23 = _ADC_SINGLECTRL_POSSEL_APORT3YCH23,
456  adcPosSelAPORT3XCH24 = _ADC_SINGLECTRL_POSSEL_APORT3XCH24,
457  adcPosSelAPORT3YCH25 = _ADC_SINGLECTRL_POSSEL_APORT3YCH25,
458  adcPosSelAPORT3XCH26 = _ADC_SINGLECTRL_POSSEL_APORT3XCH26,
459  adcPosSelAPORT3YCH27 = _ADC_SINGLECTRL_POSSEL_APORT3YCH27,
460  adcPosSelAPORT3XCH28 = _ADC_SINGLECTRL_POSSEL_APORT3XCH28,
461  adcPosSelAPORT3YCH29 = _ADC_SINGLECTRL_POSSEL_APORT3YCH29,
462  adcPosSelAPORT3XCH30 = _ADC_SINGLECTRL_POSSEL_APORT3XCH30,
463  adcPosSelAPORT3YCH31 = _ADC_SINGLECTRL_POSSEL_APORT3YCH31,
464  adcPosSelAPORT4YCH0 = _ADC_SINGLECTRL_POSSEL_APORT4YCH0,
465  adcPosSelAPORT4XCH1 = _ADC_SINGLECTRL_POSSEL_APORT4XCH1,
466  adcPosSelAPORT4YCH2 = _ADC_SINGLECTRL_POSSEL_APORT4YCH2,
467  adcPosSelAPORT4XCH3 = _ADC_SINGLECTRL_POSSEL_APORT4XCH3,
468  adcPosSelAPORT4YCH4 = _ADC_SINGLECTRL_POSSEL_APORT4YCH4,
469  adcPosSelAPORT4XCH5 = _ADC_SINGLECTRL_POSSEL_APORT4XCH5,
470  adcPosSelAPORT4YCH6 = _ADC_SINGLECTRL_POSSEL_APORT4YCH6,
471  adcPosSelAPORT4XCH7 = _ADC_SINGLECTRL_POSSEL_APORT4XCH7,
472  adcPosSelAPORT4YCH8 = _ADC_SINGLECTRL_POSSEL_APORT4YCH8,
473  adcPosSelAPORT4XCH9 = _ADC_SINGLECTRL_POSSEL_APORT4XCH9,
474  adcPosSelAPORT4YCH10 = _ADC_SINGLECTRL_POSSEL_APORT4YCH10,
475  adcPosSelAPORT4XCH11 = _ADC_SINGLECTRL_POSSEL_APORT4XCH11,
476  adcPosSelAPORT4YCH12 = _ADC_SINGLECTRL_POSSEL_APORT4YCH12,
477  adcPosSelAPORT4XCH13 = _ADC_SINGLECTRL_POSSEL_APORT4XCH13,
478  adcPosSelAPORT4YCH14 = _ADC_SINGLECTRL_POSSEL_APORT4YCH14,
479  adcPosSelAPORT4XCH15 = _ADC_SINGLECTRL_POSSEL_APORT4XCH15,
480  adcPosSelAPORT4YCH16 = _ADC_SINGLECTRL_POSSEL_APORT4YCH16,
481  adcPosSelAPORT4XCH17 = _ADC_SINGLECTRL_POSSEL_APORT4XCH17,
482  adcPosSelAPORT4YCH18 = _ADC_SINGLECTRL_POSSEL_APORT4YCH18,
483  adcPosSelAPORT4XCH19 = _ADC_SINGLECTRL_POSSEL_APORT4XCH19,
484  adcPosSelAPORT4YCH20 = _ADC_SINGLECTRL_POSSEL_APORT4YCH20,
485  adcPosSelAPORT4XCH21 = _ADC_SINGLECTRL_POSSEL_APORT4XCH21,
486  adcPosSelAPORT4YCH22 = _ADC_SINGLECTRL_POSSEL_APORT4YCH22,
487  adcPosSelAPORT4XCH23 = _ADC_SINGLECTRL_POSSEL_APORT4XCH23,
488  adcPosSelAPORT4YCH24 = _ADC_SINGLECTRL_POSSEL_APORT4YCH24,
489  adcPosSelAPORT4XCH25 = _ADC_SINGLECTRL_POSSEL_APORT4XCH25,
490  adcPosSelAPORT4YCH26 = _ADC_SINGLECTRL_POSSEL_APORT4YCH26,
491  adcPosSelAPORT4XCH27 = _ADC_SINGLECTRL_POSSEL_APORT4XCH27,
492  adcPosSelAPORT4YCH28 = _ADC_SINGLECTRL_POSSEL_APORT4YCH28,
493  adcPosSelAPORT4XCH29 = _ADC_SINGLECTRL_POSSEL_APORT4XCH29,
494  adcPosSelAPORT4YCH30 = _ADC_SINGLECTRL_POSSEL_APORT4YCH30,
495  adcPosSelAPORT4XCH31 = _ADC_SINGLECTRL_POSSEL_APORT4XCH31,
496  adcPosSelAVDD = _ADC_SINGLECTRL_POSSEL_AVDD,
497  adcPosSelDVDD = _ADC_SINGLECTRL_POSSEL_AREG,
498  adcPosSelPAVDD = _ADC_SINGLECTRL_POSSEL_VREGOUTPA,
499  adcPosSelDECOUPLE = _ADC_SINGLECTRL_POSSEL_PDBU,
500  adcPosSelIOVDD = _ADC_SINGLECTRL_POSSEL_IO0,
501  adcPosSelOPA2 = _ADC_SINGLECTRL_POSSEL_OPA2,
502  adcPosSelOPA3 = _ADC_SINGLECTRL_POSSEL_OPA3,
503  adcPosSelTEMP = _ADC_SINGLECTRL_POSSEL_TEMP,
504  adcPosSelDAC0OUT0 = _ADC_SINGLECTRL_POSSEL_DAC0OUT0,
505  adcPosSelDAC0OUT1 = _ADC_SINGLECTRL_POSSEL_DAC0OUT1,
506  adcPosSelSUBLSB = _ADC_SINGLECTRL_POSSEL_SUBLSB,
507  adcPosSelDEFAULT = _ADC_SINGLECTRL_POSSEL_DEFAULT,
508  adcPosSelVSS = _ADC_SINGLECTRL_POSSEL_VSS
509 } ADC_PosSel_TypeDef;
510 
511 /* Map legacy or incorrectly named select enums to correct enums. */
512 #define adcPosSelIO0 adcPosSelIOVDD
513 #define adcPosSelVREGOUTPA adcPosSelPAVDD
514 #define adcPosSelAREG adcPosSelDVDD
515 #define adcPosSelPDBU adcPosSelDECOUPLE
516 
517 #endif
518 
519 
520 #if defined( _ADC_SINGLECTRL_NEGSEL_MASK )
521 
522 typedef enum
523 {
524  adcNegSelAPORT0XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH0,
525  adcNegSelAPORT0XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH1,
526  adcNegSelAPORT0XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH2,
527  adcNegSelAPORT0XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH3,
528  adcNegSelAPORT0XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH4,
529  adcNegSelAPORT0XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH5,
530  adcNegSelAPORT0XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH6,
531  adcNegSelAPORT0XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH7,
532  adcNegSelAPORT0XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH8,
533  adcNegSelAPORT0XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH9,
534  adcNegSelAPORT0XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH10,
535  adcNegSelAPORT0XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH11,
536  adcNegSelAPORT0XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH12,
537  adcNegSelAPORT0XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH13,
538  adcNegSelAPORT0XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH14,
539  adcNegSelAPORT0XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT0XCH15,
540  adcNegSelAPORT0YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH0,
541  adcNegSelAPORT0YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH1,
542  adcNegSelAPORT0YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH2,
543  adcNegSelAPORT0YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH3,
544  adcNegSelAPORT0YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH4,
545  adcNegSelAPORT0YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH5,
546  adcNegSelAPORT0YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH6,
547  adcNegSelAPORT0YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH7,
548  adcNegSelAPORT0YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH8,
549  adcNegSelAPORT0YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH9,
550  adcNegSelAPORT0YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH10,
551  adcNegSelAPORT0YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH11,
552  adcNegSelAPORT0YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH12,
553  adcNegSelAPORT0YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH13,
554  adcNegSelAPORT0YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH14,
555  adcNegSelAPORT0YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT0YCH15,
556  adcNegSelAPORT1XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH0,
557  adcNegSelAPORT1YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH1,
558  adcNegSelAPORT1XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH2,
559  adcNegSelAPORT1YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH3,
560  adcNegSelAPORT1XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH4,
561  adcNegSelAPORT1YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH5,
562  adcNegSelAPORT1XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH6,
563  adcNegSelAPORT1YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH7,
564  adcNegSelAPORT1XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH8,
565  adcNegSelAPORT1YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH9,
566  adcNegSelAPORT1XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH10,
567  adcNegSelAPORT1YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH11,
568  adcNegSelAPORT1XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH12,
569  adcNegSelAPORT1YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH13,
570  adcNegSelAPORT1XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH14,
571  adcNegSelAPORT1YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH15,
572  adcNegSelAPORT1XCH16 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH16,
573  adcNegSelAPORT1YCH17 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH17,
574  adcNegSelAPORT1XCH18 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH18,
575  adcNegSelAPORT1YCH19 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH19,
576  adcNegSelAPORT1XCH20 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH20,
577  adcNegSelAPORT1YCH21 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH21,
578  adcNegSelAPORT1XCH22 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH22,
579  adcNegSelAPORT1YCH23 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH23,
580  adcNegSelAPORT1XCH24 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH24,
581  adcNegSelAPORT1YCH25 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH25,
582  adcNegSelAPORT1XCH26 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH26,
583  adcNegSelAPORT1YCH27 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH27,
584  adcNegSelAPORT1XCH28 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH28,
585  adcNegSelAPORT1YCH29 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH29,
586  adcNegSelAPORT1XCH30 = _ADC_SINGLECTRL_NEGSEL_APORT1XCH30,
587  adcNegSelAPORT1YCH31 = _ADC_SINGLECTRL_NEGSEL_APORT1YCH31,
588  adcNegSelAPORT2YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH0,
589  adcNegSelAPORT2XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH1,
590  adcNegSelAPORT2YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH2,
591  adcNegSelAPORT2XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH3,
592  adcNegSelAPORT2YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH4,
593  adcNegSelAPORT2XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH5,
594  adcNegSelAPORT2YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH6,
595  adcNegSelAPORT2XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH7,
596  adcNegSelAPORT2YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH8,
597  adcNegSelAPORT2XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH9,
598  adcNegSelAPORT2YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH10,
599  adcNegSelAPORT2XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH11,
600  adcNegSelAPORT2YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH12,
601  adcNegSelAPORT2XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH13,
602  adcNegSelAPORT2YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH14,
603  adcNegSelAPORT2XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH15,
604  adcNegSelAPORT2YCH16 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH16,
605  adcNegSelAPORT2XCH17 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH17,
606  adcNegSelAPORT2YCH18 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH18,
607  adcNegSelAPORT2XCH19 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH19,
608  adcNegSelAPORT2YCH20 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH20,
609  adcNegSelAPORT2XCH21 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH21,
610  adcNegSelAPORT2YCH22 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH22,
611  adcNegSelAPORT2XCH23 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH23,
612  adcNegSelAPORT2YCH24 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH24,
613  adcNegSelAPORT2XCH25 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH25,
614  adcNegSelAPORT2YCH26 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH26,
615  adcNegSelAPORT2XCH27 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH27,
616  adcNegSelAPORT2YCH28 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH28,
617  adcNegSelAPORT2XCH29 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH29,
618  adcNegSelAPORT2YCH30 = _ADC_SINGLECTRL_NEGSEL_APORT2YCH30,
619  adcNegSelAPORT2XCH31 = _ADC_SINGLECTRL_NEGSEL_APORT2XCH31,
620  adcNegSelAPORT3XCH0 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH0,
621  adcNegSelAPORT3YCH1 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH1,
622  adcNegSelAPORT3XCH2 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH2,
623  adcNegSelAPORT3YCH3 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH3,
624  adcNegSelAPORT3XCH4 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH4,
625  adcNegSelAPORT3YCH5 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH5,
626  adcNegSelAPORT3XCH6 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH6,
627  adcNegSelAPORT3YCH7 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH7,
628  adcNegSelAPORT3XCH8 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH8,
629  adcNegSelAPORT3YCH9 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH9,
630  adcNegSelAPORT3XCH10 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH10,
631  adcNegSelAPORT3YCH11 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH11,
632  adcNegSelAPORT3XCH12 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH12,
633  adcNegSelAPORT3YCH13 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH13,
634  adcNegSelAPORT3XCH14 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH14,
635  adcNegSelAPORT3YCH15 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH15,
636  adcNegSelAPORT3XCH16 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH16,
637  adcNegSelAPORT3YCH17 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH17,
638  adcNegSelAPORT3XCH18 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH18,
639  adcNegSelAPORT3YCH19 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH19,
640  adcNegSelAPORT3XCH20 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH20,
641  adcNegSelAPORT3YCH21 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH21,
642  adcNegSelAPORT3XCH22 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH22,
643  adcNegSelAPORT3YCH23 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH23,
644  adcNegSelAPORT3XCH24 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH24,
645  adcNegSelAPORT3YCH25 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH25,
646  adcNegSelAPORT3XCH26 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH26,
647  adcNegSelAPORT3YCH27 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH27,
648  adcNegSelAPORT3XCH28 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH28,
649  adcNegSelAPORT3YCH29 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH29,
650  adcNegSelAPORT3XCH30 = _ADC_SINGLECTRL_NEGSEL_APORT3XCH30,
651  adcNegSelAPORT3YCH31 = _ADC_SINGLECTRL_NEGSEL_APORT3YCH31,
652  adcNegSelAPORT4YCH0 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH0,
653  adcNegSelAPORT4XCH1 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH1,
654  adcNegSelAPORT4YCH2 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH2,
655  adcNegSelAPORT4XCH3 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH3,
656  adcNegSelAPORT4YCH4 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH4,
657  adcNegSelAPORT4XCH5 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH5,
658  adcNegSelAPORT4YCH6 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH6,
659  adcNegSelAPORT4XCH7 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH7,
660  adcNegSelAPORT4YCH8 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH8,
661  adcNegSelAPORT4XCH9 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH9,
662  adcNegSelAPORT4YCH10 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH10,
663  adcNegSelAPORT4XCH11 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH11,
664  adcNegSelAPORT4YCH12 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH12,
665  adcNegSelAPORT4XCH13 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH13,
666  adcNegSelAPORT4YCH14 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH14,
667  adcNegSelAPORT4XCH15 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH15,
668  adcNegSelAPORT4YCH16 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH16,
669  adcNegSelAPORT4XCH17 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH17,
670  adcNegSelAPORT4YCH18 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH18,
671  adcNegSelAPORT4XCH19 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH19,
672  adcNegSelAPORT4YCH20 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH20,
673  adcNegSelAPORT4XCH21 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH21,
674  adcNegSelAPORT4YCH22 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH22,
675  adcNegSelAPORT4XCH23 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH23,
676  adcNegSelAPORT4YCH24 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH24,
677  adcNegSelAPORT4XCH25 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH25,
678  adcNegSelAPORT4YCH26 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH26,
679  adcNegSelAPORT4XCH27 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH27,
680  adcNegSelAPORT4YCH28 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH28,
681  adcNegSelAPORT4XCH29 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH29,
682  adcNegSelAPORT4YCH30 = _ADC_SINGLECTRL_NEGSEL_APORT4YCH30,
683  adcNegSelAPORT4XCH31 = _ADC_SINGLECTRL_NEGSEL_APORT4XCH31,
684  adcNegSelTESTN = _ADC_SINGLECTRL_NEGSEL_TESTN,
685  adcNegSelDEFAULT = _ADC_SINGLECTRL_NEGSEL_DEFAULT,
686  adcNegSelVSS = _ADC_SINGLECTRL_NEGSEL_VSS
687 } ADC_NegSel_TypeDef;
688 #endif
689 
690 
691 #if defined( _ADC_SCANINPUTSEL_MASK )
692  /* ADC scan input groups */
693 typedef enum
694 {
695  adcScanInputGroup0 = 0,
696  adcScanInputGroup1 = 1,
697  adcScanInputGroup2 = 2,
698  adcScanInputGroup3 = 3,
699 } ADC_ScanInputGroup_TypeDef;
700 
701 /* Define none selected for ADC_SCANINPUTSEL */
702 #define ADC_SCANINPUTSEL_GROUP_NONE 0xFFU
703 #define ADC_SCANINPUTSEL_NONE ((ADC_SCANINPUTSEL_GROUP_NONE \
704  << _ADC_SCANINPUTSEL_INPUT0TO7SEL_SHIFT) \
705  | (ADC_SCANINPUTSEL_GROUP_NONE \
706  << _ADC_SCANINPUTSEL_INPUT8TO15SEL_SHIFT) \
707  | (ADC_SCANINPUTSEL_GROUP_NONE \
708  << _ADC_SCANINPUTSEL_INPUT16TO23SEL_SHIFT) \
709  | (ADC_SCANINPUTSEL_GROUP_NONE \
710  << _ADC_SCANINPUTSEL_INPUT24TO31SEL_SHIFT))
711 
712  /* ADC scan alternative negative inputs */
713 typedef enum
714 {
715  adcScanNegInput1 = 1,
716  adcScanNegInput3 = 3,
717  adcScanNegInput5 = 5,
718  adcScanNegInput7 = 7,
719  adcScanNegInput8 = 8,
720  adcScanNegInput10 = 10,
721  adcScanNegInput12 = 12,
722  adcScanNegInput14 = 14,
723  adcScanNegInputDefault = 0xFF,
724 } ADC_ScanNegInput_TypeDef;
725 #endif
726 
727 
729 typedef enum
730 {
732  adcStartSingle = ADC_CMD_SINGLESTART,
733 
735  adcStartScan = ADC_CMD_SCANSTART,
736 
741  adcStartScanAndSingle = ADC_CMD_SCANSTART | ADC_CMD_SINGLESTART
742 } ADC_Start_TypeDef;
743 
744 
746 typedef enum
747 {
749  adcWarmupNormal = _ADC_CTRL_WARMUPMODE_NORMAL,
750 
751 #if defined( _ADC_CTRL_WARMUPMODE_FASTBG )
752 
753  adcWarmupFastBG = _ADC_CTRL_WARMUPMODE_FASTBG,
754 #endif
755 
756 #if defined( _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM )
757 
758  adcWarmupKeepScanRefWarm = _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM,
759 #endif
760 
761 #if defined( _ADC_CTRL_WARMUPMODE_KEEPINSTANDBY )
762 
764  adcWarmupKeepInStandby = _ADC_CTRL_WARMUPMODE_KEEPINSTANDBY,
765 #endif
766 
767 #if defined( _ADC_CTRL_WARMUPMODE_KEEPINSLOWACC )
768 
770  adcWarmupKeepInSlowAcq = _ADC_CTRL_WARMUPMODE_KEEPINSLOWACC,
771 #endif
772 
775  adcWarmupKeepADCWarm = _ADC_CTRL_WARMUPMODE_KEEPADCWARM,
776 
777 } ADC_Warmup_TypeDef;
778 
779 
780 #if defined( _ADC_CTRL_ADCCLKMODE_MASK )
781 
782 typedef enum
783 {
784  adcEm2Disabled = 0,
785  adcEm2ClockOnDemand = ADC_CTRL_ADCCLKMODE_ASYNC | ADC_CTRL_ASYNCCLKEN_ASNEEDED,
786  adcEm2ClockAlwaysOn = ADC_CTRL_ADCCLKMODE_ASYNC | ADC_CTRL_ASYNCCLKEN_ALWAYSON,
787 } ADC_EM2ClockConfig_TypeDef;
788 #endif
789 
790 
791 /*******************************************************************************
792  ******************************* STRUCTS ***********************************
793  ******************************************************************************/
794 
796 typedef struct
797 {
802  ADC_OvsRateSel_TypeDef ovsRateSel;
803 
804 #if defined( _ADC_CTRL_LPFMODE_MASK )
805 
806  ADC_LPFilter_TypeDef lpfMode;
807 #endif
808 
810  ADC_Warmup_TypeDef warmUpMode;
811 
819  uint8_t timebase;
820 
822  uint8_t prescale;
823 
825  bool tailgate;
826 
828 #if defined( _ADC_CTRL_ADCCLKMODE_MASK )
829  ADC_EM2ClockConfig_TypeDef em2ClockConfig;
830 #endif
831 } ADC_Init_TypeDef;
832 
833 
835 #if defined( _ADC_CTRL_LPFMODE_MASK ) && (!defined( _ADC_CTRL_ADCCLKMODE_MASK ))
836 #define ADC_INIT_DEFAULT \
837 { \
838  adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
839  adcLPFilterBypass, /* No input filter selected. */ \
840  adcWarmupNormal, /* ADC shutdown after each conversion. */ \
841  _ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
842  _ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
843  false /* Do not use tailgate. */ \
844 }
845 #elif (!defined( _ADC_CTRL_LPFMODE_MASK )) && (!defined( _ADC_CTRL_ADCCLKMODE_MASK ))
846 #define ADC_INIT_DEFAULT \
847 { \
848  adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
849  adcWarmupNormal, /* ADC shutdown after each conversion. */ \
850  _ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
851  _ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
852  false /* Do not use tailgate. */ \
853 }
854 #elif (!defined( _ADC_CTRL_LPFMODE_MASK )) && defined( _ADC_CTRL_ADCCLKMODE_MASK )
855 #define ADC_INIT_DEFAULT \
856 { \
857  adcOvsRateSel2, /* 2x oversampling (if enabled). */ \
858  adcWarmupNormal, /* ADC shutdown after each conversion. */ \
859  _ADC_CTRL_TIMEBASE_DEFAULT, /* Use HW default value. */ \
860  _ADC_CTRL_PRESC_DEFAULT, /* Use HW default value. */ \
861  false, /* Do not use tailgate. */ \
862  adcEm2Disabled /* ADC disabled in EM2 */ \
863 }
864 #endif
865 
866 
868 typedef struct
869 {
871  uint32_t scanInputSel;
872 
874  uint32_t scanInputEn;
875 
877  uint32_t scanNegSel;
878 } ADC_InitScanInput_TypeDef;
879 
880 
882 typedef struct
883 {
888  ADC_PRSSEL_TypeDef prsSel;
889 
891  ADC_AcqTime_TypeDef acqTime;
892 
897  ADC_Ref_TypeDef reference;
898 
900  ADC_Res_TypeDef resolution;
901 
902 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
903 
909  uint32_t input;
910 #endif
911 
912 #if defined( _ADC_SCANINPUTSEL_MASK )
913 
917  ADC_InitScanInput_TypeDef scanInputConfig;
918 #endif
919 
921  bool diff;
922 
924  bool prsEnable;
925 
927  bool leftAdjust;
928 
930  bool rep;
931 
933 #if defined( _ADC_CTRL_SCANDMAWU_MASK )
934  bool scanDmaEm2Wu;
935 #endif
936 
937 #if defined( _ADC_SCANCTRLX_FIFOOFACT_MASK )
938 
940  bool fifoOverwrite;
941 #endif
942 } ADC_InitScan_TypeDef;
943 
945 #if defined( _ADC_SCANCTRL_INPUTMASK_MASK )
946 #define ADC_INITSCAN_DEFAULT \
947 { \
948  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
949  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
950  adcRef1V25, /* 1.25V internal reference. */ \
951  adcRes12Bit, /* 12 bit resolution. */ \
952  0, /* No input selected. */ \
953  false, /* Single-ended input. */ \
954  false, /* PRS disabled. */ \
955  false, /* Right adjust. */ \
956  false, /* Deactivate conversion after one scan sequence. */ \
957 }
958 #endif
959 
960 #if defined( _ADC_SCANINPUTSEL_MASK )
961 #define ADC_INITSCAN_DEFAULT \
962 { \
963  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
964  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
965  adcRef1V25, /* 1.25V internal reference. */ \
966  adcRes12Bit, /* 12 bit resolution. */ \
967  { \
968  /* Initialization should match values set by @ref ADC_ScanInputClear() */ \
969  ADC_SCANINPUTSEL_NONE, /* Default ADC inputs */ \
970  0, /* Default input mask (all off) */ \
971  _ADC_SCANNEGSEL_RESETVALUE,/* Default negative select for positive ternimal */\
972  }, \
973  false, /* Single-ended input. */ \
974  false, /* PRS disabled. */ \
975  false, /* Right adjust. */ \
976  false, /* Deactivate conversion after one scan sequence. */ \
977  false, /* No EM2 DMA wakeup from scan FIFO DVL */ \
978  false /* Discard new data on full FIFO. */ \
979 }
980 #endif
981 
982 
984 typedef struct
985 {
990  ADC_PRSSEL_TypeDef prsSel;
991 
993  ADC_AcqTime_TypeDef acqTime;
994 
999  ADC_Ref_TypeDef reference;
1000 
1002  ADC_Res_TypeDef resolution;
1003 
1004 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
1005 
1009  ADC_SingleInput_TypeDef input;
1010 #endif
1011 
1012 #if defined( _ADC_SINGLECTRL_POSSEL_MASK )
1013 
1014  ADC_PosSel_TypeDef posSel;
1015 #endif
1016 
1017 #if defined( _ADC_SINGLECTRL_NEGSEL_MASK )
1018 
1020  ADC_NegSel_TypeDef negSel;
1021 #endif
1022 
1024  bool diff;
1025 
1027  bool prsEnable;
1028 
1030  bool leftAdjust;
1031 
1033  bool rep;
1034 
1035 #if defined( _ADC_CTRL_SINGLEDMAWU_MASK )
1036 
1037  bool singleDmaEm2Wu;
1038 #endif
1039 
1040 #if defined( _ADC_SINGLECTRLX_FIFOOFACT_MASK )
1041 
1043  bool fifoOverwrite;
1044 #endif
1045 } ADC_InitSingle_TypeDef;
1046 
1048 #if defined( _ADC_SINGLECTRL_INPUTSEL_MASK )
1049 #define ADC_INITSINGLE_DEFAULT \
1050 { \
1051  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
1052  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
1053  adcRef1V25, /* 1.25V internal reference. */ \
1054  adcRes12Bit, /* 12 bit resolution. */ \
1055  adcSingleInpCh0, /* CH0 input selected. */ \
1056  false, /* Single ended input. */ \
1057  false, /* PRS disabled. */ \
1058  false, /* Right adjust. */ \
1059  false /* Deactivate conversion after one scan sequence. */ \
1060 }
1061 #else
1062 #define ADC_INITSINGLE_DEFAULT \
1063 { \
1064  adcPRSSELCh0, /* PRS ch0 (if enabled). */ \
1065  adcAcqTime1, /* 1 ADC_CLK cycle acquisition time. */ \
1066  adcRef1V25, /* 1.25V internal reference. */ \
1067  adcRes12Bit, /* 12 bit resolution. */ \
1068  adcPosSelAPORT0XCH0, /* Select node BUS0XCH0 as posSel */ \
1069  adcNegSelVSS, /* Select VSS as negSel */ \
1070  false, /* Single ended input. */ \
1071  false, /* PRS disabled. */ \
1072  false, /* Right adjust. */ \
1073  false, /* Deactivate conversion after one scan sequence. */ \
1074  false, /* No EM2 DMA wakeup from single FIFO DVL */ \
1075  false /* Discard new data on full FIFO. */ \
1076 }
1077 #endif
1078 
1079 /*******************************************************************************
1080  ***************************** PROTOTYPES **********************************
1081  ******************************************************************************/
1082 
1083 /***************************************************************************/
1096 __STATIC_INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
1097 {
1098  return adc->SINGLEDATA;
1099 }
1100 
1101 
1102 /***************************************************************************/
1115 __STATIC_INLINE uint32_t ADC_DataSinglePeek(ADC_TypeDef *adc)
1116 {
1117  return adc->SINGLEDATAP;
1118 }
1119 
1120 
1121 /***************************************************************************/
1134 __STATIC_INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
1135 {
1136  return adc->SCANDATA;
1137 }
1138 
1139 
1140 /***************************************************************************/
1153 __STATIC_INLINE uint32_t ADC_DataScanPeek(ADC_TypeDef *adc)
1154 {
1155  return adc->SCANDATAP;
1156 }
1157 
1158 
1159 #if defined( _ADC_SCANDATAX_MASK )
1160 uint32_t ADC_DataIdScanGet(ADC_TypeDef *adc, uint32_t *scanId);
1161 #endif
1162 
1163 void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init);
1164 void ADC_Reset(ADC_TypeDef *adc);
1165 void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init);
1166 
1167 #if defined( _ADC_SCANINPUTSEL_MASK )
1168 void ADC_ScanInputClear(ADC_InitScan_TypeDef *scanInit);
1169 uint32_t ADC_ScanSingleEndedInputAdd(ADC_InitScan_TypeDef *scanInit,
1170  ADC_ScanInputGroup_TypeDef inputGroup,
1171  ADC_PosSel_TypeDef singleEndedSel);
1172 uint32_t ADC_ScanDifferentialInputAdd(ADC_InitScan_TypeDef *scanInit,
1173  ADC_ScanInputGroup_TypeDef inputGroup,
1174  ADC_PosSel_TypeDef posSel,
1175  ADC_ScanNegInput_TypeDef adcScanNegInput);
1176 #endif
1177 
1178 void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init);
1179 uint8_t ADC_TimebaseCalc(uint32_t hfperFreq);
1180 uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq);
1181 
1182 
1183 /***************************************************************************/
1194 __STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
1195 {
1196  adc->IFC = flags;
1197 }
1198 
1199 
1200 /***************************************************************************/
1211 __STATIC_INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
1212 {
1213  adc->IEN &= ~flags;
1214 }
1215 
1216 
1217 /***************************************************************************/
1233 __STATIC_INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
1234 {
1235  adc->IEN |= flags;
1236 }
1237 
1238 
1239 /***************************************************************************/
1253 __STATIC_INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
1254 {
1255  return adc->IF;
1256 }
1257 
1258 
1259 /***************************************************************************/
1278 __STATIC_INLINE uint32_t ADC_IntGetEnabled(ADC_TypeDef *adc)
1279 {
1280  uint32_t ien;
1281 
1282  /* Store ADCx->IEN in temporary variable in order to define explicit order
1283  * of volatile accesses. */
1284  ien = adc->IEN;
1285 
1286  /* Bitwise AND of pending and enabled interrupts */
1287  return adc->IF & ien;
1288 }
1289 
1290 
1291 /***************************************************************************/
1302 __STATIC_INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
1303 {
1304  adc->IFS = flags;
1305 }
1306 
1307 
1308 /***************************************************************************/
1318 __STATIC_INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
1319 {
1320  adc->CMD = (uint32_t)cmd;
1321 }
1322 
1323 
1327 #ifdef __cplusplus
1328 }
1329 #endif
1330 
1331 #endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */
1332 #endif /* EM_ADC_H */
ADC_LPFilter_TypeDef
ADC_LPFilter_TypeDef
Definition: em_adc.h:75
ADC_TypeDef::SINGLEDATAP
__IM uint32_t SINGLEDATAP
Definition: ezr32wg_adc.h:54
adcRefExtSingle
Definition: em_adc.h:211
adcSingleInputCh7
Definition: em_adc.h:288
adcSingleInputTemp
Definition: em_adc.h:289
_ADC_SINGLECTRL_AT_64CYCLES
#define _ADC_SINGLECTRL_AT_64CYCLES
Definition: ezr32wg_adc.h:324
ADC_CMD_SCANSTART
#define ADC_CMD_SCANSTART
Definition: ezr32wg_adc.h:149
adcPRSSELCh5
Definition: em_adc.h:141
adcOvsRateSel4
Definition: em_adc.h:95
ADC_InitSingle_TypeDef::prsEnable
bool prsEnable
Definition: em_adc.h:1027
ADC_InitSingle_TypeDef::diff
bool diff
Definition: em_adc.h:1024
ADC_InitScan_TypeDef
Definition: em_adc.h:882
_ADC_CTRL_OVSRSEL_X128
#define _ADC_CTRL_OVSRSEL_X128
Definition: ezr32wg_adc.h:116
adcPRSSELCh11
Definition: em_adc.h:159
_ADC_SINGLECTRL_PRSSEL_PRSCH8
#define _ADC_SINGLECTRL_PRSSEL_PRSCH8
Definition: ezr32wg_adc.h:353
adcOvsRateSel128
Definition: em_adc.h:110
_ADC_CTRL_OVSRSEL_X2
#define _ADC_CTRL_OVSRSEL_X2
Definition: ezr32wg_adc.h:110
_ADC_CTRL_OVSRSEL_X512
#define _ADC_CTRL_OVSRSEL_X512
Definition: ezr32wg_adc.h:118
_ADC_CTRL_OVSRSEL_X4096
#define _ADC_CTRL_OVSRSEL_X4096
Definition: ezr32wg_adc.h:121
adcPRSSELCh8
Definition: em_adc.h:150
adcSingleInputCh6
Definition: em_adc.h:287
adcOvsRateSel2
Definition: em_adc.h:92
ADC_DataSinglePeek
__STATIC_INLINE uint32_t ADC_DataSinglePeek(ADC_TypeDef *adc)
Peek single conversion result.
Definition: em_adc.h:1115
adcResOVS
Definition: em_adc.h:272
adcSingleInputDACOut1
Definition: em_adc.h:295
ADC_InitScan_TypeDef::input
uint32_t input
Definition: em_adc.h:909
_ADC_SINGLECTRL_RES_8BIT
#define _ADC_SINGLECTRL_RES_8BIT
Definition: ezr32wg_adc.h:245
ADC_DataScanPeek
__STATIC_INLINE uint32_t ADC_DataScanPeek(ADC_TypeDef *adc)
Peek scan result.
Definition: em_adc.h:1153
ADC_TypeDef
Definition: ezr32wg_adc.h:41
adcPRSSELCh3
Definition: em_adc.h:136
_ADC_SINGLECTRL_INPUTSEL_CH2CH3
#define _ADC_SINGLECTRL_INPUTSEL_CH2CH3
Definition: ezr32wg_adc.h:259
adcOvsRateSel4096
Definition: em_adc.h:125
adcAcqTime256
Definition: em_adc.h:70
adcStartSingle
Definition: em_adc.h:732
ADC_TypeDef::IF
__IM uint32_t IF
Definition: ezr32wg_adc.h:49
ADC_Reset
void ADC_Reset(ADC_TypeDef *adc)
Reset ADC to same state as after a HW reset.
Definition: em_adc.c:1066
ADC_Init_TypeDef::timebase
uint8_t timebase
Definition: em_adc.h:819
_ADC_SINGLECTRL_PRSSEL_PRSCH10
#define _ADC_SINGLECTRL_PRSSEL_PRSCH10
Definition: ezr32wg_adc.h:355
_ADC_CTRL_WARMUPMODE_KEEPADCWARM
#define _ADC_CTRL_WARMUPMODE_KEEPADCWARM
Definition: ezr32wg_adc.h:76
adcStartScan
Definition: em_adc.h:735
_ADC_CTRL_OVSRSEL_X256
#define _ADC_CTRL_OVSRSEL_X256
Definition: ezr32wg_adc.h:117
ADC_InitSingle_TypeDef::acqTime
ADC_AcqTime_TypeDef acqTime
Definition: em_adc.h:993
adcSingleInputATEST
Definition: em_adc.h:296
ADC_InitScanInput_TypeDef::scanInputEn
uint32_t scanInputEn
Definition: em_adc.h:874
_ADC_SINGLECTRL_PRSSEL_PRSCH6
#define _ADC_SINGLECTRL_PRSSEL_PRSCH6
Definition: ezr32wg_adc.h:351
adcSingleInputDiff0
Definition: em_adc.h:303
_ADC_SINGLECTRL_PRSSEL_PRSCH0
#define _ADC_SINGLECTRL_PRSSEL_PRSCH0
Definition: ezr32wg_adc.h:345
ADC_AcqTime_TypeDef
ADC_AcqTime_TypeDef
Definition: em_adc.h:60
adcRef2xExtDiff
Definition: em_adc.h:214
_ADC_SINGLECTRL_PRSSEL_PRSCH11
#define _ADC_SINGLECTRL_PRSSEL_PRSCH11
Definition: ezr32wg_adc.h:356
adcSingleInputCh5
Definition: em_adc.h:286
ADC_IntClear
__STATIC_INLINE void ADC_IntClear(ADC_TypeDef *adc, uint32_t flags)
Clear one or more pending ADC interrupts.
Definition: em_adc.h:1194
em_device.h
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
_ADC_CTRL_OVSRSEL_X16
#define _ADC_CTRL_OVSRSEL_X16
Definition: ezr32wg_adc.h:113
adcPRSSELCh7
Definition: em_adc.h:147
adcAcqTime64
Definition: em_adc.h:68
_ADC_SINGLECTRL_REF_5VDIFF
#define _ADC_SINGLECTRL_REF_5VDIFF
Definition: ezr32wg_adc.h:303
_ADC_SINGLECTRL_AT_1CYCLE
#define _ADC_SINGLECTRL_AT_1CYCLE
Definition: ezr32wg_adc.h:318
adcRes8Bit
Definition: em_adc.h:270
adcOvsRateSel64
Definition: em_adc.h:107
adcOvsRateSel1024
Definition: em_adc.h:119
ADC_DataSingleGet
__STATIC_INLINE uint32_t ADC_DataSingleGet(ADC_TypeDef *adc)
Get single conversion result.
Definition: em_adc.h:1096
_ADC_SINGLECTRL_PRSSEL_PRSCH9
#define _ADC_SINGLECTRL_PRSSEL_PRSCH9
Definition: ezr32wg_adc.h:354
ADC_InitSingle_TypeDef::input
ADC_SingleInput_TypeDef input
Definition: em_adc.h:1009
_ADC_SINGLECTRL_AT_256CYCLES
#define _ADC_SINGLECTRL_AT_256CYCLES
Definition: ezr32wg_adc.h:326
adcPRSSELCh1
Definition: em_adc.h:134
ADC_InitScanInput_TypeDef
Definition: em_adc.h:868
ADC_InitScan_TypeDef::diff
bool diff
Definition: em_adc.h:921
adcOvsRateSel8
Definition: em_adc.h:98
ADC_CMD_SINGLESTART
#define ADC_CMD_SINGLESTART
Definition: ezr32wg_adc.h:139
adcPRSSELCh9
Definition: em_adc.h:153
ADC_Init_TypeDef::tailgate
bool tailgate
Definition: em_adc.h:825
ADC_OvsRateSel_TypeDef
ADC_OvsRateSel_TypeDef
Definition: em_adc.h:89
_ADC_SINGLECTRL_REF_2XEXTDIFF
#define _ADC_SINGLECTRL_REF_2XEXTDIFF
Definition: ezr32wg_adc.h:305
ADC_InitSingle_TypeDef::leftAdjust
bool leftAdjust
Definition: em_adc.h:1030
_ADC_SINGLECTRL_INPUTSEL_CH6CH7
#define _ADC_SINGLECTRL_INPUTSEL_CH6CH7
Definition: ezr32wg_adc.h:262
adcWarmupFastBG
Definition: em_adc.h:753
ADC_InitScanInput_TypeDef::scanNegSel
uint32_t scanNegSel
Definition: em_adc.h:877
adcOvsRateSel256
Definition: em_adc.h:113
adcSingleInputCh0
Definition: em_adc.h:281
ADC_InitSingle_TypeDef::prsSel
ADC_PRSSEL_TypeDef prsSel
Definition: em_adc.h:990
ADC_TypeDef::IFC
__IOM uint32_t IFC
Definition: ezr32wg_adc.h:51
ADC_Init_TypeDef
Definition: em_adc.h:796
adcSingleInputCh2
Definition: em_adc.h:283
ADC_InitScanInput_TypeDef::scanInputSel
uint32_t scanInputSel
Definition: em_adc.h:871
adcSingleInputVrefDiv2
Definition: em_adc.h:293
ADC_IntSet
__STATIC_INLINE void ADC_IntSet(ADC_TypeDef *adc, uint32_t flags)
Set one or more pending ADC interrupts from SW.
Definition: em_adc.h:1302
_ADC_SINGLECTRL_INPUTSEL_CH7
#define _ADC_SINGLECTRL_INPUTSEL_CH7
Definition: ezr32wg_adc.h:268
adcRef2xVDD
Definition: em_adc.h:217
_ADC_SINGLECTRL_INPUTSEL_DAC0OUT1
#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT1
Definition: ezr32wg_adc.h:275
ADC_TypeDef::IFS
__IOM uint32_t IFS
Definition: ezr32wg_adc.h:50
adcSingleInputCh4
Definition: em_adc.h:285
_ADC_SINGLECTRL_INPUTSEL_VREFDIV2
#define _ADC_SINGLECTRL_INPUTSEL_VREFDIV2
Definition: ezr32wg_adc.h:273
_ADC_CTRL_OVSRSEL_X32
#define _ADC_CTRL_OVSRSEL_X32
Definition: ezr32wg_adc.h:114
adcPRSSELCh2
Definition: em_adc.h:135
adcPRSSELCh6
Definition: em_adc.h:144
_ADC_SINGLECTRL_AT_8CYCLES
#define _ADC_SINGLECTRL_AT_8CYCLES
Definition: ezr32wg_adc.h:321
ADC_SingleInput_TypeDef
ADC_SingleInput_TypeDef
Definition: em_adc.h:278
_ADC_SINGLECTRL_INPUTSEL_CH3
#define _ADC_SINGLECTRL_INPUTSEL_CH3
Definition: ezr32wg_adc.h:263
adcLPFilterRC
Definition: em_adc.h:81
_ADC_SINGLECTRL_REF_VDD
#define _ADC_SINGLECTRL_REF_VDD
Definition: ezr32wg_adc.h:302
ADC_IntEnable
__STATIC_INLINE void ADC_IntEnable(ADC_TypeDef *adc, uint32_t flags)
Enable one or more ADC interrupts.
Definition: em_adc.h:1233
_ADC_SINGLECTRL_RES_OVS
#define _ADC_SINGLECTRL_RES_OVS
Definition: ezr32wg_adc.h:247
ADC_Init
void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init)
Initialize ADC.
Definition: em_adc.c:371
ADC_Res_TypeDef
ADC_Res_TypeDef
Definition: em_adc.h:267
adcAcqTime32
Definition: em_adc.h:67
adcSingleInputCh1
Definition: em_adc.h:282
ADC_InitScan_TypeDef::prsSel
ADC_PRSSEL_TypeDef prsSel
Definition: em_adc.h:888
adcPRSSELCh4
Definition: em_adc.h:138
adcWarmupKeepADCWarm
Definition: em_adc.h:775
ADC_InitSingle_TypeDef::rep
bool rep
Definition: em_adc.h:1033
_ADC_SINGLECTRL_PRSSEL_PRSCH3
#define _ADC_SINGLECTRL_PRSSEL_PRSCH3
Definition: ezr32wg_adc.h:348
adcSingleInputVDD
Definition: em_adc.h:291
_ADC_CTRL_OVSRSEL_X64
#define _ADC_CTRL_OVSRSEL_X64
Definition: ezr32wg_adc.h:115
ADC_InitSingle_TypeDef
Definition: em_adc.h:984
_ADC_SINGLECTRL_INPUTSEL_CH0
#define _ADC_SINGLECTRL_INPUTSEL_CH0
Definition: ezr32wg_adc.h:256
_ADC_SINGLECTRL_INPUTSEL_VDDDIV3
#define _ADC_SINGLECTRL_INPUTSEL_VDDDIV3
Definition: ezr32wg_adc.h:270
_ADC_SINGLECTRL_RES_6BIT
#define _ADC_SINGLECTRL_RES_6BIT
Definition: ezr32wg_adc.h:246
adcRefVDD
Definition: em_adc.h:198
ADC_TimebaseCalc
uint8_t ADC_TimebaseCalc(uint32_t hfperFreq)
Calculate timebase value in order to get a timebase providing at least 1us.
Definition: em_adc.c:1118
_ADC_SINGLECTRL_AT_16CYCLES
#define _ADC_SINGLECTRL_AT_16CYCLES
Definition: ezr32wg_adc.h:322
_ADC_CTRL_OVSRSEL_X2048
#define _ADC_CTRL_OVSRSEL_X2048
Definition: ezr32wg_adc.h:120
adcSingleInputCh2Ch3
Definition: em_adc.h:300
adcSingleInputVSS
Definition: em_adc.h:292
ADC_TypeDef::IEN
__IOM uint32_t IEN
Definition: ezr32wg_adc.h:48
adcRes12Bit
Definition: em_adc.h:269
adcSingleInputDACOut0
Definition: em_adc.h:294
adcAcqTime128
Definition: em_adc.h:69
_ADC_SINGLECTRL_INPUTSEL_TEMP
#define _ADC_SINGLECTRL_INPUTSEL_TEMP
Definition: ezr32wg_adc.h:269
_ADC_SINGLECTRL_INPUTSEL_CH6
#define _ADC_SINGLECTRL_INPUTSEL_CH6
Definition: ezr32wg_adc.h:267
ADC_InitSingle_TypeDef::resolution
ADC_Res_TypeDef resolution
Definition: em_adc.h:1002
_ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM
#define _ADC_CTRL_WARMUPMODE_KEEPSCANREFWARM
Definition: ezr32wg_adc.h:75
_ADC_SINGLECTRL_INPUTSEL_CH4
#define _ADC_SINGLECTRL_INPUTSEL_CH4
Definition: ezr32wg_adc.h:264
_ADC_CTRL_WARMUPMODE_NORMAL
#define _ADC_CTRL_WARMUPMODE_NORMAL
Definition: ezr32wg_adc.h:73
ADC_Init_TypeDef::prescale
uint8_t prescale
Definition: em_adc.h:822
adcOvsRateSel32
Definition: em_adc.h:104
ADC_IntDisable
__STATIC_INLINE void ADC_IntDisable(ADC_TypeDef *adc, uint32_t flags)
Disable one or more ADC interrupts.
Definition: em_adc.h:1211
_ADC_SINGLECTRL_INPUTSEL_VSS
#define _ADC_SINGLECTRL_INPUTSEL_VSS
Definition: ezr32wg_adc.h:272
_ADC_CTRL_LPFMODE_BYPASS
#define _ADC_CTRL_LPFMODE_BYPASS
Definition: ezr32wg_adc.h:90
adcSingleInputCh4Ch5
Definition: em_adc.h:301
ADC_InitSingle
void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init)
Initialize single ADC sample conversion.
Definition: em_adc.c:854
_ADC_SINGLECTRL_INPUTSEL_CH1
#define _ADC_SINGLECTRL_INPUTSEL_CH1
Definition: ezr32wg_adc.h:258
_ADC_CTRL_OVSRSEL_X4
#define _ADC_CTRL_OVSRSEL_X4
Definition: ezr32wg_adc.h:111
adcRef1V25
Definition: em_adc.h:192
_ADC_CTRL_OVSRSEL_X1024
#define _ADC_CTRL_OVSRSEL_X1024
Definition: ezr32wg_adc.h:119
adcLPFilterDeCap
Definition: em_adc.h:84
adcRef5VDIFF
Definition: em_adc.h:202
ADC_TypeDef::SCANDATAP
__IM uint32_t SCANDATAP
Definition: ezr32wg_adc.h:55
_ADC_SINGLECTRL_PRSSEL_PRSCH5
#define _ADC_SINGLECTRL_PRSSEL_PRSCH5
Definition: ezr32wg_adc.h:350
adcAcqTime16
Definition: em_adc.h:66
ADC_Warmup_TypeDef
ADC_Warmup_TypeDef
Definition: em_adc.h:746
_ADC_SINGLECTRL_REF_1V25
#define _ADC_SINGLECTRL_REF_1V25
Definition: ezr32wg_adc.h:300
adcRef2V5
Definition: em_adc.h:195
_ADC_CTRL_LPFMODE_RCFILT
#define _ADC_CTRL_LPFMODE_RCFILT
Definition: ezr32wg_adc.h:92
_ADC_SINGLECTRL_REF_2V5
#define _ADC_SINGLECTRL_REF_2V5
Definition: ezr32wg_adc.h:301
_ADC_SINGLECTRL_INPUTSEL_CH0CH1
#define _ADC_SINGLECTRL_INPUTSEL_CH0CH1
Definition: ezr32wg_adc.h:257
adcPRSSELCh10
Definition: em_adc.h:156
_ADC_SINGLECTRL_REF_EXTSINGLE
#define _ADC_SINGLECTRL_REF_EXTSINGLE
Definition: ezr32wg_adc.h:304
_ADC_SINGLECTRL_PRSSEL_PRSCH1
#define _ADC_SINGLECTRL_PRSSEL_PRSCH1
Definition: ezr32wg_adc.h:346
_ADC_SINGLECTRL_INPUTSEL_CH4CH5
#define _ADC_SINGLECTRL_INPUTSEL_CH4CH5
Definition: ezr32wg_adc.h:261
adcSingleInputVDDDiv3
Definition: em_adc.h:290
adcAcqTime1
Definition: em_adc.h:62
adcWarmupKeepScanRefWarm
Definition: em_adc.h:758
adcRes6Bit
Definition: em_adc.h:271
_ADC_CTRL_WARMUPMODE_FASTBG
#define _ADC_CTRL_WARMUPMODE_FASTBG
Definition: ezr32wg_adc.h:74
adcLPFilterBypass
Definition: em_adc.h:78
ADC_PrescaleCalc
uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq)
Calculate prescaler value used to determine ADC clock.
Definition: em_adc.c:1025
adcSingleInputCh6Ch7
Definition: em_adc.h:302
ADC_Start
__STATIC_INLINE void ADC_Start(ADC_TypeDef *adc, ADC_Start_TypeDef cmd)
Start scan sequence and/or single conversion.
Definition: em_adc.h:1318
ADC_Init_TypeDef::lpfMode
ADC_LPFilter_TypeDef lpfMode
Definition: em_adc.h:806
adcOvsRateSel2048
Definition: em_adc.h:122
ADC_InitScan
void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init)
Initialize ADC scan sequence.
Definition: em_adc.c:710
_ADC_SINGLECTRL_INPUTSEL_DAC0OUT0
#define _ADC_SINGLECTRL_INPUTSEL_DAC0OUT0
Definition: ezr32wg_adc.h:274
ADC_InitScan_TypeDef::prsEnable
bool prsEnable
Definition: em_adc.h:924
ADC_DataScanGet
__STATIC_INLINE uint32_t ADC_DataScanGet(ADC_TypeDef *adc)
Get scan result.
Definition: em_adc.h:1134
_ADC_CTRL_OVSRSEL_X8
#define _ADC_CTRL_OVSRSEL_X8
Definition: ezr32wg_adc.h:112
ADC_InitScan_TypeDef::leftAdjust
bool leftAdjust
Definition: em_adc.h:927
ADC_TypeDef::SCANDATA
__IM uint32_t SCANDATA
Definition: ezr32wg_adc.h:53
adcWarmupNormal
Definition: em_adc.h:749
_ADC_SINGLECTRL_INPUTSEL_VDD
#define _ADC_SINGLECTRL_INPUTSEL_VDD
Definition: ezr32wg_adc.h:271
ADC_InitSingle_TypeDef::reference
ADC_Ref_TypeDef reference
Definition: em_adc.h:999
_ADC_SINGLECTRL_PRSSEL_PRSCH4
#define _ADC_SINGLECTRL_PRSSEL_PRSCH4
Definition: ezr32wg_adc.h:349
_ADC_SINGLECTRL_INPUTSEL_CH2
#define _ADC_SINGLECTRL_INPUTSEL_CH2
Definition: ezr32wg_adc.h:260
_ADC_SINGLECTRL_AT_2CYCLES
#define _ADC_SINGLECTRL_AT_2CYCLES
Definition: ezr32wg_adc.h:319
ADC_Init_TypeDef::ovsRateSel
ADC_OvsRateSel_TypeDef ovsRateSel
Definition: em_adc.h:802
adcAcqTime4
Definition: em_adc.h:64
adcAcqTime8
Definition: em_adc.h:65
ADC_TypeDef::CMD
__IOM uint32_t CMD
Definition: ezr32wg_adc.h:44
ADC_Start_TypeDef
ADC_Start_TypeDef
Definition: em_adc.h:729
_ADC_CTRL_LPFMODE_DECAP
#define _ADC_CTRL_LPFMODE_DECAP
Definition: ezr32wg_adc.h:91
adcSingleInputCh0Ch1
Definition: em_adc.h:299
adcOvsRateSel16
Definition: em_adc.h:101
_ADC_SINGLECTRL_RES_12BIT
#define _ADC_SINGLECTRL_RES_12BIT
Definition: ezr32wg_adc.h:244
ADC_InitScan_TypeDef::rep
bool rep
Definition: em_adc.h:930
ADC_InitScan_TypeDef::reference
ADC_Ref_TypeDef reference
Definition: em_adc.h:897
_ADC_SINGLECTRL_AT_128CYCLES
#define _ADC_SINGLECTRL_AT_128CYCLES
Definition: ezr32wg_adc.h:325
ADC_IntGet
__STATIC_INLINE uint32_t ADC_IntGet(ADC_TypeDef *adc)
Get pending ADC interrupt flags.
Definition: em_adc.h:1253
adcStartScanAndSingle
Definition: em_adc.h:741
ADC_InitScan_TypeDef::resolution
ADC_Res_TypeDef resolution
Definition: em_adc.h:900
ADC_IntGetEnabled
__STATIC_INLINE uint32_t ADC_IntGetEnabled(ADC_TypeDef *adc)
Get enabled and pending ADC interrupt flags. Useful for handling more interrupt sources in the same i...
Definition: em_adc.h:1278
_ADC_SINGLECTRL_INPUTSEL_CH5
#define _ADC_SINGLECTRL_INPUTSEL_CH5
Definition: ezr32wg_adc.h:266
ADC_Ref_TypeDef
ADC_Ref_TypeDef
Definition: em_adc.h:189
ADC_TypeDef::SINGLEDATA
__IM uint32_t SINGLEDATA
Definition: ezr32wg_adc.h:52
_ADC_SINGLECTRL_PRSSEL_PRSCH7
#define _ADC_SINGLECTRL_PRSSEL_PRSCH7
Definition: ezr32wg_adc.h:352
adcSingleInputCh3
Definition: em_adc.h:284
_ADC_SINGLECTRL_PRSSEL_PRSCH2
#define _ADC_SINGLECTRL_PRSSEL_PRSCH2
Definition: ezr32wg_adc.h:347
_ADC_SINGLECTRL_REF_2XVDD
#define _ADC_SINGLECTRL_REF_2XVDD
Definition: ezr32wg_adc.h:306
ADC_InitScan_TypeDef::acqTime
ADC_AcqTime_TypeDef acqTime
Definition: em_adc.h:891
ADC_Init_TypeDef::warmUpMode
ADC_Warmup_TypeDef warmUpMode
Definition: em_adc.h:810
adcOvsRateSel512
Definition: em_adc.h:116
adcPRSSELCh0
Definition: em_adc.h:133
_ADC_SINGLECTRL_AT_4CYCLES
#define _ADC_SINGLECTRL_AT_4CYCLES
Definition: ezr32wg_adc.h:320
ADC_PRSSEL_TypeDef
ADC_PRSSEL_TypeDef
Definition: em_adc.h:130
adcAcqTime2
Definition: em_adc.h:63
_ADC_SINGLECTRL_AT_32CYCLES
#define _ADC_SINGLECTRL_AT_32CYCLES
Definition: ezr32wg_adc.h:323