EZR32 Happy Gecko Software Documentation  ezr32hg-doc-5.1.2
ezr32hg_timer.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t CMD;
45  __IM uint32_t STATUS;
46  __IOM uint32_t IEN;
47  __IM uint32_t IF;
48  __IOM uint32_t IFS;
49  __IOM uint32_t IFC;
50  __IOM uint32_t TOP;
51  __IOM uint32_t TOPB;
52  __IOM uint32_t CNT;
53  __IOM uint32_t ROUTE;
55  uint32_t RESERVED0[1];
58  uint32_t RESERVED1[4];
59  __IOM uint32_t DTCTRL;
60  __IOM uint32_t DTTIME;
61  __IOM uint32_t DTFC;
62  __IOM uint32_t DTOGEN;
63  __IM uint32_t DTFAULT;
64  __OM uint32_t DTFAULTC;
65  __IOM uint32_t DTLOCK;
66 } TIMER_TypeDef;
68 /**************************************************************************/
73 /* Bit fields for TIMER CTRL */
74 #define _TIMER_CTRL_RESETVALUE 0x00000000UL
75 #define _TIMER_CTRL_MASK 0x3F032FFBUL
76 #define _TIMER_CTRL_MODE_SHIFT 0
77 #define _TIMER_CTRL_MODE_MASK 0x3UL
78 #define _TIMER_CTRL_MODE_DEFAULT 0x00000000UL
79 #define _TIMER_CTRL_MODE_UP 0x00000000UL
80 #define _TIMER_CTRL_MODE_DOWN 0x00000001UL
81 #define _TIMER_CTRL_MODE_UPDOWN 0x00000002UL
82 #define _TIMER_CTRL_MODE_QDEC 0x00000003UL
83 #define TIMER_CTRL_MODE_DEFAULT (_TIMER_CTRL_MODE_DEFAULT << 0)
84 #define TIMER_CTRL_MODE_UP (_TIMER_CTRL_MODE_UP << 0)
85 #define TIMER_CTRL_MODE_DOWN (_TIMER_CTRL_MODE_DOWN << 0)
86 #define TIMER_CTRL_MODE_UPDOWN (_TIMER_CTRL_MODE_UPDOWN << 0)
87 #define TIMER_CTRL_MODE_QDEC (_TIMER_CTRL_MODE_QDEC << 0)
88 #define TIMER_CTRL_SYNC (0x1UL << 3)
89 #define _TIMER_CTRL_SYNC_SHIFT 3
90 #define _TIMER_CTRL_SYNC_MASK 0x8UL
91 #define _TIMER_CTRL_SYNC_DEFAULT 0x00000000UL
92 #define TIMER_CTRL_SYNC_DEFAULT (_TIMER_CTRL_SYNC_DEFAULT << 3)
93 #define TIMER_CTRL_OSMEN (0x1UL << 4)
94 #define _TIMER_CTRL_OSMEN_SHIFT 4
95 #define _TIMER_CTRL_OSMEN_MASK 0x10UL
96 #define _TIMER_CTRL_OSMEN_DEFAULT 0x00000000UL
97 #define TIMER_CTRL_OSMEN_DEFAULT (_TIMER_CTRL_OSMEN_DEFAULT << 4)
98 #define TIMER_CTRL_QDM (0x1UL << 5)
99 #define _TIMER_CTRL_QDM_SHIFT 5
100 #define _TIMER_CTRL_QDM_MASK 0x20UL
101 #define _TIMER_CTRL_QDM_DEFAULT 0x00000000UL
102 #define _TIMER_CTRL_QDM_X2 0x00000000UL
103 #define _TIMER_CTRL_QDM_X4 0x00000001UL
104 #define TIMER_CTRL_QDM_DEFAULT (_TIMER_CTRL_QDM_DEFAULT << 5)
105 #define TIMER_CTRL_QDM_X2 (_TIMER_CTRL_QDM_X2 << 5)
106 #define TIMER_CTRL_QDM_X4 (_TIMER_CTRL_QDM_X4 << 5)
107 #define TIMER_CTRL_DEBUGRUN (0x1UL << 6)
108 #define _TIMER_CTRL_DEBUGRUN_SHIFT 6
109 #define _TIMER_CTRL_DEBUGRUN_MASK 0x40UL
110 #define _TIMER_CTRL_DEBUGRUN_DEFAULT 0x00000000UL
111 #define TIMER_CTRL_DEBUGRUN_DEFAULT (_TIMER_CTRL_DEBUGRUN_DEFAULT << 6)
112 #define TIMER_CTRL_DMACLRACT (0x1UL << 7)
113 #define _TIMER_CTRL_DMACLRACT_SHIFT 7
114 #define _TIMER_CTRL_DMACLRACT_MASK 0x80UL
115 #define _TIMER_CTRL_DMACLRACT_DEFAULT 0x00000000UL
116 #define TIMER_CTRL_DMACLRACT_DEFAULT (_TIMER_CTRL_DMACLRACT_DEFAULT << 7)
117 #define _TIMER_CTRL_RISEA_SHIFT 8
118 #define _TIMER_CTRL_RISEA_MASK 0x300UL
119 #define _TIMER_CTRL_RISEA_DEFAULT 0x00000000UL
120 #define _TIMER_CTRL_RISEA_NONE 0x00000000UL
121 #define _TIMER_CTRL_RISEA_START 0x00000001UL
122 #define _TIMER_CTRL_RISEA_STOP 0x00000002UL
123 #define _TIMER_CTRL_RISEA_RELOADSTART 0x00000003UL
124 #define TIMER_CTRL_RISEA_DEFAULT (_TIMER_CTRL_RISEA_DEFAULT << 8)
125 #define TIMER_CTRL_RISEA_NONE (_TIMER_CTRL_RISEA_NONE << 8)
126 #define TIMER_CTRL_RISEA_START (_TIMER_CTRL_RISEA_START << 8)
127 #define TIMER_CTRL_RISEA_STOP (_TIMER_CTRL_RISEA_STOP << 8)
128 #define TIMER_CTRL_RISEA_RELOADSTART (_TIMER_CTRL_RISEA_RELOADSTART << 8)
129 #define _TIMER_CTRL_FALLA_SHIFT 10
130 #define _TIMER_CTRL_FALLA_MASK 0xC00UL
131 #define _TIMER_CTRL_FALLA_DEFAULT 0x00000000UL
132 #define _TIMER_CTRL_FALLA_NONE 0x00000000UL
133 #define _TIMER_CTRL_FALLA_START 0x00000001UL
134 #define _TIMER_CTRL_FALLA_STOP 0x00000002UL
135 #define _TIMER_CTRL_FALLA_RELOADSTART 0x00000003UL
136 #define TIMER_CTRL_FALLA_DEFAULT (_TIMER_CTRL_FALLA_DEFAULT << 10)
137 #define TIMER_CTRL_FALLA_NONE (_TIMER_CTRL_FALLA_NONE << 10)
138 #define TIMER_CTRL_FALLA_START (_TIMER_CTRL_FALLA_START << 10)
139 #define TIMER_CTRL_FALLA_STOP (_TIMER_CTRL_FALLA_STOP << 10)
140 #define TIMER_CTRL_FALLA_RELOADSTART (_TIMER_CTRL_FALLA_RELOADSTART << 10)
141 #define TIMER_CTRL_X2CNT (0x1UL << 13)
142 #define _TIMER_CTRL_X2CNT_SHIFT 13
143 #define _TIMER_CTRL_X2CNT_MASK 0x2000UL
144 #define _TIMER_CTRL_X2CNT_DEFAULT 0x00000000UL
145 #define TIMER_CTRL_X2CNT_DEFAULT (_TIMER_CTRL_X2CNT_DEFAULT << 13)
146 #define _TIMER_CTRL_CLKSEL_SHIFT 16
147 #define _TIMER_CTRL_CLKSEL_MASK 0x30000UL
148 #define _TIMER_CTRL_CLKSEL_DEFAULT 0x00000000UL
149 #define _TIMER_CTRL_CLKSEL_PRESCHFPERCLK 0x00000000UL
150 #define _TIMER_CTRL_CLKSEL_CC1 0x00000001UL
151 #define _TIMER_CTRL_CLKSEL_TIMEROUF 0x00000002UL
152 #define TIMER_CTRL_CLKSEL_DEFAULT (_TIMER_CTRL_CLKSEL_DEFAULT << 16)
153 #define TIMER_CTRL_CLKSEL_PRESCHFPERCLK (_TIMER_CTRL_CLKSEL_PRESCHFPERCLK << 16)
154 #define TIMER_CTRL_CLKSEL_CC1 (_TIMER_CTRL_CLKSEL_CC1 << 16)
155 #define TIMER_CTRL_CLKSEL_TIMEROUF (_TIMER_CTRL_CLKSEL_TIMEROUF << 16)
156 #define _TIMER_CTRL_PRESC_SHIFT 24
157 #define _TIMER_CTRL_PRESC_MASK 0xF000000UL
158 #define _TIMER_CTRL_PRESC_DEFAULT 0x00000000UL
159 #define _TIMER_CTRL_PRESC_DIV1 0x00000000UL
160 #define _TIMER_CTRL_PRESC_DIV2 0x00000001UL
161 #define _TIMER_CTRL_PRESC_DIV4 0x00000002UL
162 #define _TIMER_CTRL_PRESC_DIV8 0x00000003UL
163 #define _TIMER_CTRL_PRESC_DIV16 0x00000004UL
164 #define _TIMER_CTRL_PRESC_DIV32 0x00000005UL
165 #define _TIMER_CTRL_PRESC_DIV64 0x00000006UL
166 #define _TIMER_CTRL_PRESC_DIV128 0x00000007UL
167 #define _TIMER_CTRL_PRESC_DIV256 0x00000008UL
168 #define _TIMER_CTRL_PRESC_DIV512 0x00000009UL
169 #define _TIMER_CTRL_PRESC_DIV1024 0x0000000AUL
170 #define TIMER_CTRL_PRESC_DEFAULT (_TIMER_CTRL_PRESC_DEFAULT << 24)
171 #define TIMER_CTRL_PRESC_DIV1 (_TIMER_CTRL_PRESC_DIV1 << 24)
172 #define TIMER_CTRL_PRESC_DIV2 (_TIMER_CTRL_PRESC_DIV2 << 24)
173 #define TIMER_CTRL_PRESC_DIV4 (_TIMER_CTRL_PRESC_DIV4 << 24)
174 #define TIMER_CTRL_PRESC_DIV8 (_TIMER_CTRL_PRESC_DIV8 << 24)
175 #define TIMER_CTRL_PRESC_DIV16 (_TIMER_CTRL_PRESC_DIV16 << 24)
176 #define TIMER_CTRL_PRESC_DIV32 (_TIMER_CTRL_PRESC_DIV32 << 24)
177 #define TIMER_CTRL_PRESC_DIV64 (_TIMER_CTRL_PRESC_DIV64 << 24)
178 #define TIMER_CTRL_PRESC_DIV128 (_TIMER_CTRL_PRESC_DIV128 << 24)
179 #define TIMER_CTRL_PRESC_DIV256 (_TIMER_CTRL_PRESC_DIV256 << 24)
180 #define TIMER_CTRL_PRESC_DIV512 (_TIMER_CTRL_PRESC_DIV512 << 24)
181 #define TIMER_CTRL_PRESC_DIV1024 (_TIMER_CTRL_PRESC_DIV1024 << 24)
182 #define TIMER_CTRL_ATI (0x1UL << 28)
183 #define _TIMER_CTRL_ATI_SHIFT 28
184 #define _TIMER_CTRL_ATI_MASK 0x10000000UL
185 #define _TIMER_CTRL_ATI_DEFAULT 0x00000000UL
186 #define TIMER_CTRL_ATI_DEFAULT (_TIMER_CTRL_ATI_DEFAULT << 28)
187 #define TIMER_CTRL_RSSCOIST (0x1UL << 29)
188 #define _TIMER_CTRL_RSSCOIST_SHIFT 29
189 #define _TIMER_CTRL_RSSCOIST_MASK 0x20000000UL
190 #define _TIMER_CTRL_RSSCOIST_DEFAULT 0x00000000UL
191 #define TIMER_CTRL_RSSCOIST_DEFAULT (_TIMER_CTRL_RSSCOIST_DEFAULT << 29)
193 /* Bit fields for TIMER CMD */
194 #define _TIMER_CMD_RESETVALUE 0x00000000UL
195 #define _TIMER_CMD_MASK 0x00000003UL
196 #define TIMER_CMD_START (0x1UL << 0)
197 #define _TIMER_CMD_START_SHIFT 0
198 #define _TIMER_CMD_START_MASK 0x1UL
199 #define _TIMER_CMD_START_DEFAULT 0x00000000UL
200 #define TIMER_CMD_START_DEFAULT (_TIMER_CMD_START_DEFAULT << 0)
201 #define TIMER_CMD_STOP (0x1UL << 1)
202 #define _TIMER_CMD_STOP_SHIFT 1
203 #define _TIMER_CMD_STOP_MASK 0x2UL
204 #define _TIMER_CMD_STOP_DEFAULT 0x00000000UL
205 #define TIMER_CMD_STOP_DEFAULT (_TIMER_CMD_STOP_DEFAULT << 1)
207 /* Bit fields for TIMER STATUS */
208 #define _TIMER_STATUS_RESETVALUE 0x00000000UL
209 #define _TIMER_STATUS_MASK 0x07070707UL
210 #define TIMER_STATUS_RUNNING (0x1UL << 0)
211 #define _TIMER_STATUS_RUNNING_SHIFT 0
212 #define _TIMER_STATUS_RUNNING_MASK 0x1UL
213 #define _TIMER_STATUS_RUNNING_DEFAULT 0x00000000UL
214 #define TIMER_STATUS_RUNNING_DEFAULT (_TIMER_STATUS_RUNNING_DEFAULT << 0)
215 #define TIMER_STATUS_DIR (0x1UL << 1)
216 #define _TIMER_STATUS_DIR_SHIFT 1
217 #define _TIMER_STATUS_DIR_MASK 0x2UL
218 #define _TIMER_STATUS_DIR_DEFAULT 0x00000000UL
219 #define _TIMER_STATUS_DIR_UP 0x00000000UL
220 #define _TIMER_STATUS_DIR_DOWN 0x00000001UL
221 #define TIMER_STATUS_DIR_DEFAULT (_TIMER_STATUS_DIR_DEFAULT << 1)
222 #define TIMER_STATUS_DIR_UP (_TIMER_STATUS_DIR_UP << 1)
223 #define TIMER_STATUS_DIR_DOWN (_TIMER_STATUS_DIR_DOWN << 1)
224 #define TIMER_STATUS_TOPBV (0x1UL << 2)
225 #define _TIMER_STATUS_TOPBV_SHIFT 2
226 #define _TIMER_STATUS_TOPBV_MASK 0x4UL
227 #define _TIMER_STATUS_TOPBV_DEFAULT 0x00000000UL
228 #define TIMER_STATUS_TOPBV_DEFAULT (_TIMER_STATUS_TOPBV_DEFAULT << 2)
229 #define TIMER_STATUS_CCVBV0 (0x1UL << 8)
230 #define _TIMER_STATUS_CCVBV0_SHIFT 8
231 #define _TIMER_STATUS_CCVBV0_MASK 0x100UL
232 #define _TIMER_STATUS_CCVBV0_DEFAULT 0x00000000UL
233 #define TIMER_STATUS_CCVBV0_DEFAULT (_TIMER_STATUS_CCVBV0_DEFAULT << 8)
234 #define TIMER_STATUS_CCVBV1 (0x1UL << 9)
235 #define _TIMER_STATUS_CCVBV1_SHIFT 9
236 #define _TIMER_STATUS_CCVBV1_MASK 0x200UL
237 #define _TIMER_STATUS_CCVBV1_DEFAULT 0x00000000UL
238 #define TIMER_STATUS_CCVBV1_DEFAULT (_TIMER_STATUS_CCVBV1_DEFAULT << 9)
239 #define TIMER_STATUS_CCVBV2 (0x1UL << 10)
240 #define _TIMER_STATUS_CCVBV2_SHIFT 10
241 #define _TIMER_STATUS_CCVBV2_MASK 0x400UL
242 #define _TIMER_STATUS_CCVBV2_DEFAULT 0x00000000UL
243 #define TIMER_STATUS_CCVBV2_DEFAULT (_TIMER_STATUS_CCVBV2_DEFAULT << 10)
244 #define TIMER_STATUS_ICV0 (0x1UL << 16)
245 #define _TIMER_STATUS_ICV0_SHIFT 16
246 #define _TIMER_STATUS_ICV0_MASK 0x10000UL
247 #define _TIMER_STATUS_ICV0_DEFAULT 0x00000000UL
248 #define TIMER_STATUS_ICV0_DEFAULT (_TIMER_STATUS_ICV0_DEFAULT << 16)
249 #define TIMER_STATUS_ICV1 (0x1UL << 17)
250 #define _TIMER_STATUS_ICV1_SHIFT 17
251 #define _TIMER_STATUS_ICV1_MASK 0x20000UL
252 #define _TIMER_STATUS_ICV1_DEFAULT 0x00000000UL
253 #define TIMER_STATUS_ICV1_DEFAULT (_TIMER_STATUS_ICV1_DEFAULT << 17)
254 #define TIMER_STATUS_ICV2 (0x1UL << 18)
255 #define _TIMER_STATUS_ICV2_SHIFT 18
256 #define _TIMER_STATUS_ICV2_MASK 0x40000UL
257 #define _TIMER_STATUS_ICV2_DEFAULT 0x00000000UL
258 #define TIMER_STATUS_ICV2_DEFAULT (_TIMER_STATUS_ICV2_DEFAULT << 18)
259 #define TIMER_STATUS_CCPOL0 (0x1UL << 24)
260 #define _TIMER_STATUS_CCPOL0_SHIFT 24
261 #define _TIMER_STATUS_CCPOL0_MASK 0x1000000UL
262 #define _TIMER_STATUS_CCPOL0_DEFAULT 0x00000000UL
263 #define _TIMER_STATUS_CCPOL0_LOWRISE 0x00000000UL
264 #define _TIMER_STATUS_CCPOL0_HIGHFALL 0x00000001UL
265 #define TIMER_STATUS_CCPOL0_DEFAULT (_TIMER_STATUS_CCPOL0_DEFAULT << 24)
266 #define TIMER_STATUS_CCPOL0_LOWRISE (_TIMER_STATUS_CCPOL0_LOWRISE << 24)
267 #define TIMER_STATUS_CCPOL0_HIGHFALL (_TIMER_STATUS_CCPOL0_HIGHFALL << 24)
268 #define TIMER_STATUS_CCPOL1 (0x1UL << 25)
269 #define _TIMER_STATUS_CCPOL1_SHIFT 25
270 #define _TIMER_STATUS_CCPOL1_MASK 0x2000000UL
271 #define _TIMER_STATUS_CCPOL1_DEFAULT 0x00000000UL
272 #define _TIMER_STATUS_CCPOL1_LOWRISE 0x00000000UL
273 #define _TIMER_STATUS_CCPOL1_HIGHFALL 0x00000001UL
274 #define TIMER_STATUS_CCPOL1_DEFAULT (_TIMER_STATUS_CCPOL1_DEFAULT << 25)
275 #define TIMER_STATUS_CCPOL1_LOWRISE (_TIMER_STATUS_CCPOL1_LOWRISE << 25)
276 #define TIMER_STATUS_CCPOL1_HIGHFALL (_TIMER_STATUS_CCPOL1_HIGHFALL << 25)
277 #define TIMER_STATUS_CCPOL2 (0x1UL << 26)
278 #define _TIMER_STATUS_CCPOL2_SHIFT 26
279 #define _TIMER_STATUS_CCPOL2_MASK 0x4000000UL
280 #define _TIMER_STATUS_CCPOL2_DEFAULT 0x00000000UL
281 #define _TIMER_STATUS_CCPOL2_LOWRISE 0x00000000UL
282 #define _TIMER_STATUS_CCPOL2_HIGHFALL 0x00000001UL
283 #define TIMER_STATUS_CCPOL2_DEFAULT (_TIMER_STATUS_CCPOL2_DEFAULT << 26)
284 #define TIMER_STATUS_CCPOL2_LOWRISE (_TIMER_STATUS_CCPOL2_LOWRISE << 26)
285 #define TIMER_STATUS_CCPOL2_HIGHFALL (_TIMER_STATUS_CCPOL2_HIGHFALL << 26)
287 /* Bit fields for TIMER IEN */
288 #define _TIMER_IEN_RESETVALUE 0x00000000UL
289 #define _TIMER_IEN_MASK 0x00000773UL
290 #define TIMER_IEN_OF (0x1UL << 0)
291 #define _TIMER_IEN_OF_SHIFT 0
292 #define _TIMER_IEN_OF_MASK 0x1UL
293 #define _TIMER_IEN_OF_DEFAULT 0x00000000UL
294 #define TIMER_IEN_OF_DEFAULT (_TIMER_IEN_OF_DEFAULT << 0)
295 #define TIMER_IEN_UF (0x1UL << 1)
296 #define _TIMER_IEN_UF_SHIFT 1
297 #define _TIMER_IEN_UF_MASK 0x2UL
298 #define _TIMER_IEN_UF_DEFAULT 0x00000000UL
299 #define TIMER_IEN_UF_DEFAULT (_TIMER_IEN_UF_DEFAULT << 1)
300 #define TIMER_IEN_CC0 (0x1UL << 4)
301 #define _TIMER_IEN_CC0_SHIFT 4
302 #define _TIMER_IEN_CC0_MASK 0x10UL
303 #define _TIMER_IEN_CC0_DEFAULT 0x00000000UL
304 #define TIMER_IEN_CC0_DEFAULT (_TIMER_IEN_CC0_DEFAULT << 4)
305 #define TIMER_IEN_CC1 (0x1UL << 5)
306 #define _TIMER_IEN_CC1_SHIFT 5
307 #define _TIMER_IEN_CC1_MASK 0x20UL
308 #define _TIMER_IEN_CC1_DEFAULT 0x00000000UL
309 #define TIMER_IEN_CC1_DEFAULT (_TIMER_IEN_CC1_DEFAULT << 5)
310 #define TIMER_IEN_CC2 (0x1UL << 6)
311 #define _TIMER_IEN_CC2_SHIFT 6
312 #define _TIMER_IEN_CC2_MASK 0x40UL
313 #define _TIMER_IEN_CC2_DEFAULT 0x00000000UL
314 #define TIMER_IEN_CC2_DEFAULT (_TIMER_IEN_CC2_DEFAULT << 6)
315 #define TIMER_IEN_ICBOF0 (0x1UL << 8)
316 #define _TIMER_IEN_ICBOF0_SHIFT 8
317 #define _TIMER_IEN_ICBOF0_MASK 0x100UL
318 #define _TIMER_IEN_ICBOF0_DEFAULT 0x00000000UL
319 #define TIMER_IEN_ICBOF0_DEFAULT (_TIMER_IEN_ICBOF0_DEFAULT << 8)
320 #define TIMER_IEN_ICBOF1 (0x1UL << 9)
321 #define _TIMER_IEN_ICBOF1_SHIFT 9
322 #define _TIMER_IEN_ICBOF1_MASK 0x200UL
323 #define _TIMER_IEN_ICBOF1_DEFAULT 0x00000000UL
324 #define TIMER_IEN_ICBOF1_DEFAULT (_TIMER_IEN_ICBOF1_DEFAULT << 9)
325 #define TIMER_IEN_ICBOF2 (0x1UL << 10)
326 #define _TIMER_IEN_ICBOF2_SHIFT 10
327 #define _TIMER_IEN_ICBOF2_MASK 0x400UL
328 #define _TIMER_IEN_ICBOF2_DEFAULT 0x00000000UL
329 #define TIMER_IEN_ICBOF2_DEFAULT (_TIMER_IEN_ICBOF2_DEFAULT << 10)
331 /* Bit fields for TIMER IF */
332 #define _TIMER_IF_RESETVALUE 0x00000000UL
333 #define _TIMER_IF_MASK 0x00000773UL
334 #define TIMER_IF_OF (0x1UL << 0)
335 #define _TIMER_IF_OF_SHIFT 0
336 #define _TIMER_IF_OF_MASK 0x1UL
337 #define _TIMER_IF_OF_DEFAULT 0x00000000UL
338 #define TIMER_IF_OF_DEFAULT (_TIMER_IF_OF_DEFAULT << 0)
339 #define TIMER_IF_UF (0x1UL << 1)
340 #define _TIMER_IF_UF_SHIFT 1
341 #define _TIMER_IF_UF_MASK 0x2UL
342 #define _TIMER_IF_UF_DEFAULT 0x00000000UL
343 #define TIMER_IF_UF_DEFAULT (_TIMER_IF_UF_DEFAULT << 1)
344 #define TIMER_IF_CC0 (0x1UL << 4)
345 #define _TIMER_IF_CC0_SHIFT 4
346 #define _TIMER_IF_CC0_MASK 0x10UL
347 #define _TIMER_IF_CC0_DEFAULT 0x00000000UL
348 #define TIMER_IF_CC0_DEFAULT (_TIMER_IF_CC0_DEFAULT << 4)
349 #define TIMER_IF_CC1 (0x1UL << 5)
350 #define _TIMER_IF_CC1_SHIFT 5
351 #define _TIMER_IF_CC1_MASK 0x20UL
352 #define _TIMER_IF_CC1_DEFAULT 0x00000000UL
353 #define TIMER_IF_CC1_DEFAULT (_TIMER_IF_CC1_DEFAULT << 5)
354 #define TIMER_IF_CC2 (0x1UL << 6)
355 #define _TIMER_IF_CC2_SHIFT 6
356 #define _TIMER_IF_CC2_MASK 0x40UL
357 #define _TIMER_IF_CC2_DEFAULT 0x00000000UL
358 #define TIMER_IF_CC2_DEFAULT (_TIMER_IF_CC2_DEFAULT << 6)
359 #define TIMER_IF_ICBOF0 (0x1UL << 8)
360 #define _TIMER_IF_ICBOF0_SHIFT 8
361 #define _TIMER_IF_ICBOF0_MASK 0x100UL
362 #define _TIMER_IF_ICBOF0_DEFAULT 0x00000000UL
363 #define TIMER_IF_ICBOF0_DEFAULT (_TIMER_IF_ICBOF0_DEFAULT << 8)
364 #define TIMER_IF_ICBOF1 (0x1UL << 9)
365 #define _TIMER_IF_ICBOF1_SHIFT 9
366 #define _TIMER_IF_ICBOF1_MASK 0x200UL
367 #define _TIMER_IF_ICBOF1_DEFAULT 0x00000000UL
368 #define TIMER_IF_ICBOF1_DEFAULT (_TIMER_IF_ICBOF1_DEFAULT << 9)
369 #define TIMER_IF_ICBOF2 (0x1UL << 10)
370 #define _TIMER_IF_ICBOF2_SHIFT 10
371 #define _TIMER_IF_ICBOF2_MASK 0x400UL
372 #define _TIMER_IF_ICBOF2_DEFAULT 0x00000000UL
373 #define TIMER_IF_ICBOF2_DEFAULT (_TIMER_IF_ICBOF2_DEFAULT << 10)
375 /* Bit fields for TIMER IFS */
376 #define _TIMER_IFS_RESETVALUE 0x00000000UL
377 #define _TIMER_IFS_MASK 0x00000773UL
378 #define TIMER_IFS_OF (0x1UL << 0)
379 #define _TIMER_IFS_OF_SHIFT 0
380 #define _TIMER_IFS_OF_MASK 0x1UL
381 #define _TIMER_IFS_OF_DEFAULT 0x00000000UL
382 #define TIMER_IFS_OF_DEFAULT (_TIMER_IFS_OF_DEFAULT << 0)
383 #define TIMER_IFS_UF (0x1UL << 1)
384 #define _TIMER_IFS_UF_SHIFT 1
385 #define _TIMER_IFS_UF_MASK 0x2UL
386 #define _TIMER_IFS_UF_DEFAULT 0x00000000UL
387 #define TIMER_IFS_UF_DEFAULT (_TIMER_IFS_UF_DEFAULT << 1)
388 #define TIMER_IFS_CC0 (0x1UL << 4)
389 #define _TIMER_IFS_CC0_SHIFT 4
390 #define _TIMER_IFS_CC0_MASK 0x10UL
391 #define _TIMER_IFS_CC0_DEFAULT 0x00000000UL
392 #define TIMER_IFS_CC0_DEFAULT (_TIMER_IFS_CC0_DEFAULT << 4)
393 #define TIMER_IFS_CC1 (0x1UL << 5)
394 #define _TIMER_IFS_CC1_SHIFT 5
395 #define _TIMER_IFS_CC1_MASK 0x20UL
396 #define _TIMER_IFS_CC1_DEFAULT 0x00000000UL
397 #define TIMER_IFS_CC1_DEFAULT (_TIMER_IFS_CC1_DEFAULT << 5)
398 #define TIMER_IFS_CC2 (0x1UL << 6)
399 #define _TIMER_IFS_CC2_SHIFT 6
400 #define _TIMER_IFS_CC2_MASK 0x40UL
401 #define _TIMER_IFS_CC2_DEFAULT 0x00000000UL
402 #define TIMER_IFS_CC2_DEFAULT (_TIMER_IFS_CC2_DEFAULT << 6)
403 #define TIMER_IFS_ICBOF0 (0x1UL << 8)
404 #define _TIMER_IFS_ICBOF0_SHIFT 8
405 #define _TIMER_IFS_ICBOF0_MASK 0x100UL
406 #define _TIMER_IFS_ICBOF0_DEFAULT 0x00000000UL
407 #define TIMER_IFS_ICBOF0_DEFAULT (_TIMER_IFS_ICBOF0_DEFAULT << 8)
408 #define TIMER_IFS_ICBOF1 (0x1UL << 9)
409 #define _TIMER_IFS_ICBOF1_SHIFT 9
410 #define _TIMER_IFS_ICBOF1_MASK 0x200UL
411 #define _TIMER_IFS_ICBOF1_DEFAULT 0x00000000UL
412 #define TIMER_IFS_ICBOF1_DEFAULT (_TIMER_IFS_ICBOF1_DEFAULT << 9)
413 #define TIMER_IFS_ICBOF2 (0x1UL << 10)
414 #define _TIMER_IFS_ICBOF2_SHIFT 10
415 #define _TIMER_IFS_ICBOF2_MASK 0x400UL
416 #define _TIMER_IFS_ICBOF2_DEFAULT 0x00000000UL
417 #define TIMER_IFS_ICBOF2_DEFAULT (_TIMER_IFS_ICBOF2_DEFAULT << 10)
419 /* Bit fields for TIMER IFC */
420 #define _TIMER_IFC_RESETVALUE 0x00000000UL
421 #define _TIMER_IFC_MASK 0x00000773UL
422 #define TIMER_IFC_OF (0x1UL << 0)
423 #define _TIMER_IFC_OF_SHIFT 0
424 #define _TIMER_IFC_OF_MASK 0x1UL
425 #define _TIMER_IFC_OF_DEFAULT 0x00000000UL
426 #define TIMER_IFC_OF_DEFAULT (_TIMER_IFC_OF_DEFAULT << 0)
427 #define TIMER_IFC_UF (0x1UL << 1)
428 #define _TIMER_IFC_UF_SHIFT 1
429 #define _TIMER_IFC_UF_MASK 0x2UL
430 #define _TIMER_IFC_UF_DEFAULT 0x00000000UL
431 #define TIMER_IFC_UF_DEFAULT (_TIMER_IFC_UF_DEFAULT << 1)
432 #define TIMER_IFC_CC0 (0x1UL << 4)
433 #define _TIMER_IFC_CC0_SHIFT 4
434 #define _TIMER_IFC_CC0_MASK 0x10UL
435 #define _TIMER_IFC_CC0_DEFAULT 0x00000000UL
436 #define TIMER_IFC_CC0_DEFAULT (_TIMER_IFC_CC0_DEFAULT << 4)
437 #define TIMER_IFC_CC1 (0x1UL << 5)
438 #define _TIMER_IFC_CC1_SHIFT 5
439 #define _TIMER_IFC_CC1_MASK 0x20UL
440 #define _TIMER_IFC_CC1_DEFAULT 0x00000000UL
441 #define TIMER_IFC_CC1_DEFAULT (_TIMER_IFC_CC1_DEFAULT << 5)
442 #define TIMER_IFC_CC2 (0x1UL << 6)
443 #define _TIMER_IFC_CC2_SHIFT 6
444 #define _TIMER_IFC_CC2_MASK 0x40UL
445 #define _TIMER_IFC_CC2_DEFAULT 0x00000000UL
446 #define TIMER_IFC_CC2_DEFAULT (_TIMER_IFC_CC2_DEFAULT << 6)
447 #define TIMER_IFC_ICBOF0 (0x1UL << 8)
448 #define _TIMER_IFC_ICBOF0_SHIFT 8
449 #define _TIMER_IFC_ICBOF0_MASK 0x100UL
450 #define _TIMER_IFC_ICBOF0_DEFAULT 0x00000000UL
451 #define TIMER_IFC_ICBOF0_DEFAULT (_TIMER_IFC_ICBOF0_DEFAULT << 8)
452 #define TIMER_IFC_ICBOF1 (0x1UL << 9)
453 #define _TIMER_IFC_ICBOF1_SHIFT 9
454 #define _TIMER_IFC_ICBOF1_MASK 0x200UL
455 #define _TIMER_IFC_ICBOF1_DEFAULT 0x00000000UL
456 #define TIMER_IFC_ICBOF1_DEFAULT (_TIMER_IFC_ICBOF1_DEFAULT << 9)
457 #define TIMER_IFC_ICBOF2 (0x1UL << 10)
458 #define _TIMER_IFC_ICBOF2_SHIFT 10
459 #define _TIMER_IFC_ICBOF2_MASK 0x400UL
460 #define _TIMER_IFC_ICBOF2_DEFAULT 0x00000000UL
461 #define TIMER_IFC_ICBOF2_DEFAULT (_TIMER_IFC_ICBOF2_DEFAULT << 10)
463 /* Bit fields for TIMER TOP */
464 #define _TIMER_TOP_RESETVALUE 0x0000FFFFUL
465 #define _TIMER_TOP_MASK 0x0000FFFFUL
466 #define _TIMER_TOP_TOP_SHIFT 0
467 #define _TIMER_TOP_TOP_MASK 0xFFFFUL
468 #define _TIMER_TOP_TOP_DEFAULT 0x0000FFFFUL
469 #define TIMER_TOP_TOP_DEFAULT (_TIMER_TOP_TOP_DEFAULT << 0)
471 /* Bit fields for TIMER TOPB */
472 #define _TIMER_TOPB_RESETVALUE 0x00000000UL
473 #define _TIMER_TOPB_MASK 0x0000FFFFUL
474 #define _TIMER_TOPB_TOPB_SHIFT 0
475 #define _TIMER_TOPB_TOPB_MASK 0xFFFFUL
476 #define _TIMER_TOPB_TOPB_DEFAULT 0x00000000UL
477 #define TIMER_TOPB_TOPB_DEFAULT (_TIMER_TOPB_TOPB_DEFAULT << 0)
479 /* Bit fields for TIMER CNT */
480 #define _TIMER_CNT_RESETVALUE 0x00000000UL
481 #define _TIMER_CNT_MASK 0x0000FFFFUL
482 #define _TIMER_CNT_CNT_SHIFT 0
483 #define _TIMER_CNT_CNT_MASK 0xFFFFUL
484 #define _TIMER_CNT_CNT_DEFAULT 0x00000000UL
485 #define TIMER_CNT_CNT_DEFAULT (_TIMER_CNT_CNT_DEFAULT << 0)
487 /* Bit fields for TIMER ROUTE */
488 #define _TIMER_ROUTE_RESETVALUE 0x00000000UL
489 #define _TIMER_ROUTE_MASK 0x00070707UL
490 #define TIMER_ROUTE_CC0PEN (0x1UL << 0)
491 #define _TIMER_ROUTE_CC0PEN_SHIFT 0
492 #define _TIMER_ROUTE_CC0PEN_MASK 0x1UL
493 #define _TIMER_ROUTE_CC0PEN_DEFAULT 0x00000000UL
494 #define TIMER_ROUTE_CC0PEN_DEFAULT (_TIMER_ROUTE_CC0PEN_DEFAULT << 0)
495 #define TIMER_ROUTE_CC1PEN (0x1UL << 1)
496 #define _TIMER_ROUTE_CC1PEN_SHIFT 1
497 #define _TIMER_ROUTE_CC1PEN_MASK 0x2UL
498 #define _TIMER_ROUTE_CC1PEN_DEFAULT 0x00000000UL
499 #define TIMER_ROUTE_CC1PEN_DEFAULT (_TIMER_ROUTE_CC1PEN_DEFAULT << 1)
500 #define TIMER_ROUTE_CC2PEN (0x1UL << 2)
501 #define _TIMER_ROUTE_CC2PEN_SHIFT 2
502 #define _TIMER_ROUTE_CC2PEN_MASK 0x4UL
503 #define _TIMER_ROUTE_CC2PEN_DEFAULT 0x00000000UL
504 #define TIMER_ROUTE_CC2PEN_DEFAULT (_TIMER_ROUTE_CC2PEN_DEFAULT << 2)
505 #define TIMER_ROUTE_CDTI0PEN (0x1UL << 8)
506 #define _TIMER_ROUTE_CDTI0PEN_SHIFT 8
507 #define _TIMER_ROUTE_CDTI0PEN_MASK 0x100UL
508 #define _TIMER_ROUTE_CDTI0PEN_DEFAULT 0x00000000UL
509 #define TIMER_ROUTE_CDTI0PEN_DEFAULT (_TIMER_ROUTE_CDTI0PEN_DEFAULT << 8)
510 #define TIMER_ROUTE_CDTI1PEN (0x1UL << 9)
511 #define _TIMER_ROUTE_CDTI1PEN_SHIFT 9
512 #define _TIMER_ROUTE_CDTI1PEN_MASK 0x200UL
513 #define _TIMER_ROUTE_CDTI1PEN_DEFAULT 0x00000000UL
514 #define TIMER_ROUTE_CDTI1PEN_DEFAULT (_TIMER_ROUTE_CDTI1PEN_DEFAULT << 9)
515 #define TIMER_ROUTE_CDTI2PEN (0x1UL << 10)
516 #define _TIMER_ROUTE_CDTI2PEN_SHIFT 10
517 #define _TIMER_ROUTE_CDTI2PEN_MASK 0x400UL
518 #define _TIMER_ROUTE_CDTI2PEN_DEFAULT 0x00000000UL
519 #define TIMER_ROUTE_CDTI2PEN_DEFAULT (_TIMER_ROUTE_CDTI2PEN_DEFAULT << 10)
520 #define _TIMER_ROUTE_LOCATION_SHIFT 16
521 #define _TIMER_ROUTE_LOCATION_MASK 0x70000UL
522 #define _TIMER_ROUTE_LOCATION_LOC0 0x00000000UL
523 #define _TIMER_ROUTE_LOCATION_DEFAULT 0x00000000UL
524 #define _TIMER_ROUTE_LOCATION_LOC1 0x00000001UL
525 #define _TIMER_ROUTE_LOCATION_LOC2 0x00000002UL
526 #define _TIMER_ROUTE_LOCATION_LOC3 0x00000003UL
527 #define _TIMER_ROUTE_LOCATION_LOC4 0x00000004UL
528 #define _TIMER_ROUTE_LOCATION_LOC5 0x00000005UL
529 #define _TIMER_ROUTE_LOCATION_LOC6 0x00000006UL
530 #define TIMER_ROUTE_LOCATION_LOC0 (_TIMER_ROUTE_LOCATION_LOC0 << 16)
531 #define TIMER_ROUTE_LOCATION_DEFAULT (_TIMER_ROUTE_LOCATION_DEFAULT << 16)
532 #define TIMER_ROUTE_LOCATION_LOC1 (_TIMER_ROUTE_LOCATION_LOC1 << 16)
533 #define TIMER_ROUTE_LOCATION_LOC2 (_TIMER_ROUTE_LOCATION_LOC2 << 16)
534 #define TIMER_ROUTE_LOCATION_LOC3 (_TIMER_ROUTE_LOCATION_LOC3 << 16)
535 #define TIMER_ROUTE_LOCATION_LOC4 (_TIMER_ROUTE_LOCATION_LOC4 << 16)
536 #define TIMER_ROUTE_LOCATION_LOC5 (_TIMER_ROUTE_LOCATION_LOC5 << 16)
537 #define TIMER_ROUTE_LOCATION_LOC6 (_TIMER_ROUTE_LOCATION_LOC6 << 16)
539 /* Bit fields for TIMER CC_CTRL */
540 #define _TIMER_CC_CTRL_RESETVALUE 0x00000000UL
541 #define _TIMER_CC_CTRL_MASK 0x1F373F17UL
542 #define _TIMER_CC_CTRL_MODE_SHIFT 0
543 #define _TIMER_CC_CTRL_MODE_MASK 0x3UL
544 #define _TIMER_CC_CTRL_MODE_DEFAULT 0x00000000UL
545 #define _TIMER_CC_CTRL_MODE_OFF 0x00000000UL
546 #define _TIMER_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL
547 #define _TIMER_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL
548 #define _TIMER_CC_CTRL_MODE_PWM 0x00000003UL
549 #define TIMER_CC_CTRL_MODE_DEFAULT (_TIMER_CC_CTRL_MODE_DEFAULT << 0)
550 #define TIMER_CC_CTRL_MODE_OFF (_TIMER_CC_CTRL_MODE_OFF << 0)
551 #define TIMER_CC_CTRL_MODE_INPUTCAPTURE (_TIMER_CC_CTRL_MODE_INPUTCAPTURE << 0)
552 #define TIMER_CC_CTRL_MODE_OUTPUTCOMPARE (_TIMER_CC_CTRL_MODE_OUTPUTCOMPARE << 0)
553 #define TIMER_CC_CTRL_MODE_PWM (_TIMER_CC_CTRL_MODE_PWM << 0)
554 #define TIMER_CC_CTRL_OUTINV (0x1UL << 2)
555 #define _TIMER_CC_CTRL_OUTINV_SHIFT 2
556 #define _TIMER_CC_CTRL_OUTINV_MASK 0x4UL
557 #define _TIMER_CC_CTRL_OUTINV_DEFAULT 0x00000000UL
558 #define TIMER_CC_CTRL_OUTINV_DEFAULT (_TIMER_CC_CTRL_OUTINV_DEFAULT << 2)
559 #define TIMER_CC_CTRL_COIST (0x1UL << 4)
560 #define _TIMER_CC_CTRL_COIST_SHIFT 4
561 #define _TIMER_CC_CTRL_COIST_MASK 0x10UL
562 #define _TIMER_CC_CTRL_COIST_DEFAULT 0x00000000UL
563 #define TIMER_CC_CTRL_COIST_DEFAULT (_TIMER_CC_CTRL_COIST_DEFAULT << 4)
564 #define _TIMER_CC_CTRL_CMOA_SHIFT 8
565 #define _TIMER_CC_CTRL_CMOA_MASK 0x300UL
566 #define _TIMER_CC_CTRL_CMOA_DEFAULT 0x00000000UL
567 #define _TIMER_CC_CTRL_CMOA_NONE 0x00000000UL
568 #define _TIMER_CC_CTRL_CMOA_TOGGLE 0x00000001UL
569 #define _TIMER_CC_CTRL_CMOA_CLEAR 0x00000002UL
570 #define _TIMER_CC_CTRL_CMOA_SET 0x00000003UL
571 #define TIMER_CC_CTRL_CMOA_DEFAULT (_TIMER_CC_CTRL_CMOA_DEFAULT << 8)
572 #define TIMER_CC_CTRL_CMOA_NONE (_TIMER_CC_CTRL_CMOA_NONE << 8)
573 #define TIMER_CC_CTRL_CMOA_TOGGLE (_TIMER_CC_CTRL_CMOA_TOGGLE << 8)
574 #define TIMER_CC_CTRL_CMOA_CLEAR (_TIMER_CC_CTRL_CMOA_CLEAR << 8)
575 #define TIMER_CC_CTRL_CMOA_SET (_TIMER_CC_CTRL_CMOA_SET << 8)
576 #define _TIMER_CC_CTRL_COFOA_SHIFT 10
577 #define _TIMER_CC_CTRL_COFOA_MASK 0xC00UL
578 #define _TIMER_CC_CTRL_COFOA_DEFAULT 0x00000000UL
579 #define _TIMER_CC_CTRL_COFOA_NONE 0x00000000UL
580 #define _TIMER_CC_CTRL_COFOA_TOGGLE 0x00000001UL
581 #define _TIMER_CC_CTRL_COFOA_CLEAR 0x00000002UL
582 #define _TIMER_CC_CTRL_COFOA_SET 0x00000003UL
583 #define TIMER_CC_CTRL_COFOA_DEFAULT (_TIMER_CC_CTRL_COFOA_DEFAULT << 10)
584 #define TIMER_CC_CTRL_COFOA_NONE (_TIMER_CC_CTRL_COFOA_NONE << 10)
585 #define TIMER_CC_CTRL_COFOA_TOGGLE (_TIMER_CC_CTRL_COFOA_TOGGLE << 10)
586 #define TIMER_CC_CTRL_COFOA_CLEAR (_TIMER_CC_CTRL_COFOA_CLEAR << 10)
587 #define TIMER_CC_CTRL_COFOA_SET (_TIMER_CC_CTRL_COFOA_SET << 10)
588 #define _TIMER_CC_CTRL_CUFOA_SHIFT 12
589 #define _TIMER_CC_CTRL_CUFOA_MASK 0x3000UL
590 #define _TIMER_CC_CTRL_CUFOA_DEFAULT 0x00000000UL
591 #define _TIMER_CC_CTRL_CUFOA_NONE 0x00000000UL
592 #define _TIMER_CC_CTRL_CUFOA_TOGGLE 0x00000001UL
593 #define _TIMER_CC_CTRL_CUFOA_CLEAR 0x00000002UL
594 #define _TIMER_CC_CTRL_CUFOA_SET 0x00000003UL
595 #define TIMER_CC_CTRL_CUFOA_DEFAULT (_TIMER_CC_CTRL_CUFOA_DEFAULT << 12)
596 #define TIMER_CC_CTRL_CUFOA_NONE (_TIMER_CC_CTRL_CUFOA_NONE << 12)
597 #define TIMER_CC_CTRL_CUFOA_TOGGLE (_TIMER_CC_CTRL_CUFOA_TOGGLE << 12)
598 #define TIMER_CC_CTRL_CUFOA_CLEAR (_TIMER_CC_CTRL_CUFOA_CLEAR << 12)
599 #define TIMER_CC_CTRL_CUFOA_SET (_TIMER_CC_CTRL_CUFOA_SET << 12)
600 #define _TIMER_CC_CTRL_PRSSEL_SHIFT 16
601 #define _TIMER_CC_CTRL_PRSSEL_MASK 0x70000UL
602 #define _TIMER_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL
603 #define _TIMER_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL
604 #define _TIMER_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL
605 #define _TIMER_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL
606 #define _TIMER_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL
607 #define _TIMER_CC_CTRL_PRSSEL_PRSCH4 0x00000004UL
608 #define _TIMER_CC_CTRL_PRSSEL_PRSCH5 0x00000005UL
609 #define TIMER_CC_CTRL_PRSSEL_DEFAULT (_TIMER_CC_CTRL_PRSSEL_DEFAULT << 16)
610 #define TIMER_CC_CTRL_PRSSEL_PRSCH0 (_TIMER_CC_CTRL_PRSSEL_PRSCH0 << 16)
611 #define TIMER_CC_CTRL_PRSSEL_PRSCH1 (_TIMER_CC_CTRL_PRSSEL_PRSCH1 << 16)
612 #define TIMER_CC_CTRL_PRSSEL_PRSCH2 (_TIMER_CC_CTRL_PRSSEL_PRSCH2 << 16)
613 #define TIMER_CC_CTRL_PRSSEL_PRSCH3 (_TIMER_CC_CTRL_PRSSEL_PRSCH3 << 16)
614 #define TIMER_CC_CTRL_PRSSEL_PRSCH4 (_TIMER_CC_CTRL_PRSSEL_PRSCH4 << 16)
615 #define TIMER_CC_CTRL_PRSSEL_PRSCH5 (_TIMER_CC_CTRL_PRSSEL_PRSCH5 << 16)
616 #define TIMER_CC_CTRL_INSEL (0x1UL << 20)
617 #define _TIMER_CC_CTRL_INSEL_SHIFT 20
618 #define _TIMER_CC_CTRL_INSEL_MASK 0x100000UL
619 #define _TIMER_CC_CTRL_INSEL_DEFAULT 0x00000000UL
620 #define _TIMER_CC_CTRL_INSEL_PIN 0x00000000UL
621 #define _TIMER_CC_CTRL_INSEL_PRS 0x00000001UL
622 #define TIMER_CC_CTRL_INSEL_DEFAULT (_TIMER_CC_CTRL_INSEL_DEFAULT << 20)
623 #define TIMER_CC_CTRL_INSEL_PIN (_TIMER_CC_CTRL_INSEL_PIN << 20)
624 #define TIMER_CC_CTRL_INSEL_PRS (_TIMER_CC_CTRL_INSEL_PRS << 20)
625 #define TIMER_CC_CTRL_FILT (0x1UL << 21)
626 #define _TIMER_CC_CTRL_FILT_SHIFT 21
627 #define _TIMER_CC_CTRL_FILT_MASK 0x200000UL
628 #define _TIMER_CC_CTRL_FILT_DEFAULT 0x00000000UL
629 #define _TIMER_CC_CTRL_FILT_DISABLE 0x00000000UL
630 #define _TIMER_CC_CTRL_FILT_ENABLE 0x00000001UL
631 #define TIMER_CC_CTRL_FILT_DEFAULT (_TIMER_CC_CTRL_FILT_DEFAULT << 21)
632 #define TIMER_CC_CTRL_FILT_DISABLE (_TIMER_CC_CTRL_FILT_DISABLE << 21)
633 #define TIMER_CC_CTRL_FILT_ENABLE (_TIMER_CC_CTRL_FILT_ENABLE << 21)
634 #define _TIMER_CC_CTRL_ICEDGE_SHIFT 24
635 #define _TIMER_CC_CTRL_ICEDGE_MASK 0x3000000UL
636 #define _TIMER_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL
637 #define _TIMER_CC_CTRL_ICEDGE_RISING 0x00000000UL
638 #define _TIMER_CC_CTRL_ICEDGE_FALLING 0x00000001UL
639 #define _TIMER_CC_CTRL_ICEDGE_BOTH 0x00000002UL
640 #define _TIMER_CC_CTRL_ICEDGE_NONE 0x00000003UL
641 #define TIMER_CC_CTRL_ICEDGE_DEFAULT (_TIMER_CC_CTRL_ICEDGE_DEFAULT << 24)
642 #define TIMER_CC_CTRL_ICEDGE_RISING (_TIMER_CC_CTRL_ICEDGE_RISING << 24)
643 #define TIMER_CC_CTRL_ICEDGE_FALLING (_TIMER_CC_CTRL_ICEDGE_FALLING << 24)
644 #define TIMER_CC_CTRL_ICEDGE_BOTH (_TIMER_CC_CTRL_ICEDGE_BOTH << 24)
645 #define TIMER_CC_CTRL_ICEDGE_NONE (_TIMER_CC_CTRL_ICEDGE_NONE << 24)
646 #define _TIMER_CC_CTRL_ICEVCTRL_SHIFT 26
647 #define _TIMER_CC_CTRL_ICEVCTRL_MASK 0xC000000UL
648 #define _TIMER_CC_CTRL_ICEVCTRL_DEFAULT 0x00000000UL
649 #define _TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE 0x00000000UL
650 #define _TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE 0x00000001UL
651 #define _TIMER_CC_CTRL_ICEVCTRL_RISING 0x00000002UL
652 #define _TIMER_CC_CTRL_ICEVCTRL_FALLING 0x00000003UL
653 #define TIMER_CC_CTRL_ICEVCTRL_DEFAULT (_TIMER_CC_CTRL_ICEVCTRL_DEFAULT << 26)
654 #define TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE (_TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE << 26)
655 #define TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE (_TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE << 26)
656 #define TIMER_CC_CTRL_ICEVCTRL_RISING (_TIMER_CC_CTRL_ICEVCTRL_RISING << 26)
657 #define TIMER_CC_CTRL_ICEVCTRL_FALLING (_TIMER_CC_CTRL_ICEVCTRL_FALLING << 26)
658 #define TIMER_CC_CTRL_PRSCONF (0x1UL << 28)
659 #define _TIMER_CC_CTRL_PRSCONF_SHIFT 28
660 #define _TIMER_CC_CTRL_PRSCONF_MASK 0x10000000UL
661 #define _TIMER_CC_CTRL_PRSCONF_DEFAULT 0x00000000UL
662 #define _TIMER_CC_CTRL_PRSCONF_PULSE 0x00000000UL
663 #define _TIMER_CC_CTRL_PRSCONF_LEVEL 0x00000001UL
664 #define TIMER_CC_CTRL_PRSCONF_DEFAULT (_TIMER_CC_CTRL_PRSCONF_DEFAULT << 28)
665 #define TIMER_CC_CTRL_PRSCONF_PULSE (_TIMER_CC_CTRL_PRSCONF_PULSE << 28)
666 #define TIMER_CC_CTRL_PRSCONF_LEVEL (_TIMER_CC_CTRL_PRSCONF_LEVEL << 28)
668 /* Bit fields for TIMER CC_CCV */
669 #define _TIMER_CC_CCV_RESETVALUE 0x00000000UL
670 #define _TIMER_CC_CCV_MASK 0x0000FFFFUL
671 #define _TIMER_CC_CCV_CCV_SHIFT 0
672 #define _TIMER_CC_CCV_CCV_MASK 0xFFFFUL
673 #define _TIMER_CC_CCV_CCV_DEFAULT 0x00000000UL
674 #define TIMER_CC_CCV_CCV_DEFAULT (_TIMER_CC_CCV_CCV_DEFAULT << 0)
676 /* Bit fields for TIMER CC_CCVP */
677 #define _TIMER_CC_CCVP_RESETVALUE 0x00000000UL
678 #define _TIMER_CC_CCVP_MASK 0x0000FFFFUL
679 #define _TIMER_CC_CCVP_CCVP_SHIFT 0
680 #define _TIMER_CC_CCVP_CCVP_MASK 0xFFFFUL
681 #define _TIMER_CC_CCVP_CCVP_DEFAULT 0x00000000UL
682 #define TIMER_CC_CCVP_CCVP_DEFAULT (_TIMER_CC_CCVP_CCVP_DEFAULT << 0)
684 /* Bit fields for TIMER CC_CCVB */
685 #define _TIMER_CC_CCVB_RESETVALUE 0x00000000UL
686 #define _TIMER_CC_CCVB_MASK 0x0000FFFFUL
687 #define _TIMER_CC_CCVB_CCVB_SHIFT 0
688 #define _TIMER_CC_CCVB_CCVB_MASK 0xFFFFUL
689 #define _TIMER_CC_CCVB_CCVB_DEFAULT 0x00000000UL
690 #define TIMER_CC_CCVB_CCVB_DEFAULT (_TIMER_CC_CCVB_CCVB_DEFAULT << 0)
692 /* Bit fields for TIMER DTCTRL */
693 #define _TIMER_DTCTRL_RESETVALUE 0x00000000UL
694 #define _TIMER_DTCTRL_MASK 0x0100007FUL
695 #define TIMER_DTCTRL_DTEN (0x1UL << 0)
696 #define _TIMER_DTCTRL_DTEN_SHIFT 0
697 #define _TIMER_DTCTRL_DTEN_MASK 0x1UL
698 #define _TIMER_DTCTRL_DTEN_DEFAULT 0x00000000UL
699 #define TIMER_DTCTRL_DTEN_DEFAULT (_TIMER_DTCTRL_DTEN_DEFAULT << 0)
700 #define TIMER_DTCTRL_DTDAS (0x1UL << 1)
701 #define _TIMER_DTCTRL_DTDAS_SHIFT 1
702 #define _TIMER_DTCTRL_DTDAS_MASK 0x2UL
703 #define _TIMER_DTCTRL_DTDAS_DEFAULT 0x00000000UL
704 #define _TIMER_DTCTRL_DTDAS_NORESTART 0x00000000UL
705 #define _TIMER_DTCTRL_DTDAS_RESTART 0x00000001UL
706 #define TIMER_DTCTRL_DTDAS_DEFAULT (_TIMER_DTCTRL_DTDAS_DEFAULT << 1)
707 #define TIMER_DTCTRL_DTDAS_NORESTART (_TIMER_DTCTRL_DTDAS_NORESTART << 1)
708 #define TIMER_DTCTRL_DTDAS_RESTART (_TIMER_DTCTRL_DTDAS_RESTART << 1)
709 #define TIMER_DTCTRL_DTIPOL (0x1UL << 2)
710 #define _TIMER_DTCTRL_DTIPOL_SHIFT 2
711 #define _TIMER_DTCTRL_DTIPOL_MASK 0x4UL
712 #define _TIMER_DTCTRL_DTIPOL_DEFAULT 0x00000000UL
713 #define TIMER_DTCTRL_DTIPOL_DEFAULT (_TIMER_DTCTRL_DTIPOL_DEFAULT << 2)
714 #define TIMER_DTCTRL_DTCINV (0x1UL << 3)
715 #define _TIMER_DTCTRL_DTCINV_SHIFT 3
716 #define _TIMER_DTCTRL_DTCINV_MASK 0x8UL
717 #define _TIMER_DTCTRL_DTCINV_DEFAULT 0x00000000UL
718 #define TIMER_DTCTRL_DTCINV_DEFAULT (_TIMER_DTCTRL_DTCINV_DEFAULT << 3)
719 #define _TIMER_DTCTRL_DTPRSSEL_SHIFT 4
720 #define _TIMER_DTCTRL_DTPRSSEL_MASK 0x70UL
721 #define _TIMER_DTCTRL_DTPRSSEL_DEFAULT 0x00000000UL
722 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH0 0x00000000UL
723 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH1 0x00000001UL
724 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH2 0x00000002UL
725 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH3 0x00000003UL
726 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH4 0x00000004UL
727 #define _TIMER_DTCTRL_DTPRSSEL_PRSCH5 0x00000005UL
728 #define TIMER_DTCTRL_DTPRSSEL_DEFAULT (_TIMER_DTCTRL_DTPRSSEL_DEFAULT << 4)
729 #define TIMER_DTCTRL_DTPRSSEL_PRSCH0 (_TIMER_DTCTRL_DTPRSSEL_PRSCH0 << 4)
730 #define TIMER_DTCTRL_DTPRSSEL_PRSCH1 (_TIMER_DTCTRL_DTPRSSEL_PRSCH1 << 4)
731 #define TIMER_DTCTRL_DTPRSSEL_PRSCH2 (_TIMER_DTCTRL_DTPRSSEL_PRSCH2 << 4)
732 #define TIMER_DTCTRL_DTPRSSEL_PRSCH3 (_TIMER_DTCTRL_DTPRSSEL_PRSCH3 << 4)
733 #define TIMER_DTCTRL_DTPRSSEL_PRSCH4 (_TIMER_DTCTRL_DTPRSSEL_PRSCH4 << 4)
734 #define TIMER_DTCTRL_DTPRSSEL_PRSCH5 (_TIMER_DTCTRL_DTPRSSEL_PRSCH5 << 4)
735 #define TIMER_DTCTRL_DTPRSEN (0x1UL << 24)
736 #define _TIMER_DTCTRL_DTPRSEN_SHIFT 24
737 #define _TIMER_DTCTRL_DTPRSEN_MASK 0x1000000UL
738 #define _TIMER_DTCTRL_DTPRSEN_DEFAULT 0x00000000UL
739 #define TIMER_DTCTRL_DTPRSEN_DEFAULT (_TIMER_DTCTRL_DTPRSEN_DEFAULT << 24)
741 /* Bit fields for TIMER DTTIME */
742 #define _TIMER_DTTIME_RESETVALUE 0x00000000UL
743 #define _TIMER_DTTIME_MASK 0x003F3F0FUL
744 #define _TIMER_DTTIME_DTPRESC_SHIFT 0
745 #define _TIMER_DTTIME_DTPRESC_MASK 0xFUL
746 #define _TIMER_DTTIME_DTPRESC_DEFAULT 0x00000000UL
747 #define _TIMER_DTTIME_DTPRESC_DIV1 0x00000000UL
748 #define _TIMER_DTTIME_DTPRESC_DIV2 0x00000001UL
749 #define _TIMER_DTTIME_DTPRESC_DIV4 0x00000002UL
750 #define _TIMER_DTTIME_DTPRESC_DIV8 0x00000003UL
751 #define _TIMER_DTTIME_DTPRESC_DIV16 0x00000004UL
752 #define _TIMER_DTTIME_DTPRESC_DIV32 0x00000005UL
753 #define _TIMER_DTTIME_DTPRESC_DIV64 0x00000006UL
754 #define _TIMER_DTTIME_DTPRESC_DIV128 0x00000007UL
755 #define _TIMER_DTTIME_DTPRESC_DIV256 0x00000008UL
756 #define _TIMER_DTTIME_DTPRESC_DIV512 0x00000009UL
757 #define _TIMER_DTTIME_DTPRESC_DIV1024 0x0000000AUL
758 #define TIMER_DTTIME_DTPRESC_DEFAULT (_TIMER_DTTIME_DTPRESC_DEFAULT << 0)
759 #define TIMER_DTTIME_DTPRESC_DIV1 (_TIMER_DTTIME_DTPRESC_DIV1 << 0)
760 #define TIMER_DTTIME_DTPRESC_DIV2 (_TIMER_DTTIME_DTPRESC_DIV2 << 0)
761 #define TIMER_DTTIME_DTPRESC_DIV4 (_TIMER_DTTIME_DTPRESC_DIV4 << 0)
762 #define TIMER_DTTIME_DTPRESC_DIV8 (_TIMER_DTTIME_DTPRESC_DIV8 << 0)
763 #define TIMER_DTTIME_DTPRESC_DIV16 (_TIMER_DTTIME_DTPRESC_DIV16 << 0)
764 #define TIMER_DTTIME_DTPRESC_DIV32 (_TIMER_DTTIME_DTPRESC_DIV32 << 0)
765 #define TIMER_DTTIME_DTPRESC_DIV64 (_TIMER_DTTIME_DTPRESC_DIV64 << 0)
766 #define TIMER_DTTIME_DTPRESC_DIV128 (_TIMER_DTTIME_DTPRESC_DIV128 << 0)
767 #define TIMER_DTTIME_DTPRESC_DIV256 (_TIMER_DTTIME_DTPRESC_DIV256 << 0)
768 #define TIMER_DTTIME_DTPRESC_DIV512 (_TIMER_DTTIME_DTPRESC_DIV512 << 0)
769 #define TIMER_DTTIME_DTPRESC_DIV1024 (_TIMER_DTTIME_DTPRESC_DIV1024 << 0)
770 #define _TIMER_DTTIME_DTRISET_SHIFT 8
771 #define _TIMER_DTTIME_DTRISET_MASK 0x3F00UL
772 #define _TIMER_DTTIME_DTRISET_DEFAULT 0x00000000UL
773 #define TIMER_DTTIME_DTRISET_DEFAULT (_TIMER_DTTIME_DTRISET_DEFAULT << 8)
774 #define _TIMER_DTTIME_DTFALLT_SHIFT 16
775 #define _TIMER_DTTIME_DTFALLT_MASK 0x3F0000UL
776 #define _TIMER_DTTIME_DTFALLT_DEFAULT 0x00000000UL
777 #define TIMER_DTTIME_DTFALLT_DEFAULT (_TIMER_DTTIME_DTFALLT_DEFAULT << 16)
779 /* Bit fields for TIMER DTFC */
780 #define _TIMER_DTFC_RESETVALUE 0x00000000UL
781 #define _TIMER_DTFC_MASK 0x0F030707UL
782 #define _TIMER_DTFC_DTPRS0FSEL_SHIFT 0
783 #define _TIMER_DTFC_DTPRS0FSEL_MASK 0x7UL
784 #define _TIMER_DTFC_DTPRS0FSEL_DEFAULT 0x00000000UL
785 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH0 0x00000000UL
786 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH1 0x00000001UL
787 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH2 0x00000002UL
788 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH3 0x00000003UL
789 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH4 0x00000004UL
790 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH5 0x00000005UL
791 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH6 0x00000006UL
792 #define _TIMER_DTFC_DTPRS0FSEL_PRSCH7 0x00000007UL
793 #define TIMER_DTFC_DTPRS0FSEL_DEFAULT (_TIMER_DTFC_DTPRS0FSEL_DEFAULT << 0)
794 #define TIMER_DTFC_DTPRS0FSEL_PRSCH0 (_TIMER_DTFC_DTPRS0FSEL_PRSCH0 << 0)
795 #define TIMER_DTFC_DTPRS0FSEL_PRSCH1 (_TIMER_DTFC_DTPRS0FSEL_PRSCH1 << 0)
796 #define TIMER_DTFC_DTPRS0FSEL_PRSCH2 (_TIMER_DTFC_DTPRS0FSEL_PRSCH2 << 0)
797 #define TIMER_DTFC_DTPRS0FSEL_PRSCH3 (_TIMER_DTFC_DTPRS0FSEL_PRSCH3 << 0)
798 #define TIMER_DTFC_DTPRS0FSEL_PRSCH4 (_TIMER_DTFC_DTPRS0FSEL_PRSCH4 << 0)
799 #define TIMER_DTFC_DTPRS0FSEL_PRSCH5 (_TIMER_DTFC_DTPRS0FSEL_PRSCH5 << 0)
800 #define TIMER_DTFC_DTPRS0FSEL_PRSCH6 (_TIMER_DTFC_DTPRS0FSEL_PRSCH6 << 0)
801 #define TIMER_DTFC_DTPRS0FSEL_PRSCH7 (_TIMER_DTFC_DTPRS0FSEL_PRSCH7 << 0)
802 #define _TIMER_DTFC_DTPRS1FSEL_SHIFT 8
803 #define _TIMER_DTFC_DTPRS1FSEL_MASK 0x700UL
804 #define _TIMER_DTFC_DTPRS1FSEL_DEFAULT 0x00000000UL
805 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH0 0x00000000UL
806 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH1 0x00000001UL
807 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH2 0x00000002UL
808 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH3 0x00000003UL
809 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH4 0x00000004UL
810 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH5 0x00000005UL
811 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH6 0x00000006UL
812 #define _TIMER_DTFC_DTPRS1FSEL_PRSCH7 0x00000007UL
813 #define TIMER_DTFC_DTPRS1FSEL_DEFAULT (_TIMER_DTFC_DTPRS1FSEL_DEFAULT << 8)
814 #define TIMER_DTFC_DTPRS1FSEL_PRSCH0 (_TIMER_DTFC_DTPRS1FSEL_PRSCH0 << 8)
815 #define TIMER_DTFC_DTPRS1FSEL_PRSCH1 (_TIMER_DTFC_DTPRS1FSEL_PRSCH1 << 8)
816 #define TIMER_DTFC_DTPRS1FSEL_PRSCH2 (_TIMER_DTFC_DTPRS1FSEL_PRSCH2 << 8)
817 #define TIMER_DTFC_DTPRS1FSEL_PRSCH3 (_TIMER_DTFC_DTPRS1FSEL_PRSCH3 << 8)
818 #define TIMER_DTFC_DTPRS1FSEL_PRSCH4 (_TIMER_DTFC_DTPRS1FSEL_PRSCH4 << 8)
819 #define TIMER_DTFC_DTPRS1FSEL_PRSCH5 (_TIMER_DTFC_DTPRS1FSEL_PRSCH5 << 8)
820 #define TIMER_DTFC_DTPRS1FSEL_PRSCH6 (_TIMER_DTFC_DTPRS1FSEL_PRSCH6 << 8)
821 #define TIMER_DTFC_DTPRS1FSEL_PRSCH7 (_TIMER_DTFC_DTPRS1FSEL_PRSCH7 << 8)
822 #define _TIMER_DTFC_DTFA_SHIFT 16
823 #define _TIMER_DTFC_DTFA_MASK 0x30000UL
824 #define _TIMER_DTFC_DTFA_DEFAULT 0x00000000UL
825 #define _TIMER_DTFC_DTFA_NONE 0x00000000UL
826 #define _TIMER_DTFC_DTFA_INACTIVE 0x00000001UL
827 #define _TIMER_DTFC_DTFA_CLEAR 0x00000002UL
828 #define _TIMER_DTFC_DTFA_TRISTATE 0x00000003UL
829 #define TIMER_DTFC_DTFA_DEFAULT (_TIMER_DTFC_DTFA_DEFAULT << 16)
830 #define TIMER_DTFC_DTFA_NONE (_TIMER_DTFC_DTFA_NONE << 16)
831 #define TIMER_DTFC_DTFA_INACTIVE (_TIMER_DTFC_DTFA_INACTIVE << 16)
832 #define TIMER_DTFC_DTFA_CLEAR (_TIMER_DTFC_DTFA_CLEAR << 16)
833 #define TIMER_DTFC_DTFA_TRISTATE (_TIMER_DTFC_DTFA_TRISTATE << 16)
834 #define TIMER_DTFC_DTPRS0FEN (0x1UL << 24)
835 #define _TIMER_DTFC_DTPRS0FEN_SHIFT 24
836 #define _TIMER_DTFC_DTPRS0FEN_MASK 0x1000000UL
837 #define _TIMER_DTFC_DTPRS0FEN_DEFAULT 0x00000000UL
838 #define TIMER_DTFC_DTPRS0FEN_DEFAULT (_TIMER_DTFC_DTPRS0FEN_DEFAULT << 24)
839 #define TIMER_DTFC_DTPRS1FEN (0x1UL << 25)
840 #define _TIMER_DTFC_DTPRS1FEN_SHIFT 25
841 #define _TIMER_DTFC_DTPRS1FEN_MASK 0x2000000UL
842 #define _TIMER_DTFC_DTPRS1FEN_DEFAULT 0x00000000UL
843 #define TIMER_DTFC_DTPRS1FEN_DEFAULT (_TIMER_DTFC_DTPRS1FEN_DEFAULT << 25)
844 #define TIMER_DTFC_DTDBGFEN (0x1UL << 26)
845 #define _TIMER_DTFC_DTDBGFEN_SHIFT 26
846 #define _TIMER_DTFC_DTDBGFEN_MASK 0x4000000UL
847 #define _TIMER_DTFC_DTDBGFEN_DEFAULT 0x00000000UL
848 #define TIMER_DTFC_DTDBGFEN_DEFAULT (_TIMER_DTFC_DTDBGFEN_DEFAULT << 26)
849 #define TIMER_DTFC_DTLOCKUPFEN (0x1UL << 27)
850 #define _TIMER_DTFC_DTLOCKUPFEN_SHIFT 27
851 #define _TIMER_DTFC_DTLOCKUPFEN_MASK 0x8000000UL
852 #define _TIMER_DTFC_DTLOCKUPFEN_DEFAULT 0x00000000UL
853 #define TIMER_DTFC_DTLOCKUPFEN_DEFAULT (_TIMER_DTFC_DTLOCKUPFEN_DEFAULT << 27)
855 /* Bit fields for TIMER DTOGEN */
856 #define _TIMER_DTOGEN_RESETVALUE 0x00000000UL
857 #define _TIMER_DTOGEN_MASK 0x0000003FUL
858 #define TIMER_DTOGEN_DTOGCC0EN (0x1UL << 0)
859 #define _TIMER_DTOGEN_DTOGCC0EN_SHIFT 0
860 #define _TIMER_DTOGEN_DTOGCC0EN_MASK 0x1UL
861 #define _TIMER_DTOGEN_DTOGCC0EN_DEFAULT 0x00000000UL
862 #define TIMER_DTOGEN_DTOGCC0EN_DEFAULT (_TIMER_DTOGEN_DTOGCC0EN_DEFAULT << 0)
863 #define TIMER_DTOGEN_DTOGCC1EN (0x1UL << 1)
864 #define _TIMER_DTOGEN_DTOGCC1EN_SHIFT 1
865 #define _TIMER_DTOGEN_DTOGCC1EN_MASK 0x2UL
866 #define _TIMER_DTOGEN_DTOGCC1EN_DEFAULT 0x00000000UL
867 #define TIMER_DTOGEN_DTOGCC1EN_DEFAULT (_TIMER_DTOGEN_DTOGCC1EN_DEFAULT << 1)
868 #define TIMER_DTOGEN_DTOGCC2EN (0x1UL << 2)
869 #define _TIMER_DTOGEN_DTOGCC2EN_SHIFT 2
870 #define _TIMER_DTOGEN_DTOGCC2EN_MASK 0x4UL
871 #define _TIMER_DTOGEN_DTOGCC2EN_DEFAULT 0x00000000UL
872 #define TIMER_DTOGEN_DTOGCC2EN_DEFAULT (_TIMER_DTOGEN_DTOGCC2EN_DEFAULT << 2)
873 #define TIMER_DTOGEN_DTOGCDTI0EN (0x1UL << 3)
874 #define _TIMER_DTOGEN_DTOGCDTI0EN_SHIFT 3
875 #define _TIMER_DTOGEN_DTOGCDTI0EN_MASK 0x8UL
876 #define _TIMER_DTOGEN_DTOGCDTI0EN_DEFAULT 0x00000000UL
877 #define TIMER_DTOGEN_DTOGCDTI0EN_DEFAULT (_TIMER_DTOGEN_DTOGCDTI0EN_DEFAULT << 3)
878 #define TIMER_DTOGEN_DTOGCDTI1EN (0x1UL << 4)
879 #define _TIMER_DTOGEN_DTOGCDTI1EN_SHIFT 4
880 #define _TIMER_DTOGEN_DTOGCDTI1EN_MASK 0x10UL
881 #define _TIMER_DTOGEN_DTOGCDTI1EN_DEFAULT 0x00000000UL
882 #define TIMER_DTOGEN_DTOGCDTI1EN_DEFAULT (_TIMER_DTOGEN_DTOGCDTI1EN_DEFAULT << 4)
883 #define TIMER_DTOGEN_DTOGCDTI2EN (0x1UL << 5)
884 #define _TIMER_DTOGEN_DTOGCDTI2EN_SHIFT 5
885 #define _TIMER_DTOGEN_DTOGCDTI2EN_MASK 0x20UL
886 #define _TIMER_DTOGEN_DTOGCDTI2EN_DEFAULT 0x00000000UL
887 #define TIMER_DTOGEN_DTOGCDTI2EN_DEFAULT (_TIMER_DTOGEN_DTOGCDTI2EN_DEFAULT << 5)
889 /* Bit fields for TIMER DTFAULT */
890 #define _TIMER_DTFAULT_RESETVALUE 0x00000000UL
891 #define _TIMER_DTFAULT_MASK 0x0000000FUL
892 #define TIMER_DTFAULT_DTPRS0F (0x1UL << 0)
893 #define _TIMER_DTFAULT_DTPRS0F_SHIFT 0
894 #define _TIMER_DTFAULT_DTPRS0F_MASK 0x1UL
895 #define _TIMER_DTFAULT_DTPRS0F_DEFAULT 0x00000000UL
896 #define TIMER_DTFAULT_DTPRS0F_DEFAULT (_TIMER_DTFAULT_DTPRS0F_DEFAULT << 0)
897 #define TIMER_DTFAULT_DTPRS1F (0x1UL << 1)
898 #define _TIMER_DTFAULT_DTPRS1F_SHIFT 1
899 #define _TIMER_DTFAULT_DTPRS1F_MASK 0x2UL
900 #define _TIMER_DTFAULT_DTPRS1F_DEFAULT 0x00000000UL
901 #define TIMER_DTFAULT_DTPRS1F_DEFAULT (_TIMER_DTFAULT_DTPRS1F_DEFAULT << 1)
902 #define TIMER_DTFAULT_DTDBGF (0x1UL << 2)
903 #define _TIMER_DTFAULT_DTDBGF_SHIFT 2
904 #define _TIMER_DTFAULT_DTDBGF_MASK 0x4UL
905 #define _TIMER_DTFAULT_DTDBGF_DEFAULT 0x00000000UL
906 #define TIMER_DTFAULT_DTDBGF_DEFAULT (_TIMER_DTFAULT_DTDBGF_DEFAULT << 2)
907 #define TIMER_DTFAULT_DTLOCKUPF (0x1UL << 3)
908 #define _TIMER_DTFAULT_DTLOCKUPF_SHIFT 3
909 #define _TIMER_DTFAULT_DTLOCKUPF_MASK 0x8UL
910 #define _TIMER_DTFAULT_DTLOCKUPF_DEFAULT 0x00000000UL
911 #define TIMER_DTFAULT_DTLOCKUPF_DEFAULT (_TIMER_DTFAULT_DTLOCKUPF_DEFAULT << 3)
913 /* Bit fields for TIMER DTFAULTC */
914 #define _TIMER_DTFAULTC_RESETVALUE 0x00000000UL
915 #define _TIMER_DTFAULTC_MASK 0x0000000FUL
916 #define TIMER_DTFAULTC_DTPRS0FC (0x1UL << 0)
917 #define _TIMER_DTFAULTC_DTPRS0FC_SHIFT 0
918 #define _TIMER_DTFAULTC_DTPRS0FC_MASK 0x1UL
919 #define _TIMER_DTFAULTC_DTPRS0FC_DEFAULT 0x00000000UL
920 #define TIMER_DTFAULTC_DTPRS0FC_DEFAULT (_TIMER_DTFAULTC_DTPRS0FC_DEFAULT << 0)
921 #define TIMER_DTFAULTC_DTPRS1FC (0x1UL << 1)
922 #define _TIMER_DTFAULTC_DTPRS1FC_SHIFT 1
923 #define _TIMER_DTFAULTC_DTPRS1FC_MASK 0x2UL
924 #define _TIMER_DTFAULTC_DTPRS1FC_DEFAULT 0x00000000UL
925 #define TIMER_DTFAULTC_DTPRS1FC_DEFAULT (_TIMER_DTFAULTC_DTPRS1FC_DEFAULT << 1)
926 #define TIMER_DTFAULTC_DTDBGFC (0x1UL << 2)
927 #define _TIMER_DTFAULTC_DTDBGFC_SHIFT 2
928 #define _TIMER_DTFAULTC_DTDBGFC_MASK 0x4UL
929 #define _TIMER_DTFAULTC_DTDBGFC_DEFAULT 0x00000000UL
930 #define TIMER_DTFAULTC_DTDBGFC_DEFAULT (_TIMER_DTFAULTC_DTDBGFC_DEFAULT << 2)
931 #define TIMER_DTFAULTC_TLOCKUPFC (0x1UL << 3)
932 #define _TIMER_DTFAULTC_TLOCKUPFC_SHIFT 3
933 #define _TIMER_DTFAULTC_TLOCKUPFC_MASK 0x8UL
934 #define _TIMER_DTFAULTC_TLOCKUPFC_DEFAULT 0x00000000UL
935 #define TIMER_DTFAULTC_TLOCKUPFC_DEFAULT (_TIMER_DTFAULTC_TLOCKUPFC_DEFAULT << 3)
937 /* Bit fields for TIMER DTLOCK */
938 #define _TIMER_DTLOCK_RESETVALUE 0x00000000UL
939 #define _TIMER_DTLOCK_MASK 0x0000FFFFUL
940 #define _TIMER_DTLOCK_LOCKKEY_SHIFT 0
941 #define _TIMER_DTLOCK_LOCKKEY_MASK 0xFFFFUL
942 #define _TIMER_DTLOCK_LOCKKEY_DEFAULT 0x00000000UL
943 #define _TIMER_DTLOCK_LOCKKEY_LOCK 0x00000000UL
944 #define _TIMER_DTLOCK_LOCKKEY_UNLOCKED 0x00000000UL
945 #define _TIMER_DTLOCK_LOCKKEY_LOCKED 0x00000001UL
946 #define _TIMER_DTLOCK_LOCKKEY_UNLOCK 0x0000CE80UL
947 #define TIMER_DTLOCK_LOCKKEY_DEFAULT (_TIMER_DTLOCK_LOCKKEY_DEFAULT << 0)
948 #define TIMER_DTLOCK_LOCKKEY_LOCK (_TIMER_DTLOCK_LOCKKEY_LOCK << 0)
949 #define TIMER_DTLOCK_LOCKKEY_UNLOCKED (_TIMER_DTLOCK_LOCKKEY_UNLOCKED << 0)
950 #define TIMER_DTLOCK_LOCKKEY_LOCKED (_TIMER_DTLOCK_LOCKKEY_LOCKED << 0)
951 #define TIMER_DTLOCK_LOCKKEY_UNLOCK (_TIMER_DTLOCK_LOCKKEY_UNLOCK << 0)
__IM uint32_t STATUS
Definition: ezr32hg_timer.h:45
__IOM uint32_t TOP
Definition: ezr32hg_timer.h:50
__IM uint32_t IF
Definition: ezr32hg_timer.h:47
__IOM uint32_t DTTIME
Definition: ezr32hg_timer.h:60
TIMER_CC EZR32HG TIMER CC.
__IOM uint32_t TOPB
Definition: ezr32hg_timer.h:51
__OM uint32_t DTFAULTC
Definition: ezr32hg_timer.h:64
__IM uint32_t DTFAULT
Definition: ezr32hg_timer.h:63
__IOM uint32_t DTOGEN
Definition: ezr32hg_timer.h:62
__IOM uint32_t DTCTRL
Definition: ezr32hg_timer.h:59
__IOM uint32_t IFC
Definition: ezr32hg_timer.h:49
__IOM uint32_t CNT
Definition: ezr32hg_timer.h:52
__IOM uint32_t ROUTE
Definition: ezr32hg_timer.h:53
__IOM uint32_t DTLOCK
Definition: ezr32hg_timer.h:65
__IOM uint32_t CMD
Definition: ezr32hg_timer.h:44
__IOM uint32_t IFS
Definition: ezr32hg_timer.h:48
__IOM uint32_t CTRL
Definition: ezr32hg_timer.h:43
__IOM uint32_t IEN
Definition: ezr32hg_timer.h:46
__IOM uint32_t DTFC
Definition: ezr32hg_timer.h:61