79 #if defined( BITBAND_RAM_BASE )
83 *(
volatile uint32_t *)aliasAddr = (uint32_t)val;
88 *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
117 #if defined( BITBAND_RAM_BASE )
121 return *(
volatile uint32_t *)aliasAddr;
123 return ((*addr) >> bit) & 1;
152 #if defined( BITBAND_PER_BASE )
156 *(
volatile uint32_t *)aliasAddr = (uint32_t)val;
158 uint32_t tmp = *addr;
161 *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
190 #if defined( BITBAND_PER_BASE )
194 return *(
volatile uint32_t *)aliasAddr;
196 return ((*addr) >> bit) & 1;
224 #if defined( PER_BITSET_MEM_BASE )
226 *(
volatile uint32_t *)aliasAddr = mask;
256 #if defined( PER_BITCLR_MEM_BASE )
258 *(
volatile uint32_t *)aliasAddr = mask;
292 #if defined( PER_BITCLR_MEM_BASE )
296 *addr = (*addr & ~mask) | val;
__STATIC_INLINE void BUS_RamBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a 32-bit word in RAM.
CMSIS Cortex-M Peripheral Access Layer for Silicon Laboratories microcontroller devices.
__STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a peripheral register.
#define PER_BITSET_MEM_BASE
__STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr, uint32_t mask)
Perform a masked set operation on peripheral register address.
__STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr, uint32_t mask)
Perform a masked clear operation on peripheral register address.
__STATIC_INLINE uint32_t BUS_RegMaskedRead(volatile const uint32_t *addr, uint32_t mask)
Perform a peripheral register masked read.
__STATIC_INLINE unsigned int BUS_RamBitRead(volatile const uint32_t *addr, unsigned int bit)
Perform a single-bit read operation on a 32-bit word in RAM.
__STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, uint32_t mask, uint32_t val)
Perform peripheral register masked clear and value write.
__STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr, unsigned int bit, unsigned int val)
Perform a single-bit write operation on a peripheral register.
#define PER_BITCLR_MEM_BASE