Detailed Description

EFR32MG13P_IDAC register and bit field definitions.

Version: 5.1.2

License

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. has no obligation to support this Software. Silicon Laboratories, Inc. is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file efr32mg13p_idac.h.

Go to the source code of this file.

Data Structures
struct	IDAC_TypeDef

Macros
#define	_IDAC_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL

#define	_IDAC_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2

#define	_IDAC_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL

#define	_IDAC_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3

#define	_IDAC_APORTCONFLICT_MASK 0x0000000CUL

#define	_IDAC_APORTCONFLICT_RESETVALUE 0x00000000UL

#define	_IDAC_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL

#define	_IDAC_APORTREQ_APORT1XREQ_MASK 0x4UL

#define	_IDAC_APORTREQ_APORT1XREQ_SHIFT 2

#define	_IDAC_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL

#define	_IDAC_APORTREQ_APORT1YREQ_MASK 0x8UL

#define	_IDAC_APORTREQ_APORT1YREQ_SHIFT 3

#define	_IDAC_APORTREQ_MASK 0x0000000CUL

#define	_IDAC_APORTREQ_RESETVALUE 0x00000000UL

#define	_IDAC_CTRL_APORTMASTERDIS_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_APORTMASTERDIS_MASK 0x4000UL

#define	_IDAC_CTRL_APORTMASTERDIS_SHIFT 14

#define	_IDAC_CTRL_APORTOUTEN_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_APORTOUTEN_MASK 0x8UL

#define	_IDAC_CTRL_APORTOUTEN_SHIFT 3

#define	_IDAC_CTRL_APORTOUTENPRS_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_APORTOUTENPRS_MASK 0x10000UL

#define	_IDAC_CTRL_APORTOUTENPRS_SHIFT 16

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH0 0x00000020UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH10 0x0000002AUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH12 0x0000002CUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH14 0x0000002EUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH16 0x00000030UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH18 0x00000032UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH2 0x00000022UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH20 0x00000034UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH22 0x00000036UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH24 0x00000038UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH26 0x0000003AUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH28 0x0000003CUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH30 0x0000003EUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH4 0x00000024UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH6 0x00000026UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1XCH8 0x00000028UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH1 0x00000021UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH11 0x0000002BUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH13 0x0000002DUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH15 0x0000002FUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH17 0x00000031UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH19 0x00000033UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH21 0x00000035UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH23 0x00000037UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH25 0x00000039UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH27 0x0000003BUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH29 0x0000003DUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH3 0x00000023UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH31 0x0000003FUL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH5 0x00000025UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH7 0x00000027UL

#define	_IDAC_CTRL_APORTOUTSEL_APORT1YCH9 0x00000029UL

#define	_IDAC_CTRL_APORTOUTSEL_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_APORTOUTSEL_MASK 0xFF0UL

#define	_IDAC_CTRL_APORTOUTSEL_SHIFT 4

#define	_IDAC_CTRL_CURSINK_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_CURSINK_MASK 0x2UL

#define	_IDAC_CTRL_CURSINK_SHIFT 1

#define	_IDAC_CTRL_EM2DELAY_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_EM2DELAY_MASK 0x2000UL

#define	_IDAC_CTRL_EM2DELAY_SHIFT 13

#define	_IDAC_CTRL_EN_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_EN_MASK 0x1UL

#define	_IDAC_CTRL_EN_SHIFT 0

#define	_IDAC_CTRL_MAINOUTEN_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_MAINOUTEN_MASK 0x40000UL

#define	_IDAC_CTRL_MAINOUTEN_SHIFT 18

#define	_IDAC_CTRL_MAINOUTENPRS_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_MAINOUTENPRS_MASK 0x80000UL

#define	_IDAC_CTRL_MAINOUTENPRS_SHIFT 19

#define	_IDAC_CTRL_MASK 0x00FD7FFFUL

#define	_IDAC_CTRL_MINOUTTRANS_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_MINOUTTRANS_MASK 0x4UL

#define	_IDAC_CTRL_MINOUTTRANS_SHIFT 2

#define	_IDAC_CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_PRSSEL_MASK 0xF00000UL

#define	_IDAC_CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_IDAC_CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_IDAC_CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_IDAC_CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_IDAC_CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_IDAC_CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_IDAC_CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_IDAC_CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_IDAC_CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_IDAC_CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_IDAC_CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_IDAC_CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_IDAC_CTRL_PRSSEL_SHIFT 20

#define	_IDAC_CTRL_PWRSEL_ANA 0x00000000UL

#define	_IDAC_CTRL_PWRSEL_DEFAULT 0x00000000UL

#define	_IDAC_CTRL_PWRSEL_IO 0x00000001UL

#define	_IDAC_CTRL_PWRSEL_MASK 0x1000UL

#define	_IDAC_CTRL_PWRSEL_SHIFT 12

#define	_IDAC_CTRL_RESETVALUE 0x00000000UL

#define	_IDAC_CURPROG_MASK 0x00FF1F03UL

#define	_IDAC_CURPROG_RANGESEL_DEFAULT 0x00000000UL

#define	_IDAC_CURPROG_RANGESEL_MASK 0x3UL

#define	_IDAC_CURPROG_RANGESEL_RANGE0 0x00000000UL

#define	_IDAC_CURPROG_RANGESEL_RANGE1 0x00000001UL

#define	_IDAC_CURPROG_RANGESEL_RANGE2 0x00000002UL

#define	_IDAC_CURPROG_RANGESEL_RANGE3 0x00000003UL

#define	_IDAC_CURPROG_RANGESEL_SHIFT 0

#define	_IDAC_CURPROG_RESETVALUE 0x009B0000UL

#define	_IDAC_CURPROG_STEPSEL_DEFAULT 0x00000000UL

#define	_IDAC_CURPROG_STEPSEL_MASK 0x1F00UL

#define	_IDAC_CURPROG_STEPSEL_SHIFT 8

#define	_IDAC_CURPROG_TUNING_DEFAULT 0x0000009BUL

#define	_IDAC_CURPROG_TUNING_MASK 0xFF0000UL

#define	_IDAC_CURPROG_TUNING_SHIFT 16

#define	_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT 0x00000000UL

#define	_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK 0x2UL

#define	_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT 1

#define	_IDAC_DUTYCONFIG_MASK 0x00000002UL

#define	_IDAC_DUTYCONFIG_RESETVALUE 0x00000000UL

#define	_IDAC_IEN_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_IEN_APORTCONFLICT_MASK 0x2UL

#define	_IDAC_IEN_APORTCONFLICT_SHIFT 1

#define	_IDAC_IEN_MASK 0x00000002UL

#define	_IDAC_IEN_RESETVALUE 0x00000000UL

#define	_IDAC_IF_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_IF_APORTCONFLICT_MASK 0x2UL

#define	_IDAC_IF_APORTCONFLICT_SHIFT 1

#define	_IDAC_IF_MASK 0x00000002UL

#define	_IDAC_IF_RESETVALUE 0x00000000UL

#define	_IDAC_IFC_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_IFC_APORTCONFLICT_MASK 0x2UL

#define	_IDAC_IFC_APORTCONFLICT_SHIFT 1

#define	_IDAC_IFC_MASK 0x00000002UL

#define	_IDAC_IFC_RESETVALUE 0x00000000UL

#define	_IDAC_IFS_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_IFS_APORTCONFLICT_MASK 0x2UL

#define	_IDAC_IFS_APORTCONFLICT_SHIFT 1

#define	_IDAC_IFS_MASK 0x00000002UL

#define	_IDAC_IFS_RESETVALUE 0x00000000UL

#define	_IDAC_STATUS_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_IDAC_STATUS_APORTCONFLICT_MASK 0x2UL

#define	_IDAC_STATUS_APORTCONFLICT_SHIFT 1

#define	_IDAC_STATUS_MASK 0x00000002UL

#define	_IDAC_STATUS_RESETVALUE 0x00000000UL

#define	IDAC_APORTCONFLICT_APORT1XCONFLICT (0x1UL << 2)

#define	IDAC_APORTCONFLICT_APORT1XCONFLICT_DEFAULT (_IDAC_APORTCONFLICT_APORT1XCONFLICT_DEFAULT << 2)

#define	IDAC_APORTCONFLICT_APORT1YCONFLICT (0x1UL << 3)

#define	IDAC_APORTCONFLICT_APORT1YCONFLICT_DEFAULT (_IDAC_APORTCONFLICT_APORT1YCONFLICT_DEFAULT << 3)

#define	IDAC_APORTREQ_APORT1XREQ (0x1UL << 2)

#define	IDAC_APORTREQ_APORT1XREQ_DEFAULT (_IDAC_APORTREQ_APORT1XREQ_DEFAULT << 2)

#define	IDAC_APORTREQ_APORT1YREQ (0x1UL << 3)

#define	IDAC_APORTREQ_APORT1YREQ_DEFAULT (_IDAC_APORTREQ_APORT1YREQ_DEFAULT << 3)

#define	IDAC_CTRL_APORTMASTERDIS (0x1UL << 14)

#define	IDAC_CTRL_APORTMASTERDIS_DEFAULT (_IDAC_CTRL_APORTMASTERDIS_DEFAULT << 14)

#define	IDAC_CTRL_APORTOUTEN (0x1UL << 3)

#define	IDAC_CTRL_APORTOUTEN_DEFAULT (_IDAC_CTRL_APORTOUTEN_DEFAULT << 3)

#define	IDAC_CTRL_APORTOUTENPRS (0x1UL << 16)

#define	IDAC_CTRL_APORTOUTENPRS_DEFAULT (_IDAC_CTRL_APORTOUTENPRS_DEFAULT << 16)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH0 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH0 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH10 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH10 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH12 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH12 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH14 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH14 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH16 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH16 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH18 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH18 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH2 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH2 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH20 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH20 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH22 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH22 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH24 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH24 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH26 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH26 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH28 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH28 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH30 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH30 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH4 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH4 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH6 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH6 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1XCH8 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH8 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH1 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH1 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH11 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH11 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH13 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH13 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH15 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH15 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH17 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH17 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH19 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH19 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH21 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH21 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH23 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH23 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH25 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH25 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH27 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH27 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH29 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH29 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH3 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH3 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH31 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH31 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH5 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH5 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH7 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH7 << 4)

#define	IDAC_CTRL_APORTOUTSEL_APORT1YCH9 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH9 << 4)

#define	IDAC_CTRL_APORTOUTSEL_DEFAULT (_IDAC_CTRL_APORTOUTSEL_DEFAULT << 4)

#define	IDAC_CTRL_CURSINK (0x1UL << 1)

#define	IDAC_CTRL_CURSINK_DEFAULT (_IDAC_CTRL_CURSINK_DEFAULT << 1)

#define	IDAC_CTRL_EM2DELAY (0x1UL << 13)

#define	IDAC_CTRL_EM2DELAY_DEFAULT (_IDAC_CTRL_EM2DELAY_DEFAULT << 13)

#define	IDAC_CTRL_EN (0x1UL << 0)

#define	IDAC_CTRL_EN_DEFAULT (_IDAC_CTRL_EN_DEFAULT << 0)

#define	IDAC_CTRL_MAINOUTEN (0x1UL << 18)

#define	IDAC_CTRL_MAINOUTEN_DEFAULT (_IDAC_CTRL_MAINOUTEN_DEFAULT << 18)

#define	IDAC_CTRL_MAINOUTENPRS (0x1UL << 19)

#define	IDAC_CTRL_MAINOUTENPRS_DEFAULT (_IDAC_CTRL_MAINOUTENPRS_DEFAULT << 19)

#define	IDAC_CTRL_MINOUTTRANS (0x1UL << 2)

#define	IDAC_CTRL_MINOUTTRANS_DEFAULT (_IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)

#define	IDAC_CTRL_PRSSEL_DEFAULT (_IDAC_CTRL_PRSSEL_DEFAULT << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH0 (_IDAC_CTRL_PRSSEL_PRSCH0 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH1 (_IDAC_CTRL_PRSSEL_PRSCH1 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH10 (_IDAC_CTRL_PRSSEL_PRSCH10 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH11 (_IDAC_CTRL_PRSSEL_PRSCH11 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH2 (_IDAC_CTRL_PRSSEL_PRSCH2 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH3 (_IDAC_CTRL_PRSSEL_PRSCH3 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH4 (_IDAC_CTRL_PRSSEL_PRSCH4 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH5 (_IDAC_CTRL_PRSSEL_PRSCH5 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH6 (_IDAC_CTRL_PRSSEL_PRSCH6 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH7 (_IDAC_CTRL_PRSSEL_PRSCH7 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH8 (_IDAC_CTRL_PRSSEL_PRSCH8 << 20)

#define	IDAC_CTRL_PRSSEL_PRSCH9 (_IDAC_CTRL_PRSSEL_PRSCH9 << 20)

#define	IDAC_CTRL_PWRSEL (0x1UL << 12)

#define	IDAC_CTRL_PWRSEL_ANA (_IDAC_CTRL_PWRSEL_ANA << 12)

#define	IDAC_CTRL_PWRSEL_DEFAULT (_IDAC_CTRL_PWRSEL_DEFAULT << 12)

#define	IDAC_CTRL_PWRSEL_IO (_IDAC_CTRL_PWRSEL_IO << 12)

#define	IDAC_CURPROG_RANGESEL_DEFAULT (_IDAC_CURPROG_RANGESEL_DEFAULT << 0)

#define	IDAC_CURPROG_RANGESEL_RANGE0 (_IDAC_CURPROG_RANGESEL_RANGE0 << 0)

#define	IDAC_CURPROG_RANGESEL_RANGE1 (_IDAC_CURPROG_RANGESEL_RANGE1 << 0)

#define	IDAC_CURPROG_RANGESEL_RANGE2 (_IDAC_CURPROG_RANGESEL_RANGE2 << 0)

#define	IDAC_CURPROG_RANGESEL_RANGE3 (_IDAC_CURPROG_RANGESEL_RANGE3 << 0)

#define	IDAC_CURPROG_STEPSEL_DEFAULT (_IDAC_CURPROG_STEPSEL_DEFAULT << 8)

#define	IDAC_CURPROG_TUNING_DEFAULT (_IDAC_CURPROG_TUNING_DEFAULT << 16)

#define	IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS (0x1UL << 1)

#define	IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT (_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)

#define	IDAC_IEN_APORTCONFLICT (0x1UL << 1)

#define	IDAC_IEN_APORTCONFLICT_DEFAULT (_IDAC_IEN_APORTCONFLICT_DEFAULT << 1)

#define	IDAC_IF_APORTCONFLICT (0x1UL << 1)

#define	IDAC_IF_APORTCONFLICT_DEFAULT (_IDAC_IF_APORTCONFLICT_DEFAULT << 1)

#define	IDAC_IFC_APORTCONFLICT (0x1UL << 1)

#define	IDAC_IFC_APORTCONFLICT_DEFAULT (_IDAC_IFC_APORTCONFLICT_DEFAULT << 1)

#define	IDAC_IFS_APORTCONFLICT (0x1UL << 1)

#define	IDAC_IFS_APORTCONFLICT_DEFAULT (_IDAC_IFS_APORTCONFLICT_DEFAULT << 1)

#define	IDAC_STATUS_APORTCONFLICT (0x1UL << 1)

#define	IDAC_STATUS_APORTCONFLICT_DEFAULT (_IDAC_STATUS_APORTCONFLICT_DEFAULT << 1)

Detailed Description

License

Data Structures

Macros