em_csen.h File Reference

Detailed Description

Capacitive Sense Module (CSEN) peripheral API.

Version

5.1.2

License

Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

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2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
3. This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no obligation to support this Software. Silicon Labs is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Labs will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file em_csen.h.

#include "em_device.h"
#include <stdbool.h>
#include "em_bus.h"

Go to the source code of this file.

Data Structures
struct	CSEN_Init_TypeDef
struct	CSEN_InitMode_TypeDef

Macros
#define	CSEN_INIT_DEFAULT
#define	CSEN_INITMODE_DEFAULT

Enumerations
enum	CSEN_AccMode_TypeDef {   csenAccMode1 = _CSEN_CTRL_ACU_ACC1,   csenAccMode2 = _CSEN_CTRL_ACU_ACC2,   csenAccMode4 = _CSEN_CTRL_ACU_ACC4,   csenAccMode8 = _CSEN_CTRL_ACU_ACC8,   csenAccMode16 = _CSEN_CTRL_ACU_ACC16,   csenAccMode32 = _CSEN_CTRL_ACU_ACC32,   csenAccMode64 = _CSEN_CTRL_ACU_ACC64 }
enum	CSEN_CmpMode_TypeDef {   csenCmpModeDisabled = 0,   csenCmpModeGreater = CSEN_CTRL_CMPEN | CSEN_CTRL_CMPPOL_GT,   csenCmpModeLessOrEqual = CSEN_CTRL_CMPEN | CSEN_CTRL_CMPPOL_LTE,   csenCmpModeEMAWindow = CSEN_CTRL_EMACMPEN }
enum	CSEN_ConvSel_TypeDef {   csenConvSelSAR = CSEN_CTRL_CONVSEL_SAR,   csenConvSelSARChop = CSEN_CTRL_CONVSEL_SAR | CSEN_CTRL_CHOPEN_ENABLE,   csenConvSelDM = CSEN_CTRL_CONVSEL_DM,   csenConvSelDMChop = CSEN_CTRL_CONVSEL_DM | CSEN_CTRL_CHOPEN_ENABLE }
enum	CSEN_DMRes_TypeDef {   csenDMRes10 = _CSEN_DMCFG_CRMODE_DM10,   csenDMRes12 = _CSEN_DMCFG_CRMODE_DM12,   csenDMRes14 = _CSEN_DMCFG_CRMODE_DM14,   csenDMRes16 = _CSEN_DMCFG_CRMODE_DM16 }
enum	CSEN_DriveSel_TypeDef {   csenDriveSelFull = 0,   csenDriveSel1 = 1,   csenDriveSel2 = 2,   csenDriveSel3 = 3,   csenDriveSel4 = 4,   csenDriveSel5 = 5,   csenDriveSel6 = 6,   csenDriveSel7 = 7 }
enum	CSEN_EMASample_TypeDef {   csenEMASampleW1 = _CSEN_EMACTRL_EMASAMPLE_W1,   csenEMASampleW2 = _CSEN_EMACTRL_EMASAMPLE_W2,   csenEMASampleW4 = _CSEN_EMACTRL_EMASAMPLE_W4,   csenEMASampleW8 = _CSEN_EMACTRL_EMASAMPLE_W8,   csenEMASampleW16 = _CSEN_EMACTRL_EMASAMPLE_W16,   csenEMASampleW32 = _CSEN_EMACTRL_EMASAMPLE_W32,   csenEMASampleW64 = _CSEN_EMACTRL_EMASAMPLE_W64 }
enum	CSEN_GainSel_TypeDef {   csenGainSel1X = 0,   csenGainSel2X = 1,   csenGainSel3X = 2,   csenGainSel4X = 3,   csenGainSel5X = 4,   csenGainSel6X = 5,   csenGainSel7X = 6,   csenGainSel8X = 7 }
enum	CSEN_InputSel_TypeDef {   csenInputSelDefault = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT,   csenInputSelAPORT1CH0TO7 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7,   csenInputSelAPORT1CH8TO15 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15,   csenInputSelAPORT1CH16TO23 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23,   csenInputSelAPORT1CH24TO31 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31,   csenInputSelAPORT3CH0TO7 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7,   csenInputSelAPORT3CH8TO15 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15,   csenInputSelAPORT3CH16TO23 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23,   csenInputSelAPORT3CH24TO31 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 }
enum	CSEN_PCPrescale_TypeDef {   csenPCPrescaleDiv1 = _CSEN_TIMCTRL_PCPRESC_DIV1,   csenPCPrescaleDiv2 = _CSEN_TIMCTRL_PCPRESC_DIV2,   csenPCPrescaleDiv4 = _CSEN_TIMCTRL_PCPRESC_DIV4,   csenPCPrescaleDiv8 = _CSEN_TIMCTRL_PCPRESC_DIV8,   csenPCPrescaleDiv16 = _CSEN_TIMCTRL_PCPRESC_DIV16,   csenPCPrescaleDiv32 = _CSEN_TIMCTRL_PCPRESC_DIV32,   csenPCPrescaleDiv64 = _CSEN_TIMCTRL_PCPRESC_DIV64,   csenPCPrescaleDiv128 = _CSEN_TIMCTRL_PCPRESC_DIV128 }
enum	CSEN_PRSSel_TypeDef {   csenPRSSELCh0 = _CSEN_PRSSEL_PRSSEL_PRSCH0,   csenPRSSELCh1 = _CSEN_PRSSEL_PRSSEL_PRSCH1,   csenPRSSELCh2 = _CSEN_PRSSEL_PRSSEL_PRSCH2,   csenPRSSELCh3 = _CSEN_PRSSEL_PRSSEL_PRSCH3,   csenPRSSELCh4 = _CSEN_PRSSEL_PRSSEL_PRSCH4,   csenPRSSELCh5 = _CSEN_PRSSEL_PRSSEL_PRSCH5,   csenPRSSELCh6 = _CSEN_PRSSEL_PRSSEL_PRSCH6,   csenPRSSELCh7 = _CSEN_PRSSEL_PRSSEL_PRSCH7,   csenPRSSELCh8 = _CSEN_PRSSEL_PRSSEL_PRSCH8,   csenPRSSELCh9 = _CSEN_PRSSEL_PRSSEL_PRSCH9,   csenPRSSELCh10 = _CSEN_PRSSEL_PRSSEL_PRSCH10,   csenPRSSELCh11 = _CSEN_PRSSEL_PRSSEL_PRSCH11 }
enum	CSEN_ResetPhaseSel_TypeDef {   csenResetPhaseSel0 = 0,   csenResetPhaseSel1 = 1,   csenResetPhaseSel2 = 2,   csenResetPhaseSel3 = 3,   csenResetPhaseSel4 = 4,   csenResetPhaseSel5 = 5,   csenResetPhaseSel6 = 6,   csenResetPhaseSel7 = 7 }
enum	CSEN_SampleMode_TypeDef {   csenSampleModeBonded = CSEN_CTRL_CM_SGL | CSEN_CTRL_MCEN_ENABLE,   csenSampleModeSingle = CSEN_CTRL_CM_SGL,   csenSampleModeScan = CSEN_CTRL_CM_SCAN,   csenSampleModeContBonded = CSEN_CTRL_CM_CONTSGL | CSEN_CTRL_MCEN_ENABLE,   csenSampleModeContSingle = CSEN_CTRL_CM_CONTSGL,   csenSampleModeContScan = CSEN_CTRL_CM_CONTSCAN }
enum	CSEN_SARRes_TypeDef {   csenSARRes10 = _CSEN_CTRL_SARCR_CLK10,   csenSARRes12 = _CSEN_CTRL_SARCR_CLK12,   csenSARRes14 = _CSEN_CTRL_SARCR_CLK14,   csenSARRes16 = _CSEN_CTRL_SARCR_CLK16 }
enum	CSEN_SingleSel_TypeDef {   csenSingleSelDefault = _CSEN_SINGLECTRL_SINGLESEL_DEFAULT,   csenSingleSelAPORT1XCH0 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0,   csenSingleSelAPORT1YCH1 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1,   csenSingleSelAPORT1XCH2 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2,   csenSingleSelAPORT1YCH3 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3,   csenSingleSelAPORT1XCH4 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4,   csenSingleSelAPORT1YCH5 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5,   csenSingleSelAPORT1XCH6 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6,   csenSingleSelAPORT1YCH7 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7,   csenSingleSelAPORT1XCH8 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8,   csenSingleSelAPORT1YCH9 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9,   csenSingleSelAPORT1XCH10 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10,   csenSingleSelAPORT1YCH11 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11,   csenSingleSelAPORT1XCH12 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12,   csenSingleSelAPORT1YCH13 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13,   csenSingleSelAPORT1XCH14 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14,   csenSingleSelAPORT1YCH15 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15,   csenSingleSelAPORT1XCH16 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16,   csenSingleSelAPORT1YCH17 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17,   csenSingleSelAPORT1XCH18 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18,   csenSingleSelAPORT1YCH19 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19,   csenSingleSelAPORT1XCH20 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20,   csenSingleSelAPORT1YCH21 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21,   csenSingleSelAPORT1XCH22 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22,   csenSingleSelAPORT1YCH23 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23,   csenSingleSelAPORT1XCH24 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24,   csenSingleSelAPORT1YCH25 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25,   csenSingleSelAPORT1XCH26 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26,   csenSingleSelAPORT1YCH27 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27,   csenSingleSelAPORT1XCH28 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28,   csenSingleSelAPORT1YCH29 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29,   csenSingleSelAPORT1XCH30 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30,   csenSingleSelAPORT1YCH31 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31,   csenSingleSelAPORT3XCH0 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0,   csenSingleSelAPORT3YCH1 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1,   csenSingleSelAPORT3XCH2 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2,   csenSingleSelAPORT3YCH3 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3,   csenSingleSelAPORT3XCH4 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4,   csenSingleSelAPORT3YCH5 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5,   csenSingleSelAPORT3XCH6 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6,   csenSingleSelAPORT3YCH7 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7,   csenSingleSelAPORT3XCH8 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8,   csenSingleSelAPORT3YCH9 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9,   csenSingleSelAPORT3XCH10 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10,   csenSingleSelAPORT3YCH11 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11,   csenSingleSelAPORT3XCH12 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12,   csenSingleSelAPORT3YCH13 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13,   csenSingleSelAPORT3XCH14 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14,   csenSingleSelAPORT3YCH15 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15,   csenSingleSelAPORT3XCH16 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16,   csenSingleSelAPORT3YCH17 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17,   csenSingleSelAPORT3XCH18 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18,   csenSingleSelAPORT3YCH19 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19,   csenSingleSelAPORT3XCH20 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20,   csenSingleSelAPORT3YCH21 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21,   csenSingleSelAPORT3XCH22 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22,   csenSingleSelAPORT3YCH23 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23,   csenSingleSelAPORT3XCH24 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24,   csenSingleSelAPORT3YCH25 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25,   csenSingleSelAPORT3XCH26 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26,   csenSingleSelAPORT3YCH27 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27,   csenSingleSelAPORT3XCH28 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28,   csenSingleSelAPORT3YCH29 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29,   csenSingleSelAPORT3XCH30 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30,   csenSingleSelAPORT3YCH31 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 }
enum	CSEN_TrigSel_TypeDef {   csenTrigSelPRS = _CSEN_CTRL_STM_PRS,   csenTrigSelTimer = _CSEN_CTRL_STM_TIMER,   csenTrigSelStart = _CSEN_CTRL_STM_START }

Functions
__STATIC_INLINE uint32_t	CSEN_DataGet (CSEN_TypeDef *csen)
	Get last conversion result. More...
__STATIC_INLINE void	CSEN_Disable (CSEN_TypeDef *csen)
	Disables the CSEN. More...
void	CSEN_DMBaselineSet (CSEN_TypeDef *csen, uint32_t up, uint32_t down)
	Set the DM integrator initial value. More...
__STATIC_INLINE uint32_t	CSEN_EMAGet (CSEN_TypeDef *csen)
	Get last exponential moving average. More...
__STATIC_INLINE void	CSEN_EMASet (CSEN_TypeDef *csen, uint32_t ema)
	Set exponential moving average initial value. More...
__STATIC_INLINE void	CSEN_Enable (CSEN_TypeDef *csen)
	Enables the CSEN. More...
void	CSEN_Init (CSEN_TypeDef *csen, const CSEN_Init_TypeDef *init)
	Initialize CSEN. More...
void	CSEN_InitMode (CSEN_TypeDef *csen, const CSEN_InitMode_TypeDef *init)
	Initialize a CSEN measurement mode. More...
__STATIC_INLINE void	CSEN_IntClear (CSEN_TypeDef *csen, uint32_t flags)
	Clear one or more pending CSEN interrupts. More...
__STATIC_INLINE void	CSEN_IntDisable (CSEN_TypeDef *csen, uint32_t flags)
	Disable one or more CSEN interrupts. More...
__STATIC_INLINE void	CSEN_IntEnable (CSEN_TypeDef *csen, uint32_t flags)
	Enable one or more CSEN interrupts. More...
__STATIC_INLINE uint32_t	CSEN_IntGet (CSEN_TypeDef *csen)
	Get pending CSEN interrupt flags. More...
__STATIC_INLINE uint32_t	CSEN_IntGetEnabled (CSEN_TypeDef *csen)
	Get enabled and pending CSEN interrupt flags. Useful for handling more interrupt sources in the same interrupt handler. More...
__STATIC_INLINE void	CSEN_IntSet (CSEN_TypeDef *csen, uint32_t flags)
	Set one or more pending CSEN interrupts from SW. More...
__STATIC_INLINE bool	CSEN_IsBusy (CSEN_TypeDef *csen)
	Return CSEN conversion busy status. More...
void	CSEN_Reset (CSEN_TypeDef *csen)
	Reset CSEN to same state as after a HW reset. More...
__STATIC_INLINE void	CSEN_Start (CSEN_TypeDef *csen)
	Start scan sequence and/or single conversion. More...