EFR32 Mighty Gecko 12 Software Documentation  efr32mg12-doc-5.1.2
efr32mg12p_msc.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t READCTRL;
45  __IOM uint32_t WRITECTRL;
46  __IOM uint32_t WRITECMD;
47  __IOM uint32_t ADDRB;
48  uint32_t RESERVED0[1];
49  __IOM uint32_t WDATA;
50  __IM uint32_t STATUS;
52  uint32_t RESERVED1[4];
53  __IM uint32_t IF;
54  __IOM uint32_t IFS;
55  __IOM uint32_t IFC;
56  __IOM uint32_t IEN;
57  __IOM uint32_t LOCK;
58  __IOM uint32_t CACHECMD;
59  __IM uint32_t CACHEHITS;
60  __IM uint32_t CACHEMISSES;
62  uint32_t RESERVED2[1];
63  __IOM uint32_t MASSLOCK;
65  uint32_t RESERVED3[1];
66  __IOM uint32_t STARTUP;
68  uint32_t RESERVED4[4];
69  __IOM uint32_t BANKSWITCHLOCK;
70  __IOM uint32_t CMD;
72  uint32_t RESERVED5[6];
73  __IOM uint32_t BOOTLOADERCTRL;
74  __IOM uint32_t AAPUNLOCKCMD;
75  __IOM uint32_t CACHECONFIG0;
77  uint32_t RESERVED6[25];
78  __IOM uint32_t RAMCTRL;
79 } MSC_TypeDef;
81 /**************************************************************************/
86 /* Bit fields for MSC CTRL */
87 #define _MSC_CTRL_RESETVALUE 0x00000001UL
88 #define _MSC_CTRL_MASK 0x0000001FUL
89 #define MSC_CTRL_ADDRFAULTEN (0x1UL << 0)
90 #define _MSC_CTRL_ADDRFAULTEN_SHIFT 0
91 #define _MSC_CTRL_ADDRFAULTEN_MASK 0x1UL
92 #define _MSC_CTRL_ADDRFAULTEN_DEFAULT 0x00000001UL
93 #define MSC_CTRL_ADDRFAULTEN_DEFAULT (_MSC_CTRL_ADDRFAULTEN_DEFAULT << 0)
94 #define MSC_CTRL_CLKDISFAULTEN (0x1UL << 1)
95 #define _MSC_CTRL_CLKDISFAULTEN_SHIFT 1
96 #define _MSC_CTRL_CLKDISFAULTEN_MASK 0x2UL
97 #define _MSC_CTRL_CLKDISFAULTEN_DEFAULT 0x00000000UL
98 #define MSC_CTRL_CLKDISFAULTEN_DEFAULT (_MSC_CTRL_CLKDISFAULTEN_DEFAULT << 1)
99 #define MSC_CTRL_PWRUPONDEMAND (0x1UL << 2)
100 #define _MSC_CTRL_PWRUPONDEMAND_SHIFT 2
101 #define _MSC_CTRL_PWRUPONDEMAND_MASK 0x4UL
102 #define _MSC_CTRL_PWRUPONDEMAND_DEFAULT 0x00000000UL
103 #define MSC_CTRL_PWRUPONDEMAND_DEFAULT (_MSC_CTRL_PWRUPONDEMAND_DEFAULT << 2)
104 #define MSC_CTRL_IFCREADCLEAR (0x1UL << 3)
105 #define _MSC_CTRL_IFCREADCLEAR_SHIFT 3
106 #define _MSC_CTRL_IFCREADCLEAR_MASK 0x8UL
107 #define _MSC_CTRL_IFCREADCLEAR_DEFAULT 0x00000000UL
108 #define MSC_CTRL_IFCREADCLEAR_DEFAULT (_MSC_CTRL_IFCREADCLEAR_DEFAULT << 3)
109 #define MSC_CTRL_TIMEOUTFAULTEN (0x1UL << 4)
110 #define _MSC_CTRL_TIMEOUTFAULTEN_SHIFT 4
111 #define _MSC_CTRL_TIMEOUTFAULTEN_MASK 0x10UL
112 #define _MSC_CTRL_TIMEOUTFAULTEN_DEFAULT 0x00000000UL
113 #define MSC_CTRL_TIMEOUTFAULTEN_DEFAULT (_MSC_CTRL_TIMEOUTFAULTEN_DEFAULT << 4)
115 /* Bit fields for MSC READCTRL */
116 #define _MSC_READCTRL_RESETVALUE 0x01000100UL
117 #define _MSC_READCTRL_MASK 0x13000338UL
118 #define MSC_READCTRL_IFCDIS (0x1UL << 3)
119 #define _MSC_READCTRL_IFCDIS_SHIFT 3
120 #define _MSC_READCTRL_IFCDIS_MASK 0x8UL
121 #define _MSC_READCTRL_IFCDIS_DEFAULT 0x00000000UL
122 #define MSC_READCTRL_IFCDIS_DEFAULT (_MSC_READCTRL_IFCDIS_DEFAULT << 3)
123 #define MSC_READCTRL_AIDIS (0x1UL << 4)
124 #define _MSC_READCTRL_AIDIS_SHIFT 4
125 #define _MSC_READCTRL_AIDIS_MASK 0x10UL
126 #define _MSC_READCTRL_AIDIS_DEFAULT 0x00000000UL
127 #define MSC_READCTRL_AIDIS_DEFAULT (_MSC_READCTRL_AIDIS_DEFAULT << 4)
128 #define MSC_READCTRL_ICCDIS (0x1UL << 5)
129 #define _MSC_READCTRL_ICCDIS_SHIFT 5
130 #define _MSC_READCTRL_ICCDIS_MASK 0x20UL
131 #define _MSC_READCTRL_ICCDIS_DEFAULT 0x00000000UL
132 #define MSC_READCTRL_ICCDIS_DEFAULT (_MSC_READCTRL_ICCDIS_DEFAULT << 5)
133 #define MSC_READCTRL_PREFETCH (0x1UL << 8)
134 #define _MSC_READCTRL_PREFETCH_SHIFT 8
135 #define _MSC_READCTRL_PREFETCH_MASK 0x100UL
136 #define _MSC_READCTRL_PREFETCH_DEFAULT 0x00000001UL
137 #define MSC_READCTRL_PREFETCH_DEFAULT (_MSC_READCTRL_PREFETCH_DEFAULT << 8)
138 #define MSC_READCTRL_USEHPROT (0x1UL << 9)
139 #define _MSC_READCTRL_USEHPROT_SHIFT 9
140 #define _MSC_READCTRL_USEHPROT_MASK 0x200UL
141 #define _MSC_READCTRL_USEHPROT_DEFAULT 0x00000000UL
142 #define MSC_READCTRL_USEHPROT_DEFAULT (_MSC_READCTRL_USEHPROT_DEFAULT << 9)
143 #define _MSC_READCTRL_MODE_SHIFT 24
144 #define _MSC_READCTRL_MODE_MASK 0x3000000UL
145 #define _MSC_READCTRL_MODE_WS0 0x00000000UL
146 #define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL
147 #define _MSC_READCTRL_MODE_WS1 0x00000001UL
148 #define _MSC_READCTRL_MODE_WS2 0x00000002UL
149 #define _MSC_READCTRL_MODE_WS3 0x00000003UL
150 #define MSC_READCTRL_MODE_WS0 (_MSC_READCTRL_MODE_WS0 << 24)
151 #define MSC_READCTRL_MODE_DEFAULT (_MSC_READCTRL_MODE_DEFAULT << 24)
152 #define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24)
153 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24)
154 #define MSC_READCTRL_MODE_WS3 (_MSC_READCTRL_MODE_WS3 << 24)
155 #define MSC_READCTRL_SCBTP (0x1UL << 28)
156 #define _MSC_READCTRL_SCBTP_SHIFT 28
157 #define _MSC_READCTRL_SCBTP_MASK 0x10000000UL
158 #define _MSC_READCTRL_SCBTP_DEFAULT 0x00000000UL
159 #define MSC_READCTRL_SCBTP_DEFAULT (_MSC_READCTRL_SCBTP_DEFAULT << 28)
161 /* Bit fields for MSC WRITECTRL */
162 #define _MSC_WRITECTRL_RESETVALUE 0x00000000UL
163 #define _MSC_WRITECTRL_MASK 0x00000023UL
164 #define MSC_WRITECTRL_WREN (0x1UL << 0)
165 #define _MSC_WRITECTRL_WREN_SHIFT 0
166 #define _MSC_WRITECTRL_WREN_MASK 0x1UL
167 #define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL
168 #define MSC_WRITECTRL_WREN_DEFAULT (_MSC_WRITECTRL_WREN_DEFAULT << 0)
169 #define MSC_WRITECTRL_IRQERASEABORT (0x1UL << 1)
170 #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1
171 #define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL
172 #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL
173 #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)
174 #define MSC_WRITECTRL_RWWEN (0x1UL << 5)
175 #define _MSC_WRITECTRL_RWWEN_SHIFT 5
176 #define _MSC_WRITECTRL_RWWEN_MASK 0x20UL
177 #define _MSC_WRITECTRL_RWWEN_DEFAULT 0x00000000UL
178 #define MSC_WRITECTRL_RWWEN_DEFAULT (_MSC_WRITECTRL_RWWEN_DEFAULT << 5)
180 /* Bit fields for MSC WRITECMD */
181 #define _MSC_WRITECMD_RESETVALUE 0x00000000UL
182 #define _MSC_WRITECMD_MASK 0x0000133FUL
183 #define MSC_WRITECMD_LADDRIM (0x1UL << 0)
184 #define _MSC_WRITECMD_LADDRIM_SHIFT 0
185 #define _MSC_WRITECMD_LADDRIM_MASK 0x1UL
186 #define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL
187 #define MSC_WRITECMD_LADDRIM_DEFAULT (_MSC_WRITECMD_LADDRIM_DEFAULT << 0)
188 #define MSC_WRITECMD_ERASEPAGE (0x1UL << 1)
189 #define _MSC_WRITECMD_ERASEPAGE_SHIFT 1
190 #define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL
191 #define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL
192 #define MSC_WRITECMD_ERASEPAGE_DEFAULT (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)
193 #define MSC_WRITECMD_WRITEEND (0x1UL << 2)
194 #define _MSC_WRITECMD_WRITEEND_SHIFT 2
195 #define _MSC_WRITECMD_WRITEEND_MASK 0x4UL
196 #define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL
197 #define MSC_WRITECMD_WRITEEND_DEFAULT (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)
198 #define MSC_WRITECMD_WRITEONCE (0x1UL << 3)
199 #define _MSC_WRITECMD_WRITEONCE_SHIFT 3
200 #define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL
201 #define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL
202 #define MSC_WRITECMD_WRITEONCE_DEFAULT (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3)
203 #define MSC_WRITECMD_WRITETRIG (0x1UL << 4)
204 #define _MSC_WRITECMD_WRITETRIG_SHIFT 4
205 #define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL
206 #define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL
207 #define MSC_WRITECMD_WRITETRIG_DEFAULT (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4)
208 #define MSC_WRITECMD_ERASEABORT (0x1UL << 5)
209 #define _MSC_WRITECMD_ERASEABORT_SHIFT 5
210 #define _MSC_WRITECMD_ERASEABORT_MASK 0x20UL
211 #define _MSC_WRITECMD_ERASEABORT_DEFAULT 0x00000000UL
212 #define MSC_WRITECMD_ERASEABORT_DEFAULT (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)
213 #define MSC_WRITECMD_ERASEMAIN0 (0x1UL << 8)
214 #define _MSC_WRITECMD_ERASEMAIN0_SHIFT 8
215 #define _MSC_WRITECMD_ERASEMAIN0_MASK 0x100UL
216 #define _MSC_WRITECMD_ERASEMAIN0_DEFAULT 0x00000000UL
217 #define MSC_WRITECMD_ERASEMAIN0_DEFAULT (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)
218 #define MSC_WRITECMD_ERASEMAIN1 (0x1UL << 9)
219 #define _MSC_WRITECMD_ERASEMAIN1_SHIFT 9
220 #define _MSC_WRITECMD_ERASEMAIN1_MASK 0x200UL
221 #define _MSC_WRITECMD_ERASEMAIN1_DEFAULT 0x00000000UL
222 #define MSC_WRITECMD_ERASEMAIN1_DEFAULT (_MSC_WRITECMD_ERASEMAIN1_DEFAULT << 9)
223 #define MSC_WRITECMD_CLEARWDATA (0x1UL << 12)
224 #define _MSC_WRITECMD_CLEARWDATA_SHIFT 12
225 #define _MSC_WRITECMD_CLEARWDATA_MASK 0x1000UL
226 #define _MSC_WRITECMD_CLEARWDATA_DEFAULT 0x00000000UL
227 #define MSC_WRITECMD_CLEARWDATA_DEFAULT (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)
229 /* Bit fields for MSC ADDRB */
230 #define _MSC_ADDRB_RESETVALUE 0x00000000UL
231 #define _MSC_ADDRB_MASK 0xFFFFFFFFUL
232 #define _MSC_ADDRB_ADDRB_SHIFT 0
233 #define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL
234 #define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL
235 #define MSC_ADDRB_ADDRB_DEFAULT (_MSC_ADDRB_ADDRB_DEFAULT << 0)
237 /* Bit fields for MSC WDATA */
238 #define _MSC_WDATA_RESETVALUE 0x00000000UL
239 #define _MSC_WDATA_MASK 0xFFFFFFFFUL
240 #define _MSC_WDATA_WDATA_SHIFT 0
241 #define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL
242 #define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL
243 #define MSC_WDATA_WDATA_DEFAULT (_MSC_WDATA_WDATA_DEFAULT << 0)
245 /* Bit fields for MSC STATUS */
246 #define _MSC_STATUS_RESETVALUE 0x00000008UL
247 #define _MSC_STATUS_MASK 0xFF0000FFUL
248 #define MSC_STATUS_BUSY (0x1UL << 0)
249 #define _MSC_STATUS_BUSY_SHIFT 0
250 #define _MSC_STATUS_BUSY_MASK 0x1UL
251 #define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL
252 #define MSC_STATUS_BUSY_DEFAULT (_MSC_STATUS_BUSY_DEFAULT << 0)
253 #define MSC_STATUS_LOCKED (0x1UL << 1)
254 #define _MSC_STATUS_LOCKED_SHIFT 1
255 #define _MSC_STATUS_LOCKED_MASK 0x2UL
256 #define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL
257 #define MSC_STATUS_LOCKED_DEFAULT (_MSC_STATUS_LOCKED_DEFAULT << 1)
258 #define MSC_STATUS_INVADDR (0x1UL << 2)
259 #define _MSC_STATUS_INVADDR_SHIFT 2
260 #define _MSC_STATUS_INVADDR_MASK 0x4UL
261 #define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL
262 #define MSC_STATUS_INVADDR_DEFAULT (_MSC_STATUS_INVADDR_DEFAULT << 2)
263 #define MSC_STATUS_WDATAREADY (0x1UL << 3)
264 #define _MSC_STATUS_WDATAREADY_SHIFT 3
265 #define _MSC_STATUS_WDATAREADY_MASK 0x8UL
266 #define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL
267 #define MSC_STATUS_WDATAREADY_DEFAULT (_MSC_STATUS_WDATAREADY_DEFAULT << 3)
268 #define MSC_STATUS_WORDTIMEOUT (0x1UL << 4)
269 #define _MSC_STATUS_WORDTIMEOUT_SHIFT 4
270 #define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL
271 #define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL
272 #define MSC_STATUS_WORDTIMEOUT_DEFAULT (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4)
273 #define MSC_STATUS_ERASEABORTED (0x1UL << 5)
274 #define _MSC_STATUS_ERASEABORTED_SHIFT 5
275 #define _MSC_STATUS_ERASEABORTED_MASK 0x20UL
276 #define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL
277 #define MSC_STATUS_ERASEABORTED_DEFAULT (_MSC_STATUS_ERASEABORTED_DEFAULT << 5)
278 #define MSC_STATUS_PCRUNNING (0x1UL << 6)
279 #define _MSC_STATUS_PCRUNNING_SHIFT 6
280 #define _MSC_STATUS_PCRUNNING_MASK 0x40UL
281 #define _MSC_STATUS_PCRUNNING_DEFAULT 0x00000000UL
282 #define MSC_STATUS_PCRUNNING_DEFAULT (_MSC_STATUS_PCRUNNING_DEFAULT << 6)
283 #define MSC_STATUS_BANKSWITCHED (0x1UL << 7)
284 #define _MSC_STATUS_BANKSWITCHED_SHIFT 7
285 #define _MSC_STATUS_BANKSWITCHED_MASK 0x80UL
286 #define _MSC_STATUS_BANKSWITCHED_DEFAULT 0x00000000UL
287 #define MSC_STATUS_BANKSWITCHED_DEFAULT (_MSC_STATUS_BANKSWITCHED_DEFAULT << 7)
288 #define _MSC_STATUS_WDATAVALID_SHIFT 24
289 #define _MSC_STATUS_WDATAVALID_MASK 0xF000000UL
290 #define _MSC_STATUS_WDATAVALID_DEFAULT 0x00000000UL
291 #define MSC_STATUS_WDATAVALID_DEFAULT (_MSC_STATUS_WDATAVALID_DEFAULT << 24)
292 #define _MSC_STATUS_PWRUPCKBDFAILCOUNT_SHIFT 28
293 #define _MSC_STATUS_PWRUPCKBDFAILCOUNT_MASK 0xF0000000UL
294 #define _MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT 0x00000000UL
295 #define MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT (_MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT << 28)
297 /* Bit fields for MSC IF */
298 #define _MSC_IF_RESETVALUE 0x00000000UL
299 #define _MSC_IF_MASK 0x0000017FUL
300 #define MSC_IF_ERASE (0x1UL << 0)
301 #define _MSC_IF_ERASE_SHIFT 0
302 #define _MSC_IF_ERASE_MASK 0x1UL
303 #define _MSC_IF_ERASE_DEFAULT 0x00000000UL
304 #define MSC_IF_ERASE_DEFAULT (_MSC_IF_ERASE_DEFAULT << 0)
305 #define MSC_IF_WRITE (0x1UL << 1)
306 #define _MSC_IF_WRITE_SHIFT 1
307 #define _MSC_IF_WRITE_MASK 0x2UL
308 #define _MSC_IF_WRITE_DEFAULT 0x00000000UL
309 #define MSC_IF_WRITE_DEFAULT (_MSC_IF_WRITE_DEFAULT << 1)
310 #define MSC_IF_CHOF (0x1UL << 2)
311 #define _MSC_IF_CHOF_SHIFT 2
312 #define _MSC_IF_CHOF_MASK 0x4UL
313 #define _MSC_IF_CHOF_DEFAULT 0x00000000UL
314 #define MSC_IF_CHOF_DEFAULT (_MSC_IF_CHOF_DEFAULT << 2)
315 #define MSC_IF_CMOF (0x1UL << 3)
316 #define _MSC_IF_CMOF_SHIFT 3
317 #define _MSC_IF_CMOF_MASK 0x8UL
318 #define _MSC_IF_CMOF_DEFAULT 0x00000000UL
319 #define MSC_IF_CMOF_DEFAULT (_MSC_IF_CMOF_DEFAULT << 3)
320 #define MSC_IF_PWRUPF (0x1UL << 4)
321 #define _MSC_IF_PWRUPF_SHIFT 4
322 #define _MSC_IF_PWRUPF_MASK 0x10UL
323 #define _MSC_IF_PWRUPF_DEFAULT 0x00000000UL
324 #define MSC_IF_PWRUPF_DEFAULT (_MSC_IF_PWRUPF_DEFAULT << 4)
325 #define MSC_IF_ICACHERR (0x1UL << 5)
326 #define _MSC_IF_ICACHERR_SHIFT 5
327 #define _MSC_IF_ICACHERR_MASK 0x20UL
328 #define _MSC_IF_ICACHERR_DEFAULT 0x00000000UL
329 #define MSC_IF_ICACHERR_DEFAULT (_MSC_IF_ICACHERR_DEFAULT << 5)
330 #define MSC_IF_WDATAOV (0x1UL << 6)
331 #define _MSC_IF_WDATAOV_SHIFT 6
332 #define _MSC_IF_WDATAOV_MASK 0x40UL
333 #define _MSC_IF_WDATAOV_DEFAULT 0x00000000UL
334 #define MSC_IF_WDATAOV_DEFAULT (_MSC_IF_WDATAOV_DEFAULT << 6)
335 #define MSC_IF_LVEWRITE (0x1UL << 8)
336 #define _MSC_IF_LVEWRITE_SHIFT 8
337 #define _MSC_IF_LVEWRITE_MASK 0x100UL
338 #define _MSC_IF_LVEWRITE_DEFAULT 0x00000000UL
339 #define MSC_IF_LVEWRITE_DEFAULT (_MSC_IF_LVEWRITE_DEFAULT << 8)
341 /* Bit fields for MSC IFS */
342 #define _MSC_IFS_RESETVALUE 0x00000000UL
343 #define _MSC_IFS_MASK 0x0000017FUL
344 #define MSC_IFS_ERASE (0x1UL << 0)
345 #define _MSC_IFS_ERASE_SHIFT 0
346 #define _MSC_IFS_ERASE_MASK 0x1UL
347 #define _MSC_IFS_ERASE_DEFAULT 0x00000000UL
348 #define MSC_IFS_ERASE_DEFAULT (_MSC_IFS_ERASE_DEFAULT << 0)
349 #define MSC_IFS_WRITE (0x1UL << 1)
350 #define _MSC_IFS_WRITE_SHIFT 1
351 #define _MSC_IFS_WRITE_MASK 0x2UL
352 #define _MSC_IFS_WRITE_DEFAULT 0x00000000UL
353 #define MSC_IFS_WRITE_DEFAULT (_MSC_IFS_WRITE_DEFAULT << 1)
354 #define MSC_IFS_CHOF (0x1UL << 2)
355 #define _MSC_IFS_CHOF_SHIFT 2
356 #define _MSC_IFS_CHOF_MASK 0x4UL
357 #define _MSC_IFS_CHOF_DEFAULT 0x00000000UL
358 #define MSC_IFS_CHOF_DEFAULT (_MSC_IFS_CHOF_DEFAULT << 2)
359 #define MSC_IFS_CMOF (0x1UL << 3)
360 #define _MSC_IFS_CMOF_SHIFT 3
361 #define _MSC_IFS_CMOF_MASK 0x8UL
362 #define _MSC_IFS_CMOF_DEFAULT 0x00000000UL
363 #define MSC_IFS_CMOF_DEFAULT (_MSC_IFS_CMOF_DEFAULT << 3)
364 #define MSC_IFS_PWRUPF (0x1UL << 4)
365 #define _MSC_IFS_PWRUPF_SHIFT 4
366 #define _MSC_IFS_PWRUPF_MASK 0x10UL
367 #define _MSC_IFS_PWRUPF_DEFAULT 0x00000000UL
368 #define MSC_IFS_PWRUPF_DEFAULT (_MSC_IFS_PWRUPF_DEFAULT << 4)
369 #define MSC_IFS_ICACHERR (0x1UL << 5)
370 #define _MSC_IFS_ICACHERR_SHIFT 5
371 #define _MSC_IFS_ICACHERR_MASK 0x20UL
372 #define _MSC_IFS_ICACHERR_DEFAULT 0x00000000UL
373 #define MSC_IFS_ICACHERR_DEFAULT (_MSC_IFS_ICACHERR_DEFAULT << 5)
374 #define MSC_IFS_WDATAOV (0x1UL << 6)
375 #define _MSC_IFS_WDATAOV_SHIFT 6
376 #define _MSC_IFS_WDATAOV_MASK 0x40UL
377 #define _MSC_IFS_WDATAOV_DEFAULT 0x00000000UL
378 #define MSC_IFS_WDATAOV_DEFAULT (_MSC_IFS_WDATAOV_DEFAULT << 6)
379 #define MSC_IFS_LVEWRITE (0x1UL << 8)
380 #define _MSC_IFS_LVEWRITE_SHIFT 8
381 #define _MSC_IFS_LVEWRITE_MASK 0x100UL
382 #define _MSC_IFS_LVEWRITE_DEFAULT 0x00000000UL
383 #define MSC_IFS_LVEWRITE_DEFAULT (_MSC_IFS_LVEWRITE_DEFAULT << 8)
385 /* Bit fields for MSC IFC */
386 #define _MSC_IFC_RESETVALUE 0x00000000UL
387 #define _MSC_IFC_MASK 0x0000017FUL
388 #define MSC_IFC_ERASE (0x1UL << 0)
389 #define _MSC_IFC_ERASE_SHIFT 0
390 #define _MSC_IFC_ERASE_MASK 0x1UL
391 #define _MSC_IFC_ERASE_DEFAULT 0x00000000UL
392 #define MSC_IFC_ERASE_DEFAULT (_MSC_IFC_ERASE_DEFAULT << 0)
393 #define MSC_IFC_WRITE (0x1UL << 1)
394 #define _MSC_IFC_WRITE_SHIFT 1
395 #define _MSC_IFC_WRITE_MASK 0x2UL
396 #define _MSC_IFC_WRITE_DEFAULT 0x00000000UL
397 #define MSC_IFC_WRITE_DEFAULT (_MSC_IFC_WRITE_DEFAULT << 1)
398 #define MSC_IFC_CHOF (0x1UL << 2)
399 #define _MSC_IFC_CHOF_SHIFT 2
400 #define _MSC_IFC_CHOF_MASK 0x4UL
401 #define _MSC_IFC_CHOF_DEFAULT 0x00000000UL
402 #define MSC_IFC_CHOF_DEFAULT (_MSC_IFC_CHOF_DEFAULT << 2)
403 #define MSC_IFC_CMOF (0x1UL << 3)
404 #define _MSC_IFC_CMOF_SHIFT 3
405 #define _MSC_IFC_CMOF_MASK 0x8UL
406 #define _MSC_IFC_CMOF_DEFAULT 0x00000000UL
407 #define MSC_IFC_CMOF_DEFAULT (_MSC_IFC_CMOF_DEFAULT << 3)
408 #define MSC_IFC_PWRUPF (0x1UL << 4)
409 #define _MSC_IFC_PWRUPF_SHIFT 4
410 #define _MSC_IFC_PWRUPF_MASK 0x10UL
411 #define _MSC_IFC_PWRUPF_DEFAULT 0x00000000UL
412 #define MSC_IFC_PWRUPF_DEFAULT (_MSC_IFC_PWRUPF_DEFAULT << 4)
413 #define MSC_IFC_ICACHERR (0x1UL << 5)
414 #define _MSC_IFC_ICACHERR_SHIFT 5
415 #define _MSC_IFC_ICACHERR_MASK 0x20UL
416 #define _MSC_IFC_ICACHERR_DEFAULT 0x00000000UL
417 #define MSC_IFC_ICACHERR_DEFAULT (_MSC_IFC_ICACHERR_DEFAULT << 5)
418 #define MSC_IFC_WDATAOV (0x1UL << 6)
419 #define _MSC_IFC_WDATAOV_SHIFT 6
420 #define _MSC_IFC_WDATAOV_MASK 0x40UL
421 #define _MSC_IFC_WDATAOV_DEFAULT 0x00000000UL
422 #define MSC_IFC_WDATAOV_DEFAULT (_MSC_IFC_WDATAOV_DEFAULT << 6)
423 #define MSC_IFC_LVEWRITE (0x1UL << 8)
424 #define _MSC_IFC_LVEWRITE_SHIFT 8
425 #define _MSC_IFC_LVEWRITE_MASK 0x100UL
426 #define _MSC_IFC_LVEWRITE_DEFAULT 0x00000000UL
427 #define MSC_IFC_LVEWRITE_DEFAULT (_MSC_IFC_LVEWRITE_DEFAULT << 8)
429 /* Bit fields for MSC IEN */
430 #define _MSC_IEN_RESETVALUE 0x00000000UL
431 #define _MSC_IEN_MASK 0x0000017FUL
432 #define MSC_IEN_ERASE (0x1UL << 0)
433 #define _MSC_IEN_ERASE_SHIFT 0
434 #define _MSC_IEN_ERASE_MASK 0x1UL
435 #define _MSC_IEN_ERASE_DEFAULT 0x00000000UL
436 #define MSC_IEN_ERASE_DEFAULT (_MSC_IEN_ERASE_DEFAULT << 0)
437 #define MSC_IEN_WRITE (0x1UL << 1)
438 #define _MSC_IEN_WRITE_SHIFT 1
439 #define _MSC_IEN_WRITE_MASK 0x2UL
440 #define _MSC_IEN_WRITE_DEFAULT 0x00000000UL
441 #define MSC_IEN_WRITE_DEFAULT (_MSC_IEN_WRITE_DEFAULT << 1)
442 #define MSC_IEN_CHOF (0x1UL << 2)
443 #define _MSC_IEN_CHOF_SHIFT 2
444 #define _MSC_IEN_CHOF_MASK 0x4UL
445 #define _MSC_IEN_CHOF_DEFAULT 0x00000000UL
446 #define MSC_IEN_CHOF_DEFAULT (_MSC_IEN_CHOF_DEFAULT << 2)
447 #define MSC_IEN_CMOF (0x1UL << 3)
448 #define _MSC_IEN_CMOF_SHIFT 3
449 #define _MSC_IEN_CMOF_MASK 0x8UL
450 #define _MSC_IEN_CMOF_DEFAULT 0x00000000UL
451 #define MSC_IEN_CMOF_DEFAULT (_MSC_IEN_CMOF_DEFAULT << 3)
452 #define MSC_IEN_PWRUPF (0x1UL << 4)
453 #define _MSC_IEN_PWRUPF_SHIFT 4
454 #define _MSC_IEN_PWRUPF_MASK 0x10UL
455 #define _MSC_IEN_PWRUPF_DEFAULT 0x00000000UL
456 #define MSC_IEN_PWRUPF_DEFAULT (_MSC_IEN_PWRUPF_DEFAULT << 4)
457 #define MSC_IEN_ICACHERR (0x1UL << 5)
458 #define _MSC_IEN_ICACHERR_SHIFT 5
459 #define _MSC_IEN_ICACHERR_MASK 0x20UL
460 #define _MSC_IEN_ICACHERR_DEFAULT 0x00000000UL
461 #define MSC_IEN_ICACHERR_DEFAULT (_MSC_IEN_ICACHERR_DEFAULT << 5)
462 #define MSC_IEN_WDATAOV (0x1UL << 6)
463 #define _MSC_IEN_WDATAOV_SHIFT 6
464 #define _MSC_IEN_WDATAOV_MASK 0x40UL
465 #define _MSC_IEN_WDATAOV_DEFAULT 0x00000000UL
466 #define MSC_IEN_WDATAOV_DEFAULT (_MSC_IEN_WDATAOV_DEFAULT << 6)
467 #define MSC_IEN_LVEWRITE (0x1UL << 8)
468 #define _MSC_IEN_LVEWRITE_SHIFT 8
469 #define _MSC_IEN_LVEWRITE_MASK 0x100UL
470 #define _MSC_IEN_LVEWRITE_DEFAULT 0x00000000UL
471 #define MSC_IEN_LVEWRITE_DEFAULT (_MSC_IEN_LVEWRITE_DEFAULT << 8)
473 /* Bit fields for MSC LOCK */
474 #define _MSC_LOCK_RESETVALUE 0x00000000UL
475 #define _MSC_LOCK_MASK 0x0000FFFFUL
476 #define _MSC_LOCK_LOCKKEY_SHIFT 0
477 #define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL
478 #define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL
479 #define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL
480 #define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
481 #define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL
482 #define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL
483 #define MSC_LOCK_LOCKKEY_DEFAULT (_MSC_LOCK_LOCKKEY_DEFAULT << 0)
484 #define MSC_LOCK_LOCKKEY_LOCK (_MSC_LOCK_LOCKKEY_LOCK << 0)
485 #define MSC_LOCK_LOCKKEY_UNLOCKED (_MSC_LOCK_LOCKKEY_UNLOCKED << 0)
486 #define MSC_LOCK_LOCKKEY_LOCKED (_MSC_LOCK_LOCKKEY_LOCKED << 0)
487 #define MSC_LOCK_LOCKKEY_UNLOCK (_MSC_LOCK_LOCKKEY_UNLOCK << 0)
489 /* Bit fields for MSC CACHECMD */
490 #define _MSC_CACHECMD_RESETVALUE 0x00000000UL
491 #define _MSC_CACHECMD_MASK 0x00000007UL
492 #define MSC_CACHECMD_INVCACHE (0x1UL << 0)
493 #define _MSC_CACHECMD_INVCACHE_SHIFT 0
494 #define _MSC_CACHECMD_INVCACHE_MASK 0x1UL
495 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL
496 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0)
497 #define MSC_CACHECMD_STARTPC (0x1UL << 1)
498 #define _MSC_CACHECMD_STARTPC_SHIFT 1
499 #define _MSC_CACHECMD_STARTPC_MASK 0x2UL
500 #define _MSC_CACHECMD_STARTPC_DEFAULT 0x00000000UL
501 #define MSC_CACHECMD_STARTPC_DEFAULT (_MSC_CACHECMD_STARTPC_DEFAULT << 1)
502 #define MSC_CACHECMD_STOPPC (0x1UL << 2)
503 #define _MSC_CACHECMD_STOPPC_SHIFT 2
504 #define _MSC_CACHECMD_STOPPC_MASK 0x4UL
505 #define _MSC_CACHECMD_STOPPC_DEFAULT 0x00000000UL
506 #define MSC_CACHECMD_STOPPC_DEFAULT (_MSC_CACHECMD_STOPPC_DEFAULT << 2)
508 /* Bit fields for MSC CACHEHITS */
509 #define _MSC_CACHEHITS_RESETVALUE 0x00000000UL
510 #define _MSC_CACHEHITS_MASK 0x000FFFFFUL
511 #define _MSC_CACHEHITS_CACHEHITS_SHIFT 0
512 #define _MSC_CACHEHITS_CACHEHITS_MASK 0xFFFFFUL
513 #define _MSC_CACHEHITS_CACHEHITS_DEFAULT 0x00000000UL
514 #define MSC_CACHEHITS_CACHEHITS_DEFAULT (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0)
516 /* Bit fields for MSC CACHEMISSES */
517 #define _MSC_CACHEMISSES_RESETVALUE 0x00000000UL
518 #define _MSC_CACHEMISSES_MASK 0x000FFFFFUL
519 #define _MSC_CACHEMISSES_CACHEMISSES_SHIFT 0
520 #define _MSC_CACHEMISSES_CACHEMISSES_MASK 0xFFFFFUL
521 #define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT 0x00000000UL
522 #define MSC_CACHEMISSES_CACHEMISSES_DEFAULT (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0)
524 /* Bit fields for MSC MASSLOCK */
525 #define _MSC_MASSLOCK_RESETVALUE 0x00000001UL
526 #define _MSC_MASSLOCK_MASK 0x0000FFFFUL
527 #define _MSC_MASSLOCK_LOCKKEY_SHIFT 0
528 #define _MSC_MASSLOCK_LOCKKEY_MASK 0xFFFFUL
529 #define _MSC_MASSLOCK_LOCKKEY_LOCK 0x00000000UL
530 #define _MSC_MASSLOCK_LOCKKEY_UNLOCKED 0x00000000UL
531 #define _MSC_MASSLOCK_LOCKKEY_DEFAULT 0x00000001UL
532 #define _MSC_MASSLOCK_LOCKKEY_LOCKED 0x00000001UL
533 #define _MSC_MASSLOCK_LOCKKEY_UNLOCK 0x0000631AUL
534 #define MSC_MASSLOCK_LOCKKEY_LOCK (_MSC_MASSLOCK_LOCKKEY_LOCK << 0)
535 #define MSC_MASSLOCK_LOCKKEY_UNLOCKED (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0)
536 #define MSC_MASSLOCK_LOCKKEY_DEFAULT (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0)
537 #define MSC_MASSLOCK_LOCKKEY_LOCKED (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0)
538 #define MSC_MASSLOCK_LOCKKEY_UNLOCK (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0)
540 /* Bit fields for MSC STARTUP */
541 #define _MSC_STARTUP_RESETVALUE 0x1300104DUL
542 #define _MSC_STARTUP_MASK 0x773FF3FFUL
543 #define _MSC_STARTUP_STDLY0_SHIFT 0
544 #define _MSC_STARTUP_STDLY0_MASK 0x3FFUL
545 #define _MSC_STARTUP_STDLY0_DEFAULT 0x0000004DUL
546 #define MSC_STARTUP_STDLY0_DEFAULT (_MSC_STARTUP_STDLY0_DEFAULT << 0)
547 #define _MSC_STARTUP_STDLY1_SHIFT 12
548 #define _MSC_STARTUP_STDLY1_MASK 0x3FF000UL
549 #define _MSC_STARTUP_STDLY1_DEFAULT 0x00000001UL
550 #define MSC_STARTUP_STDLY1_DEFAULT (_MSC_STARTUP_STDLY1_DEFAULT << 12)
551 #define MSC_STARTUP_ASTWAIT (0x1UL << 24)
552 #define _MSC_STARTUP_ASTWAIT_SHIFT 24
553 #define _MSC_STARTUP_ASTWAIT_MASK 0x1000000UL
554 #define _MSC_STARTUP_ASTWAIT_DEFAULT 0x00000001UL
555 #define MSC_STARTUP_ASTWAIT_DEFAULT (_MSC_STARTUP_ASTWAIT_DEFAULT << 24)
556 #define MSC_STARTUP_STWSEN (0x1UL << 25)
557 #define _MSC_STARTUP_STWSEN_SHIFT 25
558 #define _MSC_STARTUP_STWSEN_MASK 0x2000000UL
559 #define _MSC_STARTUP_STWSEN_DEFAULT 0x00000001UL
560 #define MSC_STARTUP_STWSEN_DEFAULT (_MSC_STARTUP_STWSEN_DEFAULT << 25)
561 #define MSC_STARTUP_STWSAEN (0x1UL << 26)
562 #define _MSC_STARTUP_STWSAEN_SHIFT 26
563 #define _MSC_STARTUP_STWSAEN_MASK 0x4000000UL
564 #define _MSC_STARTUP_STWSAEN_DEFAULT 0x00000000UL
565 #define MSC_STARTUP_STWSAEN_DEFAULT (_MSC_STARTUP_STWSAEN_DEFAULT << 26)
566 #define _MSC_STARTUP_STWS_SHIFT 28
567 #define _MSC_STARTUP_STWS_MASK 0x70000000UL
568 #define _MSC_STARTUP_STWS_DEFAULT 0x00000001UL
569 #define MSC_STARTUP_STWS_DEFAULT (_MSC_STARTUP_STWS_DEFAULT << 28)
571 /* Bit fields for MSC BANKSWITCHLOCK */
572 #define _MSC_BANKSWITCHLOCK_RESETVALUE 0x00000001UL
573 #define _MSC_BANKSWITCHLOCK_MASK 0x0000FFFFUL
574 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_SHIFT 0
575 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_MASK 0xFFFFUL
576 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK 0x00000000UL
577 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED 0x00000000UL
578 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT 0x00000001UL
579 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED 0x00000001UL
580 #define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK 0x00007C2BUL
581 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK << 0)
582 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED << 0)
583 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT << 0)
584 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED << 0)
585 #define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK << 0)
587 /* Bit fields for MSC CMD */
588 #define _MSC_CMD_RESETVALUE 0x00000000UL
589 #define _MSC_CMD_MASK 0x00000003UL
590 #define MSC_CMD_PWRUP (0x1UL << 0)
591 #define _MSC_CMD_PWRUP_SHIFT 0
592 #define _MSC_CMD_PWRUP_MASK 0x1UL
593 #define _MSC_CMD_PWRUP_DEFAULT 0x00000000UL
594 #define MSC_CMD_PWRUP_DEFAULT (_MSC_CMD_PWRUP_DEFAULT << 0)
595 #define MSC_CMD_SWITCHINGBANK (0x1UL << 1)
596 #define _MSC_CMD_SWITCHINGBANK_SHIFT 1
597 #define _MSC_CMD_SWITCHINGBANK_MASK 0x2UL
598 #define _MSC_CMD_SWITCHINGBANK_DEFAULT 0x00000000UL
599 #define MSC_CMD_SWITCHINGBANK_DEFAULT (_MSC_CMD_SWITCHINGBANK_DEFAULT << 1)
601 /* Bit fields for MSC BOOTLOADERCTRL */
602 #define _MSC_BOOTLOADERCTRL_RESETVALUE 0x00000000UL
603 #define _MSC_BOOTLOADERCTRL_MASK 0x00000003UL
604 #define MSC_BOOTLOADERCTRL_BLRDIS (0x1UL << 0)
605 #define _MSC_BOOTLOADERCTRL_BLRDIS_SHIFT 0
606 #define _MSC_BOOTLOADERCTRL_BLRDIS_MASK 0x1UL
607 #define _MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT 0x00000000UL
608 #define MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT (_MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT << 0)
609 #define MSC_BOOTLOADERCTRL_BLWDIS (0x1UL << 1)
610 #define _MSC_BOOTLOADERCTRL_BLWDIS_SHIFT 1
611 #define _MSC_BOOTLOADERCTRL_BLWDIS_MASK 0x2UL
612 #define _MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT 0x00000000UL
613 #define MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT (_MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT << 1)
615 /* Bit fields for MSC AAPUNLOCKCMD */
616 #define _MSC_AAPUNLOCKCMD_RESETVALUE 0x00000000UL
617 #define _MSC_AAPUNLOCKCMD_MASK 0x00000001UL
618 #define MSC_AAPUNLOCKCMD_UNLOCKAAP (0x1UL << 0)
619 #define _MSC_AAPUNLOCKCMD_UNLOCKAAP_SHIFT 0
620 #define _MSC_AAPUNLOCKCMD_UNLOCKAAP_MASK 0x1UL
621 #define _MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT 0x00000000UL
622 #define MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT (_MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT << 0)
624 /* Bit fields for MSC CACHECONFIG0 */
625 #define _MSC_CACHECONFIG0_RESETVALUE 0x00000003UL
626 #define _MSC_CACHECONFIG0_MASK 0x00000003UL
627 #define _MSC_CACHECONFIG0_CACHELPLEVEL_SHIFT 0
628 #define _MSC_CACHECONFIG0_CACHELPLEVEL_MASK 0x3UL
629 #define _MSC_CACHECONFIG0_CACHELPLEVEL_BASE 0x00000000UL
630 #define _MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED 0x00000001UL
631 #define _MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT 0x00000003UL
632 #define _MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY 0x00000003UL
633 #define MSC_CACHECONFIG0_CACHELPLEVEL_BASE (_MSC_CACHECONFIG0_CACHELPLEVEL_BASE << 0)
634 #define MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED (_MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED << 0)
635 #define MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT (_MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT << 0)
636 #define MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY (_MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY << 0)
638 /* Bit fields for MSC RAMCTRL */
639 #define _MSC_RAMCTRL_RESETVALUE 0x00000000UL
640 #define _MSC_RAMCTRL_MASK 0x00090101UL
641 #define MSC_RAMCTRL_RAMCACHEEN (0x1UL << 0)
642 #define _MSC_RAMCTRL_RAMCACHEEN_SHIFT 0
643 #define _MSC_RAMCTRL_RAMCACHEEN_MASK 0x1UL
644 #define _MSC_RAMCTRL_RAMCACHEEN_DEFAULT 0x00000000UL
645 #define MSC_RAMCTRL_RAMCACHEEN_DEFAULT (_MSC_RAMCTRL_RAMCACHEEN_DEFAULT << 0)
646 #define MSC_RAMCTRL_RAM1CACHEEN (0x1UL << 8)
647 #define _MSC_RAMCTRL_RAM1CACHEEN_SHIFT 8
648 #define _MSC_RAMCTRL_RAM1CACHEEN_MASK 0x100UL
649 #define _MSC_RAMCTRL_RAM1CACHEEN_DEFAULT 0x00000000UL
650 #define MSC_RAMCTRL_RAM1CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT << 8)
651 #define MSC_RAMCTRL_RAM2CACHEEN (0x1UL << 16)
652 #define _MSC_RAMCTRL_RAM2CACHEEN_SHIFT 16
653 #define _MSC_RAMCTRL_RAM2CACHEEN_MASK 0x10000UL
654 #define _MSC_RAMCTRL_RAM2CACHEEN_DEFAULT 0x00000000UL
655 #define MSC_RAMCTRL_RAM2CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM2CACHEEN_DEFAULT << 16)
656 #define MSC_RAMCTRL_RAMSEQCACHEEN (0x1UL << 19)
657 #define _MSC_RAMCTRL_RAMSEQCACHEEN_SHIFT 19
658 #define _MSC_RAMCTRL_RAMSEQCACHEEN_MASK 0x80000UL
659 #define _MSC_RAMCTRL_RAMSEQCACHEEN_DEFAULT 0x00000000UL
660 #define MSC_RAMCTRL_RAMSEQCACHEEN_DEFAULT (_MSC_RAMCTRL_RAMSEQCACHEEN_DEFAULT << 19)
__IOM uint32_t MASSLOCK
__IOM uint32_t AAPUNLOCKCMD
__IM uint32_t CACHEHITS
__IOM uint32_t BOOTLOADERCTRL
__IOM uint32_t LOCK
__IOM uint32_t BANKSWITCHLOCK
__IOM uint32_t CACHECONFIG0
__IOM uint32_t IEN
__IOM uint32_t RAMCTRL
__IM uint32_t STATUS
__IOM uint32_t WDATA
__IOM uint32_t READCTRL
__IOM uint32_t IFC
__IOM uint32_t STARTUP
__IOM uint32_t ADDRB
__IM uint32_t CACHEMISSES
__IOM uint32_t IFS
__IOM uint32_t WRITECTRL
__IOM uint32_t CACHECMD
__IOM uint32_t CMD
__IOM uint32_t CTRL
__IM uint32_t IF
__IOM uint32_t WRITECMD