Detailed Description

EFR32MG12P_CSEN register and bit field definitions.

Version: 5.1.2

License

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

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Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. has no obligation to support this Software. Silicon Laboratories, Inc. is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file efr32mg12p_csen.h.

Go to the source code of this file.

Data Structures
struct	CSEN_TypeDef

Macros
#define	_CSEN_ANACTRL_BIASPROG_DEFAULT 0x00000000UL

#define	_CSEN_ANACTRL_BIASPROG_HALF 0x00000003UL

#define	_CSEN_ANACTRL_BIASPROG_MASK 0x3000000UL

#define	_CSEN_ANACTRL_BIASPROG_ONETENTH 0x00000002UL

#define	_CSEN_ANACTRL_BIASPROG_ONEX 0x00000000UL

#define	_CSEN_ANACTRL_BIASPROG_SHIFT 24

#define	_CSEN_ANACTRL_BIASPROG_TWOX 0x00000001UL

#define	_CSEN_ANACTRL_CREFHALF_DEFAULT 0x00000000UL

#define	_CSEN_ANACTRL_CREFHALF_FULL 0x00000000UL

#define	_CSEN_ANACTRL_CREFHALF_HALF 0x00000001UL

#define	_CSEN_ANACTRL_CREFHALF_MASK 0x1UL

#define	_CSEN_ANACTRL_CREFHALF_SHIFT 0

#define	_CSEN_ANACTRL_DUTYSCALE_DEFAULT 0x00000000UL

#define	_CSEN_ANACTRL_DUTYSCALE_DIV1 0x00000000UL

#define	_CSEN_ANACTRL_DUTYSCALE_DIV2 0x00000001UL

#define	_CSEN_ANACTRL_DUTYSCALE_DIV4 0x00000002UL

#define	_CSEN_ANACTRL_DUTYSCALE_DIV8 0x00000003UL

#define	_CSEN_ANACTRL_DUTYSCALE_MASK 0x30000UL

#define	_CSEN_ANACTRL_DUTYSCALE_SHIFT 16

#define	_CSEN_ANACTRL_IDACIREFS_DEFAULT 0x00000000UL

#define	_CSEN_ANACTRL_IDACIREFS_MASK 0x700UL

#define	_CSEN_ANACTRL_IDACIREFS_SHIFT 8

#define	_CSEN_ANACTRL_IREFPROG_DEFAULT 0x00000007UL

#define	_CSEN_ANACTRL_IREFPROG_MASK 0x70UL

#define	_CSEN_ANACTRL_IREFPROG_SHIFT 4

#define	_CSEN_ANACTRL_MASK 0x03730771UL

#define	_CSEN_ANACTRL_RESETVALUE 0x00000070UL

#define	_CSEN_ANACTRL_TRSTPROG_DEFAULT 0x00000000UL

#define	_CSEN_ANACTRL_TRSTPROG_MASK 0x700000UL

#define	_CSEN_ANACTRL_TRSTPROG_SHIFT 20

#define	_CSEN_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL

#define	_CSEN_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2

#define	_CSEN_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL

#define	_CSEN_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3

#define	_CSEN_APORTCONFLICT_APORT2XCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT2XCONFLICT_MASK 0x10UL

#define	_CSEN_APORTCONFLICT_APORT2XCONFLICT_SHIFT 4

#define	_CSEN_APORTCONFLICT_APORT2YCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT2YCONFLICT_MASK 0x20UL

#define	_CSEN_APORTCONFLICT_APORT2YCONFLICT_SHIFT 5

#define	_CSEN_APORTCONFLICT_APORT3XCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT3XCONFLICT_MASK 0x40UL

#define	_CSEN_APORTCONFLICT_APORT3XCONFLICT_SHIFT 6

#define	_CSEN_APORTCONFLICT_APORT3YCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT3YCONFLICT_MASK 0x80UL

#define	_CSEN_APORTCONFLICT_APORT3YCONFLICT_SHIFT 7

#define	_CSEN_APORTCONFLICT_APORT4XCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT4XCONFLICT_MASK 0x100UL

#define	_CSEN_APORTCONFLICT_APORT4XCONFLICT_SHIFT 8

#define	_CSEN_APORTCONFLICT_APORT4YCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_APORTCONFLICT_APORT4YCONFLICT_MASK 0x200UL

#define	_CSEN_APORTCONFLICT_APORT4YCONFLICT_SHIFT 9

#define	_CSEN_APORTCONFLICT_MASK 0x000003FCUL

#define	_CSEN_APORTCONFLICT_RESETVALUE 0x00000000UL

#define	_CSEN_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT1XREQ_MASK 0x4UL

#define	_CSEN_APORTREQ_APORT1XREQ_SHIFT 2

#define	_CSEN_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT1YREQ_MASK 0x8UL

#define	_CSEN_APORTREQ_APORT1YREQ_SHIFT 3

#define	_CSEN_APORTREQ_APORT2XREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT2XREQ_MASK 0x10UL

#define	_CSEN_APORTREQ_APORT2XREQ_SHIFT 4

#define	_CSEN_APORTREQ_APORT2YREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT2YREQ_MASK 0x20UL

#define	_CSEN_APORTREQ_APORT2YREQ_SHIFT 5

#define	_CSEN_APORTREQ_APORT3XREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT3XREQ_MASK 0x40UL

#define	_CSEN_APORTREQ_APORT3XREQ_SHIFT 6

#define	_CSEN_APORTREQ_APORT3YREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT3YREQ_MASK 0x80UL

#define	_CSEN_APORTREQ_APORT3YREQ_SHIFT 7

#define	_CSEN_APORTREQ_APORT4XREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT4XREQ_MASK 0x100UL

#define	_CSEN_APORTREQ_APORT4XREQ_SHIFT 8

#define	_CSEN_APORTREQ_APORT4YREQ_DEFAULT 0x00000000UL

#define	_CSEN_APORTREQ_APORT4YREQ_MASK 0x200UL

#define	_CSEN_APORTREQ_APORT4YREQ_SHIFT 9

#define	_CSEN_APORTREQ_MASK 0x000003FCUL

#define	_CSEN_APORTREQ_RESETVALUE 0x00000000UL

#define	_CSEN_CMD_MASK 0x00000001UL

#define	_CSEN_CMD_RESETVALUE 0x00000000UL

#define	_CSEN_CMD_START_DEFAULT 0x00000000UL

#define	_CSEN_CMD_START_MASK 0x1UL

#define	_CSEN_CMD_START_SHIFT 0

#define	_CSEN_CMPTHR_CMPTHR_DEFAULT 0x00000000UL

#define	_CSEN_CMPTHR_CMPTHR_MASK 0xFFFFUL

#define	_CSEN_CMPTHR_CMPTHR_SHIFT 0

#define	_CSEN_CMPTHR_MASK 0x0000FFFFUL

#define	_CSEN_CMPTHR_RESETVALUE 0x00000000UL

#define	_CSEN_CTRL_ACU_ACC1 0x00000000UL

#define	_CSEN_CTRL_ACU_ACC16 0x00000004UL

#define	_CSEN_CTRL_ACU_ACC2 0x00000001UL

#define	_CSEN_CTRL_ACU_ACC32 0x00000005UL

#define	_CSEN_CTRL_ACU_ACC4 0x00000002UL

#define	_CSEN_CTRL_ACU_ACC64 0x00000006UL

#define	_CSEN_CTRL_ACU_ACC8 0x00000003UL

#define	_CSEN_CTRL_ACU_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_ACU_MASK 0x7000UL

#define	_CSEN_CTRL_ACU_SHIFT 12

#define	_CSEN_CTRL_AUTOGND_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_AUTOGND_DISABLE 0x00000000UL

#define	_CSEN_CTRL_AUTOGND_ENABLE 0x00000001UL

#define	_CSEN_CTRL_AUTOGND_MASK 0x800000UL

#define	_CSEN_CTRL_AUTOGND_SHIFT 23

#define	_CSEN_CTRL_CHOPEN_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_CHOPEN_DISABLE 0x00000000UL

#define	_CSEN_CTRL_CHOPEN_ENABLE 0x00000001UL

#define	_CSEN_CTRL_CHOPEN_MASK 0x400000UL

#define	_CSEN_CTRL_CHOPEN_SHIFT 22

#define	_CSEN_CTRL_CM_CONTSCAN 0x00000003UL

#define	_CSEN_CTRL_CM_CONTSGL 0x00000002UL

#define	_CSEN_CTRL_CM_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_CM_MASK 0x30UL

#define	_CSEN_CTRL_CM_SCAN 0x00000001UL

#define	_CSEN_CTRL_CM_SGL 0x00000000UL

#define	_CSEN_CTRL_CM_SHIFT 4

#define	_CSEN_CTRL_CMPEN_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_CMPEN_DISABLE 0x00000000UL

#define	_CSEN_CTRL_CMPEN_ENABLE 0x00000001UL

#define	_CSEN_CTRL_CMPEN_MASK 0x40000UL

#define	_CSEN_CTRL_CMPEN_SHIFT 18

#define	_CSEN_CTRL_CMPPOL_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_CMPPOL_GT 0x00000000UL

#define	_CSEN_CTRL_CMPPOL_LTE 0x00000001UL

#define	_CSEN_CTRL_CMPPOL_MASK 0x4UL

#define	_CSEN_CTRL_CMPPOL_SHIFT 2

#define	_CSEN_CTRL_CONVSEL_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_CONVSEL_DM 0x00000001UL

#define	_CSEN_CTRL_CONVSEL_MASK 0x200000UL

#define	_CSEN_CTRL_CONVSEL_SAR 0x00000000UL

#define	_CSEN_CTRL_CONVSEL_SHIFT 21

#define	_CSEN_CTRL_CPACCURACY_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_CPACCURACY_HI 0x00000001UL

#define	_CSEN_CTRL_CPACCURACY_LO 0x00000000UL

#define	_CSEN_CTRL_CPACCURACY_MASK 0x10000000UL

#define	_CSEN_CTRL_CPACCURACY_SHIFT 28

#define	_CSEN_CTRL_DMAEN_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_DMAEN_DISABLE 0x00000000UL

#define	_CSEN_CTRL_DMAEN_ENABLE 0x00000001UL

#define	_CSEN_CTRL_DMAEN_MASK 0x100000UL

#define	_CSEN_CTRL_DMAEN_SHIFT 20

#define	_CSEN_CTRL_DRSF_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_DRSF_DISABLE 0x00000000UL

#define	_CSEN_CTRL_DRSF_ENABLE 0x00000001UL

#define	_CSEN_CTRL_DRSF_MASK 0x80000UL

#define	_CSEN_CTRL_DRSF_SHIFT 19

#define	_CSEN_CTRL_EMACMPEN_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_EMACMPEN_MASK 0x2000000UL

#define	_CSEN_CTRL_EMACMPEN_SHIFT 25

#define	_CSEN_CTRL_EN_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_EN_DISABLE 0x00000000UL

#define	_CSEN_CTRL_EN_ENABLE 0x00000001UL

#define	_CSEN_CTRL_EN_MASK 0x2UL

#define	_CSEN_CTRL_EN_SHIFT 1

#define	_CSEN_CTRL_LOCALSENS_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_LOCALSENS_MASK 0x8000000UL

#define	_CSEN_CTRL_LOCALSENS_SHIFT 27

#define	_CSEN_CTRL_MASK 0x1FFFF336UL

#define	_CSEN_CTRL_MCEN_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_MCEN_DISABLE 0x00000000UL

#define	_CSEN_CTRL_MCEN_ENABLE 0x00000001UL

#define	_CSEN_CTRL_MCEN_MASK 0x8000UL

#define	_CSEN_CTRL_MCEN_SHIFT 15

#define	_CSEN_CTRL_MXUC_CONN 0x00000000UL

#define	_CSEN_CTRL_MXUC_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_MXUC_MASK 0x1000000UL

#define	_CSEN_CTRL_MXUC_SHIFT 24

#define	_CSEN_CTRL_MXUC_UNC 0x00000001UL

#define	_CSEN_CTRL_RESETVALUE 0x00030000UL

#define	_CSEN_CTRL_SARCR_CLK10 0x00000000UL

#define	_CSEN_CTRL_SARCR_CLK12 0x00000001UL

#define	_CSEN_CTRL_SARCR_CLK14 0x00000002UL

#define	_CSEN_CTRL_SARCR_CLK16 0x00000003UL

#define	_CSEN_CTRL_SARCR_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_SARCR_MASK 0x300UL

#define	_CSEN_CTRL_SARCR_SHIFT 8

#define	_CSEN_CTRL_STM_DEFAULT 0x00000003UL

#define	_CSEN_CTRL_STM_DEFAULT 0x00000003UL

#define	_CSEN_CTRL_STM_MASK 0x30000UL

#define	_CSEN_CTRL_STM_PRS 0x00000000UL

#define	_CSEN_CTRL_STM_SHIFT 16

#define	_CSEN_CTRL_STM_START 0x00000002UL

#define	_CSEN_CTRL_STM_TIMER 0x00000001UL

#define	_CSEN_CTRL_WARMUPMODE_DEFAULT 0x00000000UL

#define	_CSEN_CTRL_WARMUPMODE_KEEPCSENWARM 0x00000001UL

#define	_CSEN_CTRL_WARMUPMODE_MASK 0x4000000UL

#define	_CSEN_CTRL_WARMUPMODE_NORMAL 0x00000000UL

#define	_CSEN_CTRL_WARMUPMODE_SHIFT 26

#define	_CSEN_DATA_DATA_DEFAULT 0x00000000UL

#define	_CSEN_DATA_DATA_MASK 0xFFFFFFFFUL

#define	_CSEN_DATA_DATA_SHIFT 0

#define	_CSEN_DATA_MASK 0xFFFFFFFFUL

#define	_CSEN_DATA_RESETVALUE 0x00000000UL

#define	_CSEN_DMBASELINE_BASELINEDN_DEFAULT 0x00000000UL

#define	_CSEN_DMBASELINE_BASELINEDN_MASK 0xFFFF0000UL

#define	_CSEN_DMBASELINE_BASELINEDN_SHIFT 16

#define	_CSEN_DMBASELINE_BASELINEUP_DEFAULT 0x00000000UL

#define	_CSEN_DMBASELINE_BASELINEUP_MASK 0xFFFFUL

#define	_CSEN_DMBASELINE_BASELINEUP_SHIFT 0

#define	_CSEN_DMBASELINE_MASK 0xFFFFFFFFUL

#define	_CSEN_DMBASELINE_RESETVALUE 0x00000000UL

#define	_CSEN_DMCFG_CRMODE_DEFAULT 0x00000000UL

#define	_CSEN_DMCFG_CRMODE_DM10 0x00000000UL

#define	_CSEN_DMCFG_CRMODE_DM12 0x00000001UL

#define	_CSEN_DMCFG_CRMODE_DM14 0x00000002UL

#define	_CSEN_DMCFG_CRMODE_DM16 0x00000003UL

#define	_CSEN_DMCFG_CRMODE_MASK 0x300000UL

#define	_CSEN_DMCFG_CRMODE_SHIFT 20

#define	_CSEN_DMCFG_DMCR_DEFAULT 0x00000000UL

#define	_CSEN_DMCFG_DMCR_MASK 0xF0000UL

#define	_CSEN_DMCFG_DMCR_SHIFT 16

#define	_CSEN_DMCFG_DMG_DEFAULT 0x00000000UL

#define	_CSEN_DMCFG_DMG_MASK 0xFFUL

#define	_CSEN_DMCFG_DMG_SHIFT 0

#define	_CSEN_DMCFG_DMGRDIS_DEFAULT 0x00000000UL

#define	_CSEN_DMCFG_DMGRDIS_MASK 0x10000000UL

#define	_CSEN_DMCFG_DMGRDIS_SHIFT 28

#define	_CSEN_DMCFG_DMR_DEFAULT 0x00000000UL

#define	_CSEN_DMCFG_DMR_MASK 0xF00UL

#define	_CSEN_DMCFG_DMR_SHIFT 8

#define	_CSEN_DMCFG_MASK 0x103F0FFFUL

#define	_CSEN_DMCFG_RESETVALUE 0x00000000UL

#define	_CSEN_EMA_EMA_DEFAULT 0x00000000UL

#define	_CSEN_EMA_EMA_MASK 0x3FFFFFUL

#define	_CSEN_EMA_EMA_SHIFT 0

#define	_CSEN_EMA_MASK 0x003FFFFFUL

#define	_CSEN_EMA_RESETVALUE 0x00000000UL

#define	_CSEN_EMACTRL_EMASAMPLE_DEFAULT 0x00000000UL

#define	_CSEN_EMACTRL_EMASAMPLE_MASK 0x7UL

#define	_CSEN_EMACTRL_EMASAMPLE_SHIFT 0

#define	_CSEN_EMACTRL_EMASAMPLE_W1 0x00000000UL

#define	_CSEN_EMACTRL_EMASAMPLE_W16 0x00000004UL

#define	_CSEN_EMACTRL_EMASAMPLE_W2 0x00000001UL

#define	_CSEN_EMACTRL_EMASAMPLE_W32 0x00000005UL

#define	_CSEN_EMACTRL_EMASAMPLE_W4 0x00000002UL

#define	_CSEN_EMACTRL_EMASAMPLE_W64 0x00000006UL

#define	_CSEN_EMACTRL_EMASAMPLE_W8 0x00000003UL

#define	_CSEN_EMACTRL_MASK 0x00000007UL

#define	_CSEN_EMACTRL_RESETVALUE 0x00000000UL

#define	_CSEN_IEN_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_IEN_APORTCONFLICT_MASK 0x10UL

#define	_CSEN_IEN_APORTCONFLICT_SHIFT 4

#define	_CSEN_IEN_CMP_DEFAULT 0x00000000UL

#define	_CSEN_IEN_CMP_MASK 0x1UL

#define	_CSEN_IEN_CMP_SHIFT 0

#define	_CSEN_IEN_CONV_DEFAULT 0x00000000UL

#define	_CSEN_IEN_CONV_MASK 0x2UL

#define	_CSEN_IEN_CONV_SHIFT 1

#define	_CSEN_IEN_DMAOF_DEFAULT 0x00000000UL

#define	_CSEN_IEN_DMAOF_MASK 0x8UL

#define	_CSEN_IEN_DMAOF_SHIFT 3

#define	_CSEN_IEN_EOS_DEFAULT 0x00000000UL

#define	_CSEN_IEN_EOS_MASK 0x4UL

#define	_CSEN_IEN_EOS_SHIFT 2

#define	_CSEN_IEN_MASK 0x0000001FUL

#define	_CSEN_IEN_RESETVALUE 0x00000000UL

#define	_CSEN_IF_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_IF_APORTCONFLICT_MASK 0x10UL

#define	_CSEN_IF_APORTCONFLICT_SHIFT 4

#define	_CSEN_IF_CMP_DEFAULT 0x00000000UL

#define	_CSEN_IF_CMP_MASK 0x1UL

#define	_CSEN_IF_CMP_SHIFT 0

#define	_CSEN_IF_CONV_DEFAULT 0x00000000UL

#define	_CSEN_IF_CONV_MASK 0x2UL

#define	_CSEN_IF_CONV_SHIFT 1

#define	_CSEN_IF_DMAOF_DEFAULT 0x00000000UL

#define	_CSEN_IF_DMAOF_MASK 0x8UL

#define	_CSEN_IF_DMAOF_SHIFT 3

#define	_CSEN_IF_EOS_DEFAULT 0x00000000UL

#define	_CSEN_IF_EOS_MASK 0x4UL

#define	_CSEN_IF_EOS_SHIFT 2

#define	_CSEN_IF_MASK 0x0000001FUL

#define	_CSEN_IF_RESETVALUE 0x00000000UL

#define	_CSEN_IFC_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_IFC_APORTCONFLICT_MASK 0x10UL

#define	_CSEN_IFC_APORTCONFLICT_SHIFT 4

#define	_CSEN_IFC_CMP_DEFAULT 0x00000000UL

#define	_CSEN_IFC_CMP_MASK 0x1UL

#define	_CSEN_IFC_CMP_SHIFT 0

#define	_CSEN_IFC_CONV_DEFAULT 0x00000000UL

#define	_CSEN_IFC_CONV_MASK 0x2UL

#define	_CSEN_IFC_CONV_SHIFT 1

#define	_CSEN_IFC_DMAOF_DEFAULT 0x00000000UL

#define	_CSEN_IFC_DMAOF_MASK 0x8UL

#define	_CSEN_IFC_DMAOF_SHIFT 3

#define	_CSEN_IFC_EOS_DEFAULT 0x00000000UL

#define	_CSEN_IFC_EOS_MASK 0x4UL

#define	_CSEN_IFC_EOS_SHIFT 2

#define	_CSEN_IFC_MASK 0x0000001FUL

#define	_CSEN_IFC_RESETVALUE 0x00000000UL

#define	_CSEN_IFS_APORTCONFLICT_DEFAULT 0x00000000UL

#define	_CSEN_IFS_APORTCONFLICT_MASK 0x10UL

#define	_CSEN_IFS_APORTCONFLICT_SHIFT 4

#define	_CSEN_IFS_CMP_DEFAULT 0x00000000UL

#define	_CSEN_IFS_CMP_MASK 0x1UL

#define	_CSEN_IFS_CMP_SHIFT 0

#define	_CSEN_IFS_CONV_DEFAULT 0x00000000UL

#define	_CSEN_IFS_CONV_MASK 0x2UL

#define	_CSEN_IFS_CONV_SHIFT 1

#define	_CSEN_IFS_DMAOF_DEFAULT 0x00000000UL

#define	_CSEN_IFS_DMAOF_MASK 0x8UL

#define	_CSEN_IFS_DMAOF_SHIFT 3

#define	_CSEN_IFS_EOS_DEFAULT 0x00000000UL

#define	_CSEN_IFS_EOS_MASK 0x4UL

#define	_CSEN_IFS_EOS_SHIFT 2

#define	_CSEN_IFS_MASK 0x0000001FUL

#define	_CSEN_IFS_RESETVALUE 0x00000000UL

#define	_CSEN_PRSSEL_MASK 0x0000000FUL

#define	_CSEN_PRSSEL_PRSSEL_DEFAULT 0x00000000UL

#define	_CSEN_PRSSEL_PRSSEL_MASK 0xFUL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH0 0x00000000UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH1 0x00000001UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH10 0x0000000AUL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH11 0x0000000BUL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH2 0x00000002UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH3 0x00000003UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH4 0x00000004UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH5 0x00000005UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH6 0x00000006UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH7 0x00000007UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH8 0x00000008UL

#define	_CSEN_PRSSEL_PRSSEL_PRSCH9 0x00000009UL

#define	_CSEN_PRSSEL_PRSSEL_SHIFT 0

#define	_CSEN_PRSSEL_RESETVALUE 0x00000000UL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_MASK 0xFUL

#define	_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_SHIFT 0

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_MASK 0xF0000UL

#define	_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_SHIFT 16

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_MASK 0xF000000UL

#define	_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_SHIFT 24

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_MASK 0xF00UL

#define	_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_SHIFT 8

#define	_CSEN_SCANINPUTSEL0_MASK 0x0F0F0F0FUL

#define	_CSEN_SCANINPUTSEL0_RESETVALUE 0x00000000UL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_MASK 0xFUL

#define	_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_SHIFT 0

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_MASK 0xF00UL

#define	_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_SHIFT 8

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_MASK 0xF0000UL

#define	_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_SHIFT 16

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH0TO7 0x00000004UL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH16TO23 0x00000006UL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH24TO31 0x00000007UL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH8TO15 0x00000005UL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH0TO7 0x0000000CUL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH16TO23 0x0000000EUL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH24TO31 0x0000000FUL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH8TO15 0x0000000DUL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_DEFAULT 0x00000000UL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_MASK 0xF000000UL

#define	_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_SHIFT 24

#define	_CSEN_SCANINPUTSEL1_MASK 0x0F0F0F0FUL

#define	_CSEN_SCANINPUTSEL1_RESETVALUE 0x00000000UL

#define	_CSEN_SCANMASK0_MASK 0xFFFFFFFFUL

#define	_CSEN_SCANMASK0_RESETVALUE 0x00000000UL

#define	_CSEN_SCANMASK0_SCANINPUTEN_DEFAULT 0x00000000UL

#define	_CSEN_SCANMASK0_SCANINPUTEN_MASK 0xFFFFFFFFUL

#define	_CSEN_SCANMASK0_SCANINPUTEN_SHIFT 0

#define	_CSEN_SCANMASK1_MASK 0xFFFFFFFFUL

#define	_CSEN_SCANMASK1_RESETVALUE 0x00000000UL

#define	_CSEN_SCANMASK1_SCANINPUTEN_DEFAULT 0x00000000UL

#define	_CSEN_SCANMASK1_SCANINPUTEN_MASK 0xFFFFFFFFUL

#define	_CSEN_SCANMASK1_SCANINPUTEN_SHIFT 0

#define	_CSEN_SINGLECTRL_MASK 0x000007F0UL

#define	_CSEN_SINGLECTRL_RESETVALUE 0x00000000UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0 0x00000020UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10 0x0000002AUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12 0x0000002CUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14 0x0000002EUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16 0x00000030UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18 0x00000032UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2 0x00000022UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20 0x00000034UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22 0x00000036UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24 0x00000038UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26 0x0000003AUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28 0x0000003CUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30 0x0000003EUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4 0x00000024UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6 0x00000026UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8 0x00000028UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1 0x00000021UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11 0x0000002BUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13 0x0000002DUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15 0x0000002FUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17 0x00000031UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19 0x00000033UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21 0x00000035UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23 0x00000037UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25 0x00000039UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27 0x0000003BUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29 0x0000003DUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3 0x00000023UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31 0x0000003FUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5 0x00000025UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7 0x00000027UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9 0x00000029UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0 0x00000060UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10 0x0000006AUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12 0x0000006CUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14 0x0000006EUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16 0x00000070UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18 0x00000072UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2 0x00000062UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20 0x00000074UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22 0x00000076UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24 0x00000078UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26 0x0000007AUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28 0x0000007CUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30 0x0000007EUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4 0x00000064UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6 0x00000066UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8 0x00000068UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1 0x00000061UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11 0x0000006BUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13 0x0000006DUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15 0x0000006FUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17 0x00000071UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19 0x00000073UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21 0x00000075UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23 0x00000077UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25 0x00000079UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27 0x0000007BUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29 0x0000007DUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3 0x00000063UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 0x0000007FUL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5 0x00000065UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7 0x00000067UL

#define	_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9 0x00000069UL

#define	_CSEN_SINGLECTRL_SINGLESEL_DEFAULT 0x00000000UL

#define	_CSEN_SINGLECTRL_SINGLESEL_MASK 0x7F0UL

#define	_CSEN_SINGLECTRL_SINGLESEL_SHIFT 4

#define	_CSEN_STATUS_CSENBUSY_BUSY 0x00000001UL

#define	_CSEN_STATUS_CSENBUSY_DEFAULT 0x00000000UL

#define	_CSEN_STATUS_CSENBUSY_IDLE 0x00000000UL

#define	_CSEN_STATUS_CSENBUSY_MASK 0x1UL

#define	_CSEN_STATUS_CSENBUSY_SHIFT 0

#define	_CSEN_STATUS_MASK 0x00000001UL

#define	_CSEN_STATUS_RESETVALUE 0x00000000UL

#define	_CSEN_TIMCTRL_MASK 0x0003FF07UL

#define	_CSEN_TIMCTRL_PCPRESC_DEFAULT 0x00000000UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV1 0x00000000UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV128 0x00000007UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV16 0x00000004UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV2 0x00000001UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV32 0x00000005UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV4 0x00000002UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV64 0x00000006UL

#define	_CSEN_TIMCTRL_PCPRESC_DIV8 0x00000003UL

#define	_CSEN_TIMCTRL_PCPRESC_MASK 0x7UL

#define	_CSEN_TIMCTRL_PCPRESC_SHIFT 0

#define	_CSEN_TIMCTRL_PCTOP_DEFAULT 0x00000000UL

#define	_CSEN_TIMCTRL_PCTOP_MASK 0xFF00UL

#define	_CSEN_TIMCTRL_PCTOP_SHIFT 8

#define	_CSEN_TIMCTRL_RESETVALUE 0x00000000UL

#define	_CSEN_TIMCTRL_WARMUPCNT_DEFAULT 0x00000000UL

#define	_CSEN_TIMCTRL_WARMUPCNT_MASK 0x30000UL

#define	_CSEN_TIMCTRL_WARMUPCNT_SHIFT 16

#define	CSEN_ANACTRL_BIASPROG_DEFAULT (_CSEN_ANACTRL_BIASPROG_DEFAULT << 24)

#define	CSEN_ANACTRL_BIASPROG_HALF (_CSEN_ANACTRL_BIASPROG_HALF << 24)

#define	CSEN_ANACTRL_BIASPROG_ONETENTH (_CSEN_ANACTRL_BIASPROG_ONETENTH << 24)

#define	CSEN_ANACTRL_BIASPROG_ONEX (_CSEN_ANACTRL_BIASPROG_ONEX << 24)

#define	CSEN_ANACTRL_BIASPROG_TWOX (_CSEN_ANACTRL_BIASPROG_TWOX << 24)

#define	CSEN_ANACTRL_CREFHALF (0x1UL << 0)

#define	CSEN_ANACTRL_CREFHALF_DEFAULT (_CSEN_ANACTRL_CREFHALF_DEFAULT << 0)

#define	CSEN_ANACTRL_CREFHALF_FULL (_CSEN_ANACTRL_CREFHALF_FULL << 0)

#define	CSEN_ANACTRL_CREFHALF_HALF (_CSEN_ANACTRL_CREFHALF_HALF << 0)

#define	CSEN_ANACTRL_DUTYSCALE_DEFAULT (_CSEN_ANACTRL_DUTYSCALE_DEFAULT << 16)

#define	CSEN_ANACTRL_DUTYSCALE_DIV1 (_CSEN_ANACTRL_DUTYSCALE_DIV1 << 16)

#define	CSEN_ANACTRL_DUTYSCALE_DIV2 (_CSEN_ANACTRL_DUTYSCALE_DIV2 << 16)

#define	CSEN_ANACTRL_DUTYSCALE_DIV4 (_CSEN_ANACTRL_DUTYSCALE_DIV4 << 16)

#define	CSEN_ANACTRL_DUTYSCALE_DIV8 (_CSEN_ANACTRL_DUTYSCALE_DIV8 << 16)

#define	CSEN_ANACTRL_IDACIREFS_DEFAULT (_CSEN_ANACTRL_IDACIREFS_DEFAULT << 8)

#define	CSEN_ANACTRL_IREFPROG_DEFAULT (_CSEN_ANACTRL_IREFPROG_DEFAULT << 4)

#define	CSEN_ANACTRL_TRSTPROG_DEFAULT (_CSEN_ANACTRL_TRSTPROG_DEFAULT << 20)

#define	CSEN_APORTCONFLICT_APORT1XCONFLICT (0x1UL << 2)

#define	CSEN_APORTCONFLICT_APORT1XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT1XCONFLICT_DEFAULT << 2)

#define	CSEN_APORTCONFLICT_APORT1YCONFLICT (0x1UL << 3)

#define	CSEN_APORTCONFLICT_APORT1YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT1YCONFLICT_DEFAULT << 3)

#define	CSEN_APORTCONFLICT_APORT2XCONFLICT (0x1UL << 4)

#define	CSEN_APORTCONFLICT_APORT2XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT2XCONFLICT_DEFAULT << 4)

#define	CSEN_APORTCONFLICT_APORT2YCONFLICT (0x1UL << 5)

#define	CSEN_APORTCONFLICT_APORT2YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT2YCONFLICT_DEFAULT << 5)

#define	CSEN_APORTCONFLICT_APORT3XCONFLICT (0x1UL << 6)

#define	CSEN_APORTCONFLICT_APORT3XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT3XCONFLICT_DEFAULT << 6)

#define	CSEN_APORTCONFLICT_APORT3YCONFLICT (0x1UL << 7)

#define	CSEN_APORTCONFLICT_APORT3YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT3YCONFLICT_DEFAULT << 7)

#define	CSEN_APORTCONFLICT_APORT4XCONFLICT (0x1UL << 8)

#define	CSEN_APORTCONFLICT_APORT4XCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT4XCONFLICT_DEFAULT << 8)

#define	CSEN_APORTCONFLICT_APORT4YCONFLICT (0x1UL << 9)

#define	CSEN_APORTCONFLICT_APORT4YCONFLICT_DEFAULT (_CSEN_APORTCONFLICT_APORT4YCONFLICT_DEFAULT << 9)

#define	CSEN_APORTREQ_APORT1XREQ (0x1UL << 2)

#define	CSEN_APORTREQ_APORT1XREQ_DEFAULT (_CSEN_APORTREQ_APORT1XREQ_DEFAULT << 2)

#define	CSEN_APORTREQ_APORT1YREQ (0x1UL << 3)

#define	CSEN_APORTREQ_APORT1YREQ_DEFAULT (_CSEN_APORTREQ_APORT1YREQ_DEFAULT << 3)

#define	CSEN_APORTREQ_APORT2XREQ (0x1UL << 4)

#define	CSEN_APORTREQ_APORT2XREQ_DEFAULT (_CSEN_APORTREQ_APORT2XREQ_DEFAULT << 4)

#define	CSEN_APORTREQ_APORT2YREQ (0x1UL << 5)

#define	CSEN_APORTREQ_APORT2YREQ_DEFAULT (_CSEN_APORTREQ_APORT2YREQ_DEFAULT << 5)

#define	CSEN_APORTREQ_APORT3XREQ (0x1UL << 6)

#define	CSEN_APORTREQ_APORT3XREQ_DEFAULT (_CSEN_APORTREQ_APORT3XREQ_DEFAULT << 6)

#define	CSEN_APORTREQ_APORT3YREQ (0x1UL << 7)

#define	CSEN_APORTREQ_APORT3YREQ_DEFAULT (_CSEN_APORTREQ_APORT3YREQ_DEFAULT << 7)

#define	CSEN_APORTREQ_APORT4XREQ (0x1UL << 8)

#define	CSEN_APORTREQ_APORT4XREQ_DEFAULT (_CSEN_APORTREQ_APORT4XREQ_DEFAULT << 8)

#define	CSEN_APORTREQ_APORT4YREQ (0x1UL << 9)

#define	CSEN_APORTREQ_APORT4YREQ_DEFAULT (_CSEN_APORTREQ_APORT4YREQ_DEFAULT << 9)

#define	CSEN_CMD_START (0x1UL << 0)

#define	CSEN_CMD_START_DEFAULT (_CSEN_CMD_START_DEFAULT << 0)

#define	CSEN_CMPTHR_CMPTHR_DEFAULT (_CSEN_CMPTHR_CMPTHR_DEFAULT << 0)

#define	CSEN_CTRL_ACU_ACC1 (_CSEN_CTRL_ACU_ACC1 << 12)

#define	CSEN_CTRL_ACU_ACC16 (_CSEN_CTRL_ACU_ACC16 << 12)

#define	CSEN_CTRL_ACU_ACC2 (_CSEN_CTRL_ACU_ACC2 << 12)

#define	CSEN_CTRL_ACU_ACC32 (_CSEN_CTRL_ACU_ACC32 << 12)

#define	CSEN_CTRL_ACU_ACC4 (_CSEN_CTRL_ACU_ACC4 << 12)

#define	CSEN_CTRL_ACU_ACC64 (_CSEN_CTRL_ACU_ACC64 << 12)

#define	CSEN_CTRL_ACU_ACC8 (_CSEN_CTRL_ACU_ACC8 << 12)

#define	CSEN_CTRL_ACU_DEFAULT (_CSEN_CTRL_ACU_DEFAULT << 12)

#define	CSEN_CTRL_AUTOGND (0x1UL << 23)

#define	CSEN_CTRL_AUTOGND_DEFAULT (_CSEN_CTRL_AUTOGND_DEFAULT << 23)

#define	CSEN_CTRL_AUTOGND_DISABLE (_CSEN_CTRL_AUTOGND_DISABLE << 23)

#define	CSEN_CTRL_AUTOGND_ENABLE (_CSEN_CTRL_AUTOGND_ENABLE << 23)

#define	CSEN_CTRL_CHOPEN (0x1UL << 22)

#define	CSEN_CTRL_CHOPEN_DEFAULT (_CSEN_CTRL_CHOPEN_DEFAULT << 22)

#define	CSEN_CTRL_CHOPEN_DISABLE (_CSEN_CTRL_CHOPEN_DISABLE << 22)

#define	CSEN_CTRL_CHOPEN_ENABLE (_CSEN_CTRL_CHOPEN_ENABLE << 22)

#define	CSEN_CTRL_CM_CONTSCAN (_CSEN_CTRL_CM_CONTSCAN << 4)

#define	CSEN_CTRL_CM_CONTSGL (_CSEN_CTRL_CM_CONTSGL << 4)

#define	CSEN_CTRL_CM_DEFAULT (_CSEN_CTRL_CM_DEFAULT << 4)

#define	CSEN_CTRL_CM_SCAN (_CSEN_CTRL_CM_SCAN << 4)

#define	CSEN_CTRL_CM_SGL (_CSEN_CTRL_CM_SGL << 4)

#define	CSEN_CTRL_CMPEN (0x1UL << 18)

#define	CSEN_CTRL_CMPEN_DEFAULT (_CSEN_CTRL_CMPEN_DEFAULT << 18)

#define	CSEN_CTRL_CMPEN_DISABLE (_CSEN_CTRL_CMPEN_DISABLE << 18)

#define	CSEN_CTRL_CMPEN_ENABLE (_CSEN_CTRL_CMPEN_ENABLE << 18)

#define	CSEN_CTRL_CMPPOL (0x1UL << 2)

#define	CSEN_CTRL_CMPPOL_DEFAULT (_CSEN_CTRL_CMPPOL_DEFAULT << 2)

#define	CSEN_CTRL_CMPPOL_GT (_CSEN_CTRL_CMPPOL_GT << 2)

#define	CSEN_CTRL_CMPPOL_LTE (_CSEN_CTRL_CMPPOL_LTE << 2)

#define	CSEN_CTRL_CONVSEL (0x1UL << 21)

#define	CSEN_CTRL_CONVSEL_DEFAULT (_CSEN_CTRL_CONVSEL_DEFAULT << 21)

#define	CSEN_CTRL_CONVSEL_DM (_CSEN_CTRL_CONVSEL_DM << 21)

#define	CSEN_CTRL_CONVSEL_SAR (_CSEN_CTRL_CONVSEL_SAR << 21)

#define	CSEN_CTRL_CPACCURACY (0x1UL << 28)

#define	CSEN_CTRL_CPACCURACY_DEFAULT (_CSEN_CTRL_CPACCURACY_DEFAULT << 28)

#define	CSEN_CTRL_CPACCURACY_HI (_CSEN_CTRL_CPACCURACY_HI << 28)

#define	CSEN_CTRL_CPACCURACY_LO (_CSEN_CTRL_CPACCURACY_LO << 28)

#define	CSEN_CTRL_DMAEN (0x1UL << 20)

#define	CSEN_CTRL_DMAEN_DEFAULT (_CSEN_CTRL_DMAEN_DEFAULT << 20)

#define	CSEN_CTRL_DMAEN_DISABLE (_CSEN_CTRL_DMAEN_DISABLE << 20)

#define	CSEN_CTRL_DMAEN_ENABLE (_CSEN_CTRL_DMAEN_ENABLE << 20)

#define	CSEN_CTRL_DRSF (0x1UL << 19)

#define	CSEN_CTRL_DRSF_DEFAULT (_CSEN_CTRL_DRSF_DEFAULT << 19)

#define	CSEN_CTRL_DRSF_DISABLE (_CSEN_CTRL_DRSF_DISABLE << 19)

#define	CSEN_CTRL_DRSF_ENABLE (_CSEN_CTRL_DRSF_ENABLE << 19)

#define	CSEN_CTRL_EMACMPEN (0x1UL << 25)

#define	CSEN_CTRL_EMACMPEN_DEFAULT (_CSEN_CTRL_EMACMPEN_DEFAULT << 25)

#define	CSEN_CTRL_EN (0x1UL << 1)

#define	CSEN_CTRL_EN_DEFAULT (_CSEN_CTRL_EN_DEFAULT << 1)

#define	CSEN_CTRL_EN_DISABLE (_CSEN_CTRL_EN_DISABLE << 1)

#define	CSEN_CTRL_EN_ENABLE (_CSEN_CTRL_EN_ENABLE << 1)

#define	CSEN_CTRL_LOCALSENS (0x1UL << 27)

#define	CSEN_CTRL_LOCALSENS_DEFAULT (_CSEN_CTRL_LOCALSENS_DEFAULT << 27)

#define	CSEN_CTRL_MCEN (0x1UL << 15)

#define	CSEN_CTRL_MCEN_DEFAULT (_CSEN_CTRL_MCEN_DEFAULT << 15)

#define	CSEN_CTRL_MCEN_DISABLE (_CSEN_CTRL_MCEN_DISABLE << 15)

#define	CSEN_CTRL_MCEN_ENABLE (_CSEN_CTRL_MCEN_ENABLE << 15)

#define	CSEN_CTRL_MXUC (0x1UL << 24)

#define	CSEN_CTRL_MXUC_CONN (_CSEN_CTRL_MXUC_CONN << 24)

#define	CSEN_CTRL_MXUC_DEFAULT (_CSEN_CTRL_MXUC_DEFAULT << 24)

#define	CSEN_CTRL_MXUC_UNC (_CSEN_CTRL_MXUC_UNC << 24)

#define	CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8)

#define	CSEN_CTRL_SARCR_CLK12 (_CSEN_CTRL_SARCR_CLK12 << 8)

#define	CSEN_CTRL_SARCR_CLK14 (_CSEN_CTRL_SARCR_CLK14 << 8)

#define	CSEN_CTRL_SARCR_CLK16 (_CSEN_CTRL_SARCR_CLK16 << 8)

#define	CSEN_CTRL_SARCR_DEFAULT (_CSEN_CTRL_SARCR_DEFAULT << 8)

#define	CSEN_CTRL_STM_DEFAULT (_CSEN_CTRL_STM_DEFAULT << 16)

#define	CSEN_CTRL_STM_DEFAULT (_CSEN_CTRL_STM_DEFAULT << 16)

#define	CSEN_CTRL_STM_PRS (_CSEN_CTRL_STM_PRS << 16)

#define	CSEN_CTRL_STM_START (_CSEN_CTRL_STM_START << 16)

#define	CSEN_CTRL_STM_TIMER (_CSEN_CTRL_STM_TIMER << 16)

#define	CSEN_CTRL_WARMUPMODE (0x1UL << 26)

#define	CSEN_CTRL_WARMUPMODE_DEFAULT (_CSEN_CTRL_WARMUPMODE_DEFAULT << 26)

#define	CSEN_CTRL_WARMUPMODE_KEEPCSENWARM (_CSEN_CTRL_WARMUPMODE_KEEPCSENWARM << 26)

#define	CSEN_CTRL_WARMUPMODE_NORMAL (_CSEN_CTRL_WARMUPMODE_NORMAL << 26)

#define	CSEN_DATA_DATA_DEFAULT (_CSEN_DATA_DATA_DEFAULT << 0)

#define	CSEN_DMBASELINE_BASELINEDN_DEFAULT (_CSEN_DMBASELINE_BASELINEDN_DEFAULT << 16)

#define	CSEN_DMBASELINE_BASELINEUP_DEFAULT (_CSEN_DMBASELINE_BASELINEUP_DEFAULT << 0)

#define	CSEN_DMCFG_CRMODE_DEFAULT (_CSEN_DMCFG_CRMODE_DEFAULT << 20)

#define	CSEN_DMCFG_CRMODE_DM10 (_CSEN_DMCFG_CRMODE_DM10 << 20)

#define	CSEN_DMCFG_CRMODE_DM12 (_CSEN_DMCFG_CRMODE_DM12 << 20)

#define	CSEN_DMCFG_CRMODE_DM14 (_CSEN_DMCFG_CRMODE_DM14 << 20)

#define	CSEN_DMCFG_CRMODE_DM16 (_CSEN_DMCFG_CRMODE_DM16 << 20)

#define	CSEN_DMCFG_DMCR_DEFAULT (_CSEN_DMCFG_DMCR_DEFAULT << 16)

#define	CSEN_DMCFG_DMG_DEFAULT (_CSEN_DMCFG_DMG_DEFAULT << 0)

#define	CSEN_DMCFG_DMGRDIS (0x1UL << 28)

#define	CSEN_DMCFG_DMGRDIS_DEFAULT (_CSEN_DMCFG_DMGRDIS_DEFAULT << 28)

#define	CSEN_DMCFG_DMR_DEFAULT (_CSEN_DMCFG_DMR_DEFAULT << 8)

#define	CSEN_EMA_EMA_DEFAULT (_CSEN_EMA_EMA_DEFAULT << 0)

#define	CSEN_EMACTRL_EMASAMPLE_DEFAULT (_CSEN_EMACTRL_EMASAMPLE_DEFAULT << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W1 (_CSEN_EMACTRL_EMASAMPLE_W1 << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W16 (_CSEN_EMACTRL_EMASAMPLE_W16 << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W2 (_CSEN_EMACTRL_EMASAMPLE_W2 << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W32 (_CSEN_EMACTRL_EMASAMPLE_W32 << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W4 (_CSEN_EMACTRL_EMASAMPLE_W4 << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W64 (_CSEN_EMACTRL_EMASAMPLE_W64 << 0)

#define	CSEN_EMACTRL_EMASAMPLE_W8 (_CSEN_EMACTRL_EMASAMPLE_W8 << 0)

#define	CSEN_IEN_APORTCONFLICT (0x1UL << 4)

#define	CSEN_IEN_APORTCONFLICT_DEFAULT (_CSEN_IEN_APORTCONFLICT_DEFAULT << 4)

#define	CSEN_IEN_CMP (0x1UL << 0)

#define	CSEN_IEN_CMP_DEFAULT (_CSEN_IEN_CMP_DEFAULT << 0)

#define	CSEN_IEN_CONV (0x1UL << 1)

#define	CSEN_IEN_CONV_DEFAULT (_CSEN_IEN_CONV_DEFAULT << 1)

#define	CSEN_IEN_DMAOF (0x1UL << 3)

#define	CSEN_IEN_DMAOF_DEFAULT (_CSEN_IEN_DMAOF_DEFAULT << 3)

#define	CSEN_IEN_EOS (0x1UL << 2)

#define	CSEN_IEN_EOS_DEFAULT (_CSEN_IEN_EOS_DEFAULT << 2)

#define	CSEN_IF_APORTCONFLICT (0x1UL << 4)

#define	CSEN_IF_APORTCONFLICT_DEFAULT (_CSEN_IF_APORTCONFLICT_DEFAULT << 4)

#define	CSEN_IF_CMP (0x1UL << 0)

#define	CSEN_IF_CMP_DEFAULT (_CSEN_IF_CMP_DEFAULT << 0)

#define	CSEN_IF_CONV (0x1UL << 1)

#define	CSEN_IF_CONV_DEFAULT (_CSEN_IF_CONV_DEFAULT << 1)

#define	CSEN_IF_DMAOF (0x1UL << 3)

#define	CSEN_IF_DMAOF_DEFAULT (_CSEN_IF_DMAOF_DEFAULT << 3)

#define	CSEN_IF_EOS (0x1UL << 2)

#define	CSEN_IF_EOS_DEFAULT (_CSEN_IF_EOS_DEFAULT << 2)

#define	CSEN_IFC_APORTCONFLICT (0x1UL << 4)

#define	CSEN_IFC_APORTCONFLICT_DEFAULT (_CSEN_IFC_APORTCONFLICT_DEFAULT << 4)

#define	CSEN_IFC_CMP (0x1UL << 0)

#define	CSEN_IFC_CMP_DEFAULT (_CSEN_IFC_CMP_DEFAULT << 0)

#define	CSEN_IFC_CONV (0x1UL << 1)

#define	CSEN_IFC_CONV_DEFAULT (_CSEN_IFC_CONV_DEFAULT << 1)

#define	CSEN_IFC_DMAOF (0x1UL << 3)

#define	CSEN_IFC_DMAOF_DEFAULT (_CSEN_IFC_DMAOF_DEFAULT << 3)

#define	CSEN_IFC_EOS (0x1UL << 2)

#define	CSEN_IFC_EOS_DEFAULT (_CSEN_IFC_EOS_DEFAULT << 2)

#define	CSEN_IFS_APORTCONFLICT (0x1UL << 4)

#define	CSEN_IFS_APORTCONFLICT_DEFAULT (_CSEN_IFS_APORTCONFLICT_DEFAULT << 4)

#define	CSEN_IFS_CMP (0x1UL << 0)

#define	CSEN_IFS_CMP_DEFAULT (_CSEN_IFS_CMP_DEFAULT << 0)

#define	CSEN_IFS_CONV (0x1UL << 1)

#define	CSEN_IFS_CONV_DEFAULT (_CSEN_IFS_CONV_DEFAULT << 1)

#define	CSEN_IFS_DMAOF (0x1UL << 3)

#define	CSEN_IFS_DMAOF_DEFAULT (_CSEN_IFS_DMAOF_DEFAULT << 3)

#define	CSEN_IFS_EOS (0x1UL << 2)

#define	CSEN_IFS_EOS_DEFAULT (_CSEN_IFS_EOS_DEFAULT << 2)

#define	CSEN_PRSSEL_PRSSEL_DEFAULT (_CSEN_PRSSEL_PRSSEL_DEFAULT << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH0 (_CSEN_PRSSEL_PRSSEL_PRSCH0 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH1 (_CSEN_PRSSEL_PRSSEL_PRSCH1 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH10 (_CSEN_PRSSEL_PRSSEL_PRSCH10 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH11 (_CSEN_PRSSEL_PRSSEL_PRSCH11 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH2 (_CSEN_PRSSEL_PRSSEL_PRSCH2 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH3 (_CSEN_PRSSEL_PRSSEL_PRSCH3 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH4 (_CSEN_PRSSEL_PRSSEL_PRSCH4 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH5 (_CSEN_PRSSEL_PRSSEL_PRSCH5 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH6 (_CSEN_PRSSEL_PRSSEL_PRSCH6 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH7 (_CSEN_PRSSEL_PRSSEL_PRSCH7 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH8 (_CSEN_PRSSEL_PRSSEL_PRSCH8 << 0)

#define	CSEN_PRSSEL_PRSSEL_PRSCH9 (_CSEN_PRSSEL_PRSSEL_PRSCH9 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15 << 0)

#define	CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT << 0)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH0TO7 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH16TO23 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH24TO31 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT1CH8TO15 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH0TO7 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH16TO23 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH24TO31 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_APORT3CH8TO15 << 16)

#define	CSEN_SCANINPUTSEL0_INPUT16TO23SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT16TO23SEL_DEFAULT << 16)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH0TO7 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH16TO23 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH24TO31 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT1CH8TO15 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH0TO7 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH16TO23 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH24TO31 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_APORT3CH8TO15 << 24)

#define	CSEN_SCANINPUTSEL0_INPUT24TO31SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT24TO31SEL_DEFAULT << 24)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH0TO7 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH16TO23 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH24TO31 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT1CH8TO15 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH0TO7 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH16TO23 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH24TO31 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_APORT3CH8TO15 << 8)

#define	CSEN_SCANINPUTSEL0_INPUT8TO15SEL_DEFAULT (_CSEN_SCANINPUTSEL0_INPUT8TO15SEL_DEFAULT << 8)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH0TO7 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH16TO23 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH24TO31 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT1CH8TO15 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH0TO7 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH16TO23 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH24TO31 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_APORT3CH8TO15 << 0)

#define	CSEN_SCANINPUTSEL1_INPUT32TO39SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT32TO39SEL_DEFAULT << 0)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH0TO7 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH16TO23 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH24TO31 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT1CH8TO15 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH0TO7 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH16TO23 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH24TO31 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_APORT3CH8TO15 << 8)

#define	CSEN_SCANINPUTSEL1_INPUT40TO47SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT40TO47SEL_DEFAULT << 8)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH0TO7 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH16TO23 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH24TO31 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT1CH8TO15 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH0TO7 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH16TO23 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH24TO31 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_APORT3CH8TO15 << 16)

#define	CSEN_SCANINPUTSEL1_INPUT48TO55SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT48TO55SEL_DEFAULT << 16)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH0TO7 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH16TO23 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH24TO31 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT1CH8TO15 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH0TO7 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH0TO7 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH16TO23 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH16TO23 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH24TO31 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH24TO31 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH8TO15 (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_APORT3CH8TO15 << 24)

#define	CSEN_SCANINPUTSEL1_INPUT56TO63SEL_DEFAULT (_CSEN_SCANINPUTSEL1_INPUT56TO63SEL_DEFAULT << 24)

#define	CSEN_SCANMASK0_SCANINPUTEN_DEFAULT (_CSEN_SCANMASK0_SCANINPUTEN_DEFAULT << 0)

#define	CSEN_SCANMASK1_SCANINPUTEN_DEFAULT (_CSEN_SCANMASK1_SCANINPUTEN_DEFAULT << 0)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8 (_CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9 (_CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8 (_CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9 (_CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9 << 4)

#define	CSEN_SINGLECTRL_SINGLESEL_DEFAULT (_CSEN_SINGLECTRL_SINGLESEL_DEFAULT << 4)

#define	CSEN_STATUS_CSENBUSY (0x1UL << 0)

#define	CSEN_STATUS_CSENBUSY_BUSY (_CSEN_STATUS_CSENBUSY_BUSY << 0)

#define	CSEN_STATUS_CSENBUSY_DEFAULT (_CSEN_STATUS_CSENBUSY_DEFAULT << 0)

#define	CSEN_STATUS_CSENBUSY_IDLE (_CSEN_STATUS_CSENBUSY_IDLE << 0)

#define	CSEN_TIMCTRL_PCPRESC_DEFAULT (_CSEN_TIMCTRL_PCPRESC_DEFAULT << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV1 (_CSEN_TIMCTRL_PCPRESC_DIV1 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV128 (_CSEN_TIMCTRL_PCPRESC_DIV128 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV16 (_CSEN_TIMCTRL_PCPRESC_DIV16 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV2 (_CSEN_TIMCTRL_PCPRESC_DIV2 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV32 (_CSEN_TIMCTRL_PCPRESC_DIV32 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV4 (_CSEN_TIMCTRL_PCPRESC_DIV4 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV64 (_CSEN_TIMCTRL_PCPRESC_DIV64 << 0)

#define	CSEN_TIMCTRL_PCPRESC_DIV8 (_CSEN_TIMCTRL_PCPRESC_DIV8 << 0)

#define	CSEN_TIMCTRL_PCTOP_DEFAULT (_CSEN_TIMCTRL_PCTOP_DEFAULT << 8)

#define	CSEN_TIMCTRL_WARMUPCNT_DEFAULT (_CSEN_TIMCTRL_WARMUPCNT_DEFAULT << 16)

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