EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
Data Fields
WDOG_TypeDef Struct Reference
Devices » EFR32MG1P_WDOG

Detailed Description

Definition at line 41 of file efr32mg1p_wdog.h.

Data Fields

__IOM uint32_t CMD
 
__IOM uint32_t CTRL
 
__IOM uint32_t IEN
 
__IM uint32_t IF
 
__IOM uint32_t IFC
 
__IOM uint32_t IFS
 
WDOG_PCH_TypeDef PCH [2]
 
uint32_t RESERVED0 [2]
 
__IM uint32_t SYNCBUSY
 

Field Documentation

__IOM uint32_t WDOG_TypeDef::CMD

Command Register

Definition at line 44 of file efr32mg1p_wdog.h.

Referenced by WDOGn_Feed().

__IOM uint32_t WDOG_TypeDef::CTRL

Control Register

Definition at line 43 of file efr32mg1p_wdog.h.

Referenced by WDOGn_Enable(), WDOGn_Feed(), WDOGn_Init(), and WDOGn_Lock().

__IOM uint32_t WDOG_TypeDef::IEN

Interrupt Enable Register

Definition at line 54 of file efr32mg1p_wdog.h.

Referenced by WDOGn_IntDisable(), WDOGn_IntEnable(), and WDOGn_IntGetEnabled().

__IM uint32_t WDOG_TypeDef::IF

Watchdog Interrupt Flags

Definition at line 51 of file efr32mg1p_wdog.h.

Referenced by WDOGn_IntGet(), and WDOGn_IntGetEnabled().

__IOM uint32_t WDOG_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 53 of file efr32mg1p_wdog.h.

Referenced by WDOGn_IntClear().

__IOM uint32_t WDOG_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 52 of file efr32mg1p_wdog.h.

Referenced by WDOGn_IntSet().

WDOG_PCH_TypeDef WDOG_TypeDef::PCH[2]

PCH

Definition at line 48 of file efr32mg1p_wdog.h.

uint32_t WDOG_TypeDef::RESERVED0[2]

Reserved for future use

Definition at line 50 of file efr32mg1p_wdog.h.

__IM uint32_t WDOG_TypeDef::SYNCBUSY

Synchronization Busy Register

Definition at line 46 of file efr32mg1p_wdog.h.

Referenced by WDOGn_Enable(), WDOGn_Feed(), WDOGn_Init(), and WDOGn_Lock().

The documentation for this struct was generated from the following file: