EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
efr32mg1p_i2c.h
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1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t CMD;
45  __IM uint32_t STATE;
46  __IM uint32_t STATUS;
47  __IOM uint32_t CLKDIV;
48  __IOM uint32_t SADDR;
49  __IOM uint32_t SADDRMASK;
50  __IM uint32_t RXDATA;
51  __IM uint32_t RXDOUBLE;
52  __IM uint32_t RXDATAP;
53  __IM uint32_t RXDOUBLEP;
54  __IOM uint32_t TXDATA;
55  __IOM uint32_t TXDOUBLE;
56  __IM uint32_t IF;
57  __IOM uint32_t IFS;
58  __IOM uint32_t IFC;
59  __IOM uint32_t IEN;
60  __IOM uint32_t ROUTEPEN;
61  __IOM uint32_t ROUTELOC0;
62 } I2C_TypeDef;
64 /**************************************************************************/
69 /* Bit fields for I2C CTRL */
70 #define _I2C_CTRL_RESETVALUE 0x00000000UL
71 #define _I2C_CTRL_MASK 0x0007B3FFUL
72 #define I2C_CTRL_EN (0x1UL << 0)
73 #define _I2C_CTRL_EN_SHIFT 0
74 #define _I2C_CTRL_EN_MASK 0x1UL
75 #define _I2C_CTRL_EN_DEFAULT 0x00000000UL
76 #define I2C_CTRL_EN_DEFAULT (_I2C_CTRL_EN_DEFAULT << 0)
77 #define I2C_CTRL_SLAVE (0x1UL << 1)
78 #define _I2C_CTRL_SLAVE_SHIFT 1
79 #define _I2C_CTRL_SLAVE_MASK 0x2UL
80 #define _I2C_CTRL_SLAVE_DEFAULT 0x00000000UL
81 #define I2C_CTRL_SLAVE_DEFAULT (_I2C_CTRL_SLAVE_DEFAULT << 1)
82 #define I2C_CTRL_AUTOACK (0x1UL << 2)
83 #define _I2C_CTRL_AUTOACK_SHIFT 2
84 #define _I2C_CTRL_AUTOACK_MASK 0x4UL
85 #define _I2C_CTRL_AUTOACK_DEFAULT 0x00000000UL
86 #define I2C_CTRL_AUTOACK_DEFAULT (_I2C_CTRL_AUTOACK_DEFAULT << 2)
87 #define I2C_CTRL_AUTOSE (0x1UL << 3)
88 #define _I2C_CTRL_AUTOSE_SHIFT 3
89 #define _I2C_CTRL_AUTOSE_MASK 0x8UL
90 #define _I2C_CTRL_AUTOSE_DEFAULT 0x00000000UL
91 #define I2C_CTRL_AUTOSE_DEFAULT (_I2C_CTRL_AUTOSE_DEFAULT << 3)
92 #define I2C_CTRL_AUTOSN (0x1UL << 4)
93 #define _I2C_CTRL_AUTOSN_SHIFT 4
94 #define _I2C_CTRL_AUTOSN_MASK 0x10UL
95 #define _I2C_CTRL_AUTOSN_DEFAULT 0x00000000UL
96 #define I2C_CTRL_AUTOSN_DEFAULT (_I2C_CTRL_AUTOSN_DEFAULT << 4)
97 #define I2C_CTRL_ARBDIS (0x1UL << 5)
98 #define _I2C_CTRL_ARBDIS_SHIFT 5
99 #define _I2C_CTRL_ARBDIS_MASK 0x20UL
100 #define _I2C_CTRL_ARBDIS_DEFAULT 0x00000000UL
101 #define I2C_CTRL_ARBDIS_DEFAULT (_I2C_CTRL_ARBDIS_DEFAULT << 5)
102 #define I2C_CTRL_GCAMEN (0x1UL << 6)
103 #define _I2C_CTRL_GCAMEN_SHIFT 6
104 #define _I2C_CTRL_GCAMEN_MASK 0x40UL
105 #define _I2C_CTRL_GCAMEN_DEFAULT 0x00000000UL
106 #define I2C_CTRL_GCAMEN_DEFAULT (_I2C_CTRL_GCAMEN_DEFAULT << 6)
107 #define I2C_CTRL_TXBIL (0x1UL << 7)
108 #define _I2C_CTRL_TXBIL_SHIFT 7
109 #define _I2C_CTRL_TXBIL_MASK 0x80UL
110 #define _I2C_CTRL_TXBIL_DEFAULT 0x00000000UL
111 #define _I2C_CTRL_TXBIL_EMPTY 0x00000000UL
112 #define _I2C_CTRL_TXBIL_HALFFULL 0x00000001UL
113 #define I2C_CTRL_TXBIL_DEFAULT (_I2C_CTRL_TXBIL_DEFAULT << 7)
114 #define I2C_CTRL_TXBIL_EMPTY (_I2C_CTRL_TXBIL_EMPTY << 7)
115 #define I2C_CTRL_TXBIL_HALFFULL (_I2C_CTRL_TXBIL_HALFFULL << 7)
116 #define _I2C_CTRL_CLHR_SHIFT 8
117 #define _I2C_CTRL_CLHR_MASK 0x300UL
118 #define _I2C_CTRL_CLHR_DEFAULT 0x00000000UL
119 #define _I2C_CTRL_CLHR_STANDARD 0x00000000UL
120 #define _I2C_CTRL_CLHR_ASYMMETRIC 0x00000001UL
121 #define _I2C_CTRL_CLHR_FAST 0x00000002UL
122 #define I2C_CTRL_CLHR_DEFAULT (_I2C_CTRL_CLHR_DEFAULT << 8)
123 #define I2C_CTRL_CLHR_STANDARD (_I2C_CTRL_CLHR_STANDARD << 8)
124 #define I2C_CTRL_CLHR_ASYMMETRIC (_I2C_CTRL_CLHR_ASYMMETRIC << 8)
125 #define I2C_CTRL_CLHR_FAST (_I2C_CTRL_CLHR_FAST << 8)
126 #define _I2C_CTRL_BITO_SHIFT 12
127 #define _I2C_CTRL_BITO_MASK 0x3000UL
128 #define _I2C_CTRL_BITO_DEFAULT 0x00000000UL
129 #define _I2C_CTRL_BITO_OFF 0x00000000UL
130 #define _I2C_CTRL_BITO_40PCC 0x00000001UL
131 #define _I2C_CTRL_BITO_80PCC 0x00000002UL
132 #define _I2C_CTRL_BITO_160PCC 0x00000003UL
133 #define I2C_CTRL_BITO_DEFAULT (_I2C_CTRL_BITO_DEFAULT << 12)
134 #define I2C_CTRL_BITO_OFF (_I2C_CTRL_BITO_OFF << 12)
135 #define I2C_CTRL_BITO_40PCC (_I2C_CTRL_BITO_40PCC << 12)
136 #define I2C_CTRL_BITO_80PCC (_I2C_CTRL_BITO_80PCC << 12)
137 #define I2C_CTRL_BITO_160PCC (_I2C_CTRL_BITO_160PCC << 12)
138 #define I2C_CTRL_GIBITO (0x1UL << 15)
139 #define _I2C_CTRL_GIBITO_SHIFT 15
140 #define _I2C_CTRL_GIBITO_MASK 0x8000UL
141 #define _I2C_CTRL_GIBITO_DEFAULT 0x00000000UL
142 #define I2C_CTRL_GIBITO_DEFAULT (_I2C_CTRL_GIBITO_DEFAULT << 15)
143 #define _I2C_CTRL_CLTO_SHIFT 16
144 #define _I2C_CTRL_CLTO_MASK 0x70000UL
145 #define _I2C_CTRL_CLTO_DEFAULT 0x00000000UL
146 #define _I2C_CTRL_CLTO_OFF 0x00000000UL
147 #define _I2C_CTRL_CLTO_40PCC 0x00000001UL
148 #define _I2C_CTRL_CLTO_80PCC 0x00000002UL
149 #define _I2C_CTRL_CLTO_160PCC 0x00000003UL
150 #define _I2C_CTRL_CLTO_320PCC 0x00000004UL
151 #define _I2C_CTRL_CLTO_1024PCC 0x00000005UL
152 #define I2C_CTRL_CLTO_DEFAULT (_I2C_CTRL_CLTO_DEFAULT << 16)
153 #define I2C_CTRL_CLTO_OFF (_I2C_CTRL_CLTO_OFF << 16)
154 #define I2C_CTRL_CLTO_40PCC (_I2C_CTRL_CLTO_40PCC << 16)
155 #define I2C_CTRL_CLTO_80PCC (_I2C_CTRL_CLTO_80PCC << 16)
156 #define I2C_CTRL_CLTO_160PCC (_I2C_CTRL_CLTO_160PCC << 16)
157 #define I2C_CTRL_CLTO_320PCC (_I2C_CTRL_CLTO_320PCC << 16)
158 #define I2C_CTRL_CLTO_1024PCC (_I2C_CTRL_CLTO_1024PCC << 16)
160 /* Bit fields for I2C CMD */
161 #define _I2C_CMD_RESETVALUE 0x00000000UL
162 #define _I2C_CMD_MASK 0x000000FFUL
163 #define I2C_CMD_START (0x1UL << 0)
164 #define _I2C_CMD_START_SHIFT 0
165 #define _I2C_CMD_START_MASK 0x1UL
166 #define _I2C_CMD_START_DEFAULT 0x00000000UL
167 #define I2C_CMD_START_DEFAULT (_I2C_CMD_START_DEFAULT << 0)
168 #define I2C_CMD_STOP (0x1UL << 1)
169 #define _I2C_CMD_STOP_SHIFT 1
170 #define _I2C_CMD_STOP_MASK 0x2UL
171 #define _I2C_CMD_STOP_DEFAULT 0x00000000UL
172 #define I2C_CMD_STOP_DEFAULT (_I2C_CMD_STOP_DEFAULT << 1)
173 #define I2C_CMD_ACK (0x1UL << 2)
174 #define _I2C_CMD_ACK_SHIFT 2
175 #define _I2C_CMD_ACK_MASK 0x4UL
176 #define _I2C_CMD_ACK_DEFAULT 0x00000000UL
177 #define I2C_CMD_ACK_DEFAULT (_I2C_CMD_ACK_DEFAULT << 2)
178 #define I2C_CMD_NACK (0x1UL << 3)
179 #define _I2C_CMD_NACK_SHIFT 3
180 #define _I2C_CMD_NACK_MASK 0x8UL
181 #define _I2C_CMD_NACK_DEFAULT 0x00000000UL
182 #define I2C_CMD_NACK_DEFAULT (_I2C_CMD_NACK_DEFAULT << 3)
183 #define I2C_CMD_CONT (0x1UL << 4)
184 #define _I2C_CMD_CONT_SHIFT 4
185 #define _I2C_CMD_CONT_MASK 0x10UL
186 #define _I2C_CMD_CONT_DEFAULT 0x00000000UL
187 #define I2C_CMD_CONT_DEFAULT (_I2C_CMD_CONT_DEFAULT << 4)
188 #define I2C_CMD_ABORT (0x1UL << 5)
189 #define _I2C_CMD_ABORT_SHIFT 5
190 #define _I2C_CMD_ABORT_MASK 0x20UL
191 #define _I2C_CMD_ABORT_DEFAULT 0x00000000UL
192 #define I2C_CMD_ABORT_DEFAULT (_I2C_CMD_ABORT_DEFAULT << 5)
193 #define I2C_CMD_CLEARTX (0x1UL << 6)
194 #define _I2C_CMD_CLEARTX_SHIFT 6
195 #define _I2C_CMD_CLEARTX_MASK 0x40UL
196 #define _I2C_CMD_CLEARTX_DEFAULT 0x00000000UL
197 #define I2C_CMD_CLEARTX_DEFAULT (_I2C_CMD_CLEARTX_DEFAULT << 6)
198 #define I2C_CMD_CLEARPC (0x1UL << 7)
199 #define _I2C_CMD_CLEARPC_SHIFT 7
200 #define _I2C_CMD_CLEARPC_MASK 0x80UL
201 #define _I2C_CMD_CLEARPC_DEFAULT 0x00000000UL
202 #define I2C_CMD_CLEARPC_DEFAULT (_I2C_CMD_CLEARPC_DEFAULT << 7)
204 /* Bit fields for I2C STATE */
205 #define _I2C_STATE_RESETVALUE 0x00000001UL
206 #define _I2C_STATE_MASK 0x000000FFUL
207 #define I2C_STATE_BUSY (0x1UL << 0)
208 #define _I2C_STATE_BUSY_SHIFT 0
209 #define _I2C_STATE_BUSY_MASK 0x1UL
210 #define _I2C_STATE_BUSY_DEFAULT 0x00000001UL
211 #define I2C_STATE_BUSY_DEFAULT (_I2C_STATE_BUSY_DEFAULT << 0)
212 #define I2C_STATE_MASTER (0x1UL << 1)
213 #define _I2C_STATE_MASTER_SHIFT 1
214 #define _I2C_STATE_MASTER_MASK 0x2UL
215 #define _I2C_STATE_MASTER_DEFAULT 0x00000000UL
216 #define I2C_STATE_MASTER_DEFAULT (_I2C_STATE_MASTER_DEFAULT << 1)
217 #define I2C_STATE_TRANSMITTER (0x1UL << 2)
218 #define _I2C_STATE_TRANSMITTER_SHIFT 2
219 #define _I2C_STATE_TRANSMITTER_MASK 0x4UL
220 #define _I2C_STATE_TRANSMITTER_DEFAULT 0x00000000UL
221 #define I2C_STATE_TRANSMITTER_DEFAULT (_I2C_STATE_TRANSMITTER_DEFAULT << 2)
222 #define I2C_STATE_NACKED (0x1UL << 3)
223 #define _I2C_STATE_NACKED_SHIFT 3
224 #define _I2C_STATE_NACKED_MASK 0x8UL
225 #define _I2C_STATE_NACKED_DEFAULT 0x00000000UL
226 #define I2C_STATE_NACKED_DEFAULT (_I2C_STATE_NACKED_DEFAULT << 3)
227 #define I2C_STATE_BUSHOLD (0x1UL << 4)
228 #define _I2C_STATE_BUSHOLD_SHIFT 4
229 #define _I2C_STATE_BUSHOLD_MASK 0x10UL
230 #define _I2C_STATE_BUSHOLD_DEFAULT 0x00000000UL
231 #define I2C_STATE_BUSHOLD_DEFAULT (_I2C_STATE_BUSHOLD_DEFAULT << 4)
232 #define _I2C_STATE_STATE_SHIFT 5
233 #define _I2C_STATE_STATE_MASK 0xE0UL
234 #define _I2C_STATE_STATE_DEFAULT 0x00000000UL
235 #define _I2C_STATE_STATE_IDLE 0x00000000UL
236 #define _I2C_STATE_STATE_WAIT 0x00000001UL
237 #define _I2C_STATE_STATE_START 0x00000002UL
238 #define _I2C_STATE_STATE_ADDR 0x00000003UL
239 #define _I2C_STATE_STATE_ADDRACK 0x00000004UL
240 #define _I2C_STATE_STATE_DATA 0x00000005UL
241 #define _I2C_STATE_STATE_DATAACK 0x00000006UL
242 #define I2C_STATE_STATE_DEFAULT (_I2C_STATE_STATE_DEFAULT << 5)
243 #define I2C_STATE_STATE_IDLE (_I2C_STATE_STATE_IDLE << 5)
244 #define I2C_STATE_STATE_WAIT (_I2C_STATE_STATE_WAIT << 5)
245 #define I2C_STATE_STATE_START (_I2C_STATE_STATE_START << 5)
246 #define I2C_STATE_STATE_ADDR (_I2C_STATE_STATE_ADDR << 5)
247 #define I2C_STATE_STATE_ADDRACK (_I2C_STATE_STATE_ADDRACK << 5)
248 #define I2C_STATE_STATE_DATA (_I2C_STATE_STATE_DATA << 5)
249 #define I2C_STATE_STATE_DATAACK (_I2C_STATE_STATE_DATAACK << 5)
251 /* Bit fields for I2C STATUS */
252 #define _I2C_STATUS_RESETVALUE 0x00000080UL
253 #define _I2C_STATUS_MASK 0x000003FFUL
254 #define I2C_STATUS_PSTART (0x1UL << 0)
255 #define _I2C_STATUS_PSTART_SHIFT 0
256 #define _I2C_STATUS_PSTART_MASK 0x1UL
257 #define _I2C_STATUS_PSTART_DEFAULT 0x00000000UL
258 #define I2C_STATUS_PSTART_DEFAULT (_I2C_STATUS_PSTART_DEFAULT << 0)
259 #define I2C_STATUS_PSTOP (0x1UL << 1)
260 #define _I2C_STATUS_PSTOP_SHIFT 1
261 #define _I2C_STATUS_PSTOP_MASK 0x2UL
262 #define _I2C_STATUS_PSTOP_DEFAULT 0x00000000UL
263 #define I2C_STATUS_PSTOP_DEFAULT (_I2C_STATUS_PSTOP_DEFAULT << 1)
264 #define I2C_STATUS_PACK (0x1UL << 2)
265 #define _I2C_STATUS_PACK_SHIFT 2
266 #define _I2C_STATUS_PACK_MASK 0x4UL
267 #define _I2C_STATUS_PACK_DEFAULT 0x00000000UL
268 #define I2C_STATUS_PACK_DEFAULT (_I2C_STATUS_PACK_DEFAULT << 2)
269 #define I2C_STATUS_PNACK (0x1UL << 3)
270 #define _I2C_STATUS_PNACK_SHIFT 3
271 #define _I2C_STATUS_PNACK_MASK 0x8UL
272 #define _I2C_STATUS_PNACK_DEFAULT 0x00000000UL
273 #define I2C_STATUS_PNACK_DEFAULT (_I2C_STATUS_PNACK_DEFAULT << 3)
274 #define I2C_STATUS_PCONT (0x1UL << 4)
275 #define _I2C_STATUS_PCONT_SHIFT 4
276 #define _I2C_STATUS_PCONT_MASK 0x10UL
277 #define _I2C_STATUS_PCONT_DEFAULT 0x00000000UL
278 #define I2C_STATUS_PCONT_DEFAULT (_I2C_STATUS_PCONT_DEFAULT << 4)
279 #define I2C_STATUS_PABORT (0x1UL << 5)
280 #define _I2C_STATUS_PABORT_SHIFT 5
281 #define _I2C_STATUS_PABORT_MASK 0x20UL
282 #define _I2C_STATUS_PABORT_DEFAULT 0x00000000UL
283 #define I2C_STATUS_PABORT_DEFAULT (_I2C_STATUS_PABORT_DEFAULT << 5)
284 #define I2C_STATUS_TXC (0x1UL << 6)
285 #define _I2C_STATUS_TXC_SHIFT 6
286 #define _I2C_STATUS_TXC_MASK 0x40UL
287 #define _I2C_STATUS_TXC_DEFAULT 0x00000000UL
288 #define I2C_STATUS_TXC_DEFAULT (_I2C_STATUS_TXC_DEFAULT << 6)
289 #define I2C_STATUS_TXBL (0x1UL << 7)
290 #define _I2C_STATUS_TXBL_SHIFT 7
291 #define _I2C_STATUS_TXBL_MASK 0x80UL
292 #define _I2C_STATUS_TXBL_DEFAULT 0x00000001UL
293 #define I2C_STATUS_TXBL_DEFAULT (_I2C_STATUS_TXBL_DEFAULT << 7)
294 #define I2C_STATUS_RXDATAV (0x1UL << 8)
295 #define _I2C_STATUS_RXDATAV_SHIFT 8
296 #define _I2C_STATUS_RXDATAV_MASK 0x100UL
297 #define _I2C_STATUS_RXDATAV_DEFAULT 0x00000000UL
298 #define I2C_STATUS_RXDATAV_DEFAULT (_I2C_STATUS_RXDATAV_DEFAULT << 8)
299 #define I2C_STATUS_RXFULL (0x1UL << 9)
300 #define _I2C_STATUS_RXFULL_SHIFT 9
301 #define _I2C_STATUS_RXFULL_MASK 0x200UL
302 #define _I2C_STATUS_RXFULL_DEFAULT 0x00000000UL
303 #define I2C_STATUS_RXFULL_DEFAULT (_I2C_STATUS_RXFULL_DEFAULT << 9)
305 /* Bit fields for I2C CLKDIV */
306 #define _I2C_CLKDIV_RESETVALUE 0x00000000UL
307 #define _I2C_CLKDIV_MASK 0x000001FFUL
308 #define _I2C_CLKDIV_DIV_SHIFT 0
309 #define _I2C_CLKDIV_DIV_MASK 0x1FFUL
310 #define _I2C_CLKDIV_DIV_DEFAULT 0x00000000UL
311 #define I2C_CLKDIV_DIV_DEFAULT (_I2C_CLKDIV_DIV_DEFAULT << 0)
313 /* Bit fields for I2C SADDR */
314 #define _I2C_SADDR_RESETVALUE 0x00000000UL
315 #define _I2C_SADDR_MASK 0x000000FEUL
316 #define _I2C_SADDR_ADDR_SHIFT 1
317 #define _I2C_SADDR_ADDR_MASK 0xFEUL
318 #define _I2C_SADDR_ADDR_DEFAULT 0x00000000UL
319 #define I2C_SADDR_ADDR_DEFAULT (_I2C_SADDR_ADDR_DEFAULT << 1)
321 /* Bit fields for I2C SADDRMASK */
322 #define _I2C_SADDRMASK_RESETVALUE 0x00000000UL
323 #define _I2C_SADDRMASK_MASK 0x000000FEUL
324 #define _I2C_SADDRMASK_MASK_SHIFT 1
325 #define _I2C_SADDRMASK_MASK_MASK 0xFEUL
326 #define _I2C_SADDRMASK_MASK_DEFAULT 0x00000000UL
327 #define I2C_SADDRMASK_MASK_DEFAULT (_I2C_SADDRMASK_MASK_DEFAULT << 1)
329 /* Bit fields for I2C RXDATA */
330 #define _I2C_RXDATA_RESETVALUE 0x00000000UL
331 #define _I2C_RXDATA_MASK 0x000000FFUL
332 #define _I2C_RXDATA_RXDATA_SHIFT 0
333 #define _I2C_RXDATA_RXDATA_MASK 0xFFUL
334 #define _I2C_RXDATA_RXDATA_DEFAULT 0x00000000UL
335 #define I2C_RXDATA_RXDATA_DEFAULT (_I2C_RXDATA_RXDATA_DEFAULT << 0)
337 /* Bit fields for I2C RXDOUBLE */
338 #define _I2C_RXDOUBLE_RESETVALUE 0x00000000UL
339 #define _I2C_RXDOUBLE_MASK 0x0000FFFFUL
340 #define _I2C_RXDOUBLE_RXDATA0_SHIFT 0
341 #define _I2C_RXDOUBLE_RXDATA0_MASK 0xFFUL
342 #define _I2C_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL
343 #define I2C_RXDOUBLE_RXDATA0_DEFAULT (_I2C_RXDOUBLE_RXDATA0_DEFAULT << 0)
344 #define _I2C_RXDOUBLE_RXDATA1_SHIFT 8
345 #define _I2C_RXDOUBLE_RXDATA1_MASK 0xFF00UL
346 #define _I2C_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL
347 #define I2C_RXDOUBLE_RXDATA1_DEFAULT (_I2C_RXDOUBLE_RXDATA1_DEFAULT << 8)
349 /* Bit fields for I2C RXDATAP */
350 #define _I2C_RXDATAP_RESETVALUE 0x00000000UL
351 #define _I2C_RXDATAP_MASK 0x000000FFUL
352 #define _I2C_RXDATAP_RXDATAP_SHIFT 0
353 #define _I2C_RXDATAP_RXDATAP_MASK 0xFFUL
354 #define _I2C_RXDATAP_RXDATAP_DEFAULT 0x00000000UL
355 #define I2C_RXDATAP_RXDATAP_DEFAULT (_I2C_RXDATAP_RXDATAP_DEFAULT << 0)
357 /* Bit fields for I2C RXDOUBLEP */
358 #define _I2C_RXDOUBLEP_RESETVALUE 0x00000000UL
359 #define _I2C_RXDOUBLEP_MASK 0x0000FFFFUL
360 #define _I2C_RXDOUBLEP_RXDATAP0_SHIFT 0
361 #define _I2C_RXDOUBLEP_RXDATAP0_MASK 0xFFUL
362 #define _I2C_RXDOUBLEP_RXDATAP0_DEFAULT 0x00000000UL
363 #define I2C_RXDOUBLEP_RXDATAP0_DEFAULT (_I2C_RXDOUBLEP_RXDATAP0_DEFAULT << 0)
364 #define _I2C_RXDOUBLEP_RXDATAP1_SHIFT 8
365 #define _I2C_RXDOUBLEP_RXDATAP1_MASK 0xFF00UL
366 #define _I2C_RXDOUBLEP_RXDATAP1_DEFAULT 0x00000000UL
367 #define I2C_RXDOUBLEP_RXDATAP1_DEFAULT (_I2C_RXDOUBLEP_RXDATAP1_DEFAULT << 8)
369 /* Bit fields for I2C TXDATA */
370 #define _I2C_TXDATA_RESETVALUE 0x00000000UL
371 #define _I2C_TXDATA_MASK 0x000000FFUL
372 #define _I2C_TXDATA_TXDATA_SHIFT 0
373 #define _I2C_TXDATA_TXDATA_MASK 0xFFUL
374 #define _I2C_TXDATA_TXDATA_DEFAULT 0x00000000UL
375 #define I2C_TXDATA_TXDATA_DEFAULT (_I2C_TXDATA_TXDATA_DEFAULT << 0)
377 /* Bit fields for I2C TXDOUBLE */
378 #define _I2C_TXDOUBLE_RESETVALUE 0x00000000UL
379 #define _I2C_TXDOUBLE_MASK 0x0000FFFFUL
380 #define _I2C_TXDOUBLE_TXDATA0_SHIFT 0
381 #define _I2C_TXDOUBLE_TXDATA0_MASK 0xFFUL
382 #define _I2C_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL
383 #define I2C_TXDOUBLE_TXDATA0_DEFAULT (_I2C_TXDOUBLE_TXDATA0_DEFAULT << 0)
384 #define _I2C_TXDOUBLE_TXDATA1_SHIFT 8
385 #define _I2C_TXDOUBLE_TXDATA1_MASK 0xFF00UL
386 #define _I2C_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL
387 #define I2C_TXDOUBLE_TXDATA1_DEFAULT (_I2C_TXDOUBLE_TXDATA1_DEFAULT << 8)
389 /* Bit fields for I2C IF */
390 #define _I2C_IF_RESETVALUE 0x00000010UL
391 #define _I2C_IF_MASK 0x0007FFFFUL
392 #define I2C_IF_START (0x1UL << 0)
393 #define _I2C_IF_START_SHIFT 0
394 #define _I2C_IF_START_MASK 0x1UL
395 #define _I2C_IF_START_DEFAULT 0x00000000UL
396 #define I2C_IF_START_DEFAULT (_I2C_IF_START_DEFAULT << 0)
397 #define I2C_IF_RSTART (0x1UL << 1)
398 #define _I2C_IF_RSTART_SHIFT 1
399 #define _I2C_IF_RSTART_MASK 0x2UL
400 #define _I2C_IF_RSTART_DEFAULT 0x00000000UL
401 #define I2C_IF_RSTART_DEFAULT (_I2C_IF_RSTART_DEFAULT << 1)
402 #define I2C_IF_ADDR (0x1UL << 2)
403 #define _I2C_IF_ADDR_SHIFT 2
404 #define _I2C_IF_ADDR_MASK 0x4UL
405 #define _I2C_IF_ADDR_DEFAULT 0x00000000UL
406 #define I2C_IF_ADDR_DEFAULT (_I2C_IF_ADDR_DEFAULT << 2)
407 #define I2C_IF_TXC (0x1UL << 3)
408 #define _I2C_IF_TXC_SHIFT 3
409 #define _I2C_IF_TXC_MASK 0x8UL
410 #define _I2C_IF_TXC_DEFAULT 0x00000000UL
411 #define I2C_IF_TXC_DEFAULT (_I2C_IF_TXC_DEFAULT << 3)
412 #define I2C_IF_TXBL (0x1UL << 4)
413 #define _I2C_IF_TXBL_SHIFT 4
414 #define _I2C_IF_TXBL_MASK 0x10UL
415 #define _I2C_IF_TXBL_DEFAULT 0x00000000UL
416 #define I2C_IF_TXBL_DEFAULT (_I2C_IF_TXBL_DEFAULT << 4)
417 #define I2C_IF_RXDATAV (0x1UL << 5)
418 #define _I2C_IF_RXDATAV_SHIFT 5
419 #define _I2C_IF_RXDATAV_MASK 0x20UL
420 #define _I2C_IF_RXDATAV_DEFAULT 0x00000000UL
421 #define I2C_IF_RXDATAV_DEFAULT (_I2C_IF_RXDATAV_DEFAULT << 5)
422 #define I2C_IF_ACK (0x1UL << 6)
423 #define _I2C_IF_ACK_SHIFT 6
424 #define _I2C_IF_ACK_MASK 0x40UL
425 #define _I2C_IF_ACK_DEFAULT 0x00000000UL
426 #define I2C_IF_ACK_DEFAULT (_I2C_IF_ACK_DEFAULT << 6)
427 #define I2C_IF_NACK (0x1UL << 7)
428 #define _I2C_IF_NACK_SHIFT 7
429 #define _I2C_IF_NACK_MASK 0x80UL
430 #define _I2C_IF_NACK_DEFAULT 0x00000000UL
431 #define I2C_IF_NACK_DEFAULT (_I2C_IF_NACK_DEFAULT << 7)
432 #define I2C_IF_MSTOP (0x1UL << 8)
433 #define _I2C_IF_MSTOP_SHIFT 8
434 #define _I2C_IF_MSTOP_MASK 0x100UL
435 #define _I2C_IF_MSTOP_DEFAULT 0x00000000UL
436 #define I2C_IF_MSTOP_DEFAULT (_I2C_IF_MSTOP_DEFAULT << 8)
437 #define I2C_IF_ARBLOST (0x1UL << 9)
438 #define _I2C_IF_ARBLOST_SHIFT 9
439 #define _I2C_IF_ARBLOST_MASK 0x200UL
440 #define _I2C_IF_ARBLOST_DEFAULT 0x00000000UL
441 #define I2C_IF_ARBLOST_DEFAULT (_I2C_IF_ARBLOST_DEFAULT << 9)
442 #define I2C_IF_BUSERR (0x1UL << 10)
443 #define _I2C_IF_BUSERR_SHIFT 10
444 #define _I2C_IF_BUSERR_MASK 0x400UL
445 #define _I2C_IF_BUSERR_DEFAULT 0x00000000UL
446 #define I2C_IF_BUSERR_DEFAULT (_I2C_IF_BUSERR_DEFAULT << 10)
447 #define I2C_IF_BUSHOLD (0x1UL << 11)
448 #define _I2C_IF_BUSHOLD_SHIFT 11
449 #define _I2C_IF_BUSHOLD_MASK 0x800UL
450 #define _I2C_IF_BUSHOLD_DEFAULT 0x00000000UL
451 #define I2C_IF_BUSHOLD_DEFAULT (_I2C_IF_BUSHOLD_DEFAULT << 11)
452 #define I2C_IF_TXOF (0x1UL << 12)
453 #define _I2C_IF_TXOF_SHIFT 12
454 #define _I2C_IF_TXOF_MASK 0x1000UL
455 #define _I2C_IF_TXOF_DEFAULT 0x00000000UL
456 #define I2C_IF_TXOF_DEFAULT (_I2C_IF_TXOF_DEFAULT << 12)
457 #define I2C_IF_RXUF (0x1UL << 13)
458 #define _I2C_IF_RXUF_SHIFT 13
459 #define _I2C_IF_RXUF_MASK 0x2000UL
460 #define _I2C_IF_RXUF_DEFAULT 0x00000000UL
461 #define I2C_IF_RXUF_DEFAULT (_I2C_IF_RXUF_DEFAULT << 13)
462 #define I2C_IF_BITO (0x1UL << 14)
463 #define _I2C_IF_BITO_SHIFT 14
464 #define _I2C_IF_BITO_MASK 0x4000UL
465 #define _I2C_IF_BITO_DEFAULT 0x00000000UL
466 #define I2C_IF_BITO_DEFAULT (_I2C_IF_BITO_DEFAULT << 14)
467 #define I2C_IF_CLTO (0x1UL << 15)
468 #define _I2C_IF_CLTO_SHIFT 15
469 #define _I2C_IF_CLTO_MASK 0x8000UL
470 #define _I2C_IF_CLTO_DEFAULT 0x00000000UL
471 #define I2C_IF_CLTO_DEFAULT (_I2C_IF_CLTO_DEFAULT << 15)
472 #define I2C_IF_SSTOP (0x1UL << 16)
473 #define _I2C_IF_SSTOP_SHIFT 16
474 #define _I2C_IF_SSTOP_MASK 0x10000UL
475 #define _I2C_IF_SSTOP_DEFAULT 0x00000000UL
476 #define I2C_IF_SSTOP_DEFAULT (_I2C_IF_SSTOP_DEFAULT << 16)
477 #define I2C_IF_RXFULL (0x1UL << 17)
478 #define _I2C_IF_RXFULL_SHIFT 17
479 #define _I2C_IF_RXFULL_MASK 0x20000UL
480 #define _I2C_IF_RXFULL_DEFAULT 0x00000000UL
481 #define I2C_IF_RXFULL_DEFAULT (_I2C_IF_RXFULL_DEFAULT << 17)
482 #define I2C_IF_CLERR (0x1UL << 18)
483 #define _I2C_IF_CLERR_SHIFT 18
484 #define _I2C_IF_CLERR_MASK 0x40000UL
485 #define _I2C_IF_CLERR_DEFAULT 0x00000000UL
486 #define I2C_IF_CLERR_DEFAULT (_I2C_IF_CLERR_DEFAULT << 18)
488 /* Bit fields for I2C IFS */
489 #define _I2C_IFS_RESETVALUE 0x00000000UL
490 #define _I2C_IFS_MASK 0x0007FFCFUL
491 #define I2C_IFS_START (0x1UL << 0)
492 #define _I2C_IFS_START_SHIFT 0
493 #define _I2C_IFS_START_MASK 0x1UL
494 #define _I2C_IFS_START_DEFAULT 0x00000000UL
495 #define I2C_IFS_START_DEFAULT (_I2C_IFS_START_DEFAULT << 0)
496 #define I2C_IFS_RSTART (0x1UL << 1)
497 #define _I2C_IFS_RSTART_SHIFT 1
498 #define _I2C_IFS_RSTART_MASK 0x2UL
499 #define _I2C_IFS_RSTART_DEFAULT 0x00000000UL
500 #define I2C_IFS_RSTART_DEFAULT (_I2C_IFS_RSTART_DEFAULT << 1)
501 #define I2C_IFS_ADDR (0x1UL << 2)
502 #define _I2C_IFS_ADDR_SHIFT 2
503 #define _I2C_IFS_ADDR_MASK 0x4UL
504 #define _I2C_IFS_ADDR_DEFAULT 0x00000000UL
505 #define I2C_IFS_ADDR_DEFAULT (_I2C_IFS_ADDR_DEFAULT << 2)
506 #define I2C_IFS_TXC (0x1UL << 3)
507 #define _I2C_IFS_TXC_SHIFT 3
508 #define _I2C_IFS_TXC_MASK 0x8UL
509 #define _I2C_IFS_TXC_DEFAULT 0x00000000UL
510 #define I2C_IFS_TXC_DEFAULT (_I2C_IFS_TXC_DEFAULT << 3)
511 #define I2C_IFS_ACK (0x1UL << 6)
512 #define _I2C_IFS_ACK_SHIFT 6
513 #define _I2C_IFS_ACK_MASK 0x40UL
514 #define _I2C_IFS_ACK_DEFAULT 0x00000000UL
515 #define I2C_IFS_ACK_DEFAULT (_I2C_IFS_ACK_DEFAULT << 6)
516 #define I2C_IFS_NACK (0x1UL << 7)
517 #define _I2C_IFS_NACK_SHIFT 7
518 #define _I2C_IFS_NACK_MASK 0x80UL
519 #define _I2C_IFS_NACK_DEFAULT 0x00000000UL
520 #define I2C_IFS_NACK_DEFAULT (_I2C_IFS_NACK_DEFAULT << 7)
521 #define I2C_IFS_MSTOP (0x1UL << 8)
522 #define _I2C_IFS_MSTOP_SHIFT 8
523 #define _I2C_IFS_MSTOP_MASK 0x100UL
524 #define _I2C_IFS_MSTOP_DEFAULT 0x00000000UL
525 #define I2C_IFS_MSTOP_DEFAULT (_I2C_IFS_MSTOP_DEFAULT << 8)
526 #define I2C_IFS_ARBLOST (0x1UL << 9)
527 #define _I2C_IFS_ARBLOST_SHIFT 9
528 #define _I2C_IFS_ARBLOST_MASK 0x200UL
529 #define _I2C_IFS_ARBLOST_DEFAULT 0x00000000UL
530 #define I2C_IFS_ARBLOST_DEFAULT (_I2C_IFS_ARBLOST_DEFAULT << 9)
531 #define I2C_IFS_BUSERR (0x1UL << 10)
532 #define _I2C_IFS_BUSERR_SHIFT 10
533 #define _I2C_IFS_BUSERR_MASK 0x400UL
534 #define _I2C_IFS_BUSERR_DEFAULT 0x00000000UL
535 #define I2C_IFS_BUSERR_DEFAULT (_I2C_IFS_BUSERR_DEFAULT << 10)
536 #define I2C_IFS_BUSHOLD (0x1UL << 11)
537 #define _I2C_IFS_BUSHOLD_SHIFT 11
538 #define _I2C_IFS_BUSHOLD_MASK 0x800UL
539 #define _I2C_IFS_BUSHOLD_DEFAULT 0x00000000UL
540 #define I2C_IFS_BUSHOLD_DEFAULT (_I2C_IFS_BUSHOLD_DEFAULT << 11)
541 #define I2C_IFS_TXOF (0x1UL << 12)
542 #define _I2C_IFS_TXOF_SHIFT 12
543 #define _I2C_IFS_TXOF_MASK 0x1000UL
544 #define _I2C_IFS_TXOF_DEFAULT 0x00000000UL
545 #define I2C_IFS_TXOF_DEFAULT (_I2C_IFS_TXOF_DEFAULT << 12)
546 #define I2C_IFS_RXUF (0x1UL << 13)
547 #define _I2C_IFS_RXUF_SHIFT 13
548 #define _I2C_IFS_RXUF_MASK 0x2000UL
549 #define _I2C_IFS_RXUF_DEFAULT 0x00000000UL
550 #define I2C_IFS_RXUF_DEFAULT (_I2C_IFS_RXUF_DEFAULT << 13)
551 #define I2C_IFS_BITO (0x1UL << 14)
552 #define _I2C_IFS_BITO_SHIFT 14
553 #define _I2C_IFS_BITO_MASK 0x4000UL
554 #define _I2C_IFS_BITO_DEFAULT 0x00000000UL
555 #define I2C_IFS_BITO_DEFAULT (_I2C_IFS_BITO_DEFAULT << 14)
556 #define I2C_IFS_CLTO (0x1UL << 15)
557 #define _I2C_IFS_CLTO_SHIFT 15
558 #define _I2C_IFS_CLTO_MASK 0x8000UL
559 #define _I2C_IFS_CLTO_DEFAULT 0x00000000UL
560 #define I2C_IFS_CLTO_DEFAULT (_I2C_IFS_CLTO_DEFAULT << 15)
561 #define I2C_IFS_SSTOP (0x1UL << 16)
562 #define _I2C_IFS_SSTOP_SHIFT 16
563 #define _I2C_IFS_SSTOP_MASK 0x10000UL
564 #define _I2C_IFS_SSTOP_DEFAULT 0x00000000UL
565 #define I2C_IFS_SSTOP_DEFAULT (_I2C_IFS_SSTOP_DEFAULT << 16)
566 #define I2C_IFS_RXFULL (0x1UL << 17)
567 #define _I2C_IFS_RXFULL_SHIFT 17
568 #define _I2C_IFS_RXFULL_MASK 0x20000UL
569 #define _I2C_IFS_RXFULL_DEFAULT 0x00000000UL
570 #define I2C_IFS_RXFULL_DEFAULT (_I2C_IFS_RXFULL_DEFAULT << 17)
571 #define I2C_IFS_CLERR (0x1UL << 18)
572 #define _I2C_IFS_CLERR_SHIFT 18
573 #define _I2C_IFS_CLERR_MASK 0x40000UL
574 #define _I2C_IFS_CLERR_DEFAULT 0x00000000UL
575 #define I2C_IFS_CLERR_DEFAULT (_I2C_IFS_CLERR_DEFAULT << 18)
577 /* Bit fields for I2C IFC */
578 #define _I2C_IFC_RESETVALUE 0x00000000UL
579 #define _I2C_IFC_MASK 0x0007FFCFUL
580 #define I2C_IFC_START (0x1UL << 0)
581 #define _I2C_IFC_START_SHIFT 0
582 #define _I2C_IFC_START_MASK 0x1UL
583 #define _I2C_IFC_START_DEFAULT 0x00000000UL
584 #define I2C_IFC_START_DEFAULT (_I2C_IFC_START_DEFAULT << 0)
585 #define I2C_IFC_RSTART (0x1UL << 1)
586 #define _I2C_IFC_RSTART_SHIFT 1
587 #define _I2C_IFC_RSTART_MASK 0x2UL
588 #define _I2C_IFC_RSTART_DEFAULT 0x00000000UL
589 #define I2C_IFC_RSTART_DEFAULT (_I2C_IFC_RSTART_DEFAULT << 1)
590 #define I2C_IFC_ADDR (0x1UL << 2)
591 #define _I2C_IFC_ADDR_SHIFT 2
592 #define _I2C_IFC_ADDR_MASK 0x4UL
593 #define _I2C_IFC_ADDR_DEFAULT 0x00000000UL
594 #define I2C_IFC_ADDR_DEFAULT (_I2C_IFC_ADDR_DEFAULT << 2)
595 #define I2C_IFC_TXC (0x1UL << 3)
596 #define _I2C_IFC_TXC_SHIFT 3
597 #define _I2C_IFC_TXC_MASK 0x8UL
598 #define _I2C_IFC_TXC_DEFAULT 0x00000000UL
599 #define I2C_IFC_TXC_DEFAULT (_I2C_IFC_TXC_DEFAULT << 3)
600 #define I2C_IFC_ACK (0x1UL << 6)
601 #define _I2C_IFC_ACK_SHIFT 6
602 #define _I2C_IFC_ACK_MASK 0x40UL
603 #define _I2C_IFC_ACK_DEFAULT 0x00000000UL
604 #define I2C_IFC_ACK_DEFAULT (_I2C_IFC_ACK_DEFAULT << 6)
605 #define I2C_IFC_NACK (0x1UL << 7)
606 #define _I2C_IFC_NACK_SHIFT 7
607 #define _I2C_IFC_NACK_MASK 0x80UL
608 #define _I2C_IFC_NACK_DEFAULT 0x00000000UL
609 #define I2C_IFC_NACK_DEFAULT (_I2C_IFC_NACK_DEFAULT << 7)
610 #define I2C_IFC_MSTOP (0x1UL << 8)
611 #define _I2C_IFC_MSTOP_SHIFT 8
612 #define _I2C_IFC_MSTOP_MASK 0x100UL
613 #define _I2C_IFC_MSTOP_DEFAULT 0x00000000UL
614 #define I2C_IFC_MSTOP_DEFAULT (_I2C_IFC_MSTOP_DEFAULT << 8)
615 #define I2C_IFC_ARBLOST (0x1UL << 9)
616 #define _I2C_IFC_ARBLOST_SHIFT 9
617 #define _I2C_IFC_ARBLOST_MASK 0x200UL
618 #define _I2C_IFC_ARBLOST_DEFAULT 0x00000000UL
619 #define I2C_IFC_ARBLOST_DEFAULT (_I2C_IFC_ARBLOST_DEFAULT << 9)
620 #define I2C_IFC_BUSERR (0x1UL << 10)
621 #define _I2C_IFC_BUSERR_SHIFT 10
622 #define _I2C_IFC_BUSERR_MASK 0x400UL
623 #define _I2C_IFC_BUSERR_DEFAULT 0x00000000UL
624 #define I2C_IFC_BUSERR_DEFAULT (_I2C_IFC_BUSERR_DEFAULT << 10)
625 #define I2C_IFC_BUSHOLD (0x1UL << 11)
626 #define _I2C_IFC_BUSHOLD_SHIFT 11
627 #define _I2C_IFC_BUSHOLD_MASK 0x800UL
628 #define _I2C_IFC_BUSHOLD_DEFAULT 0x00000000UL
629 #define I2C_IFC_BUSHOLD_DEFAULT (_I2C_IFC_BUSHOLD_DEFAULT << 11)
630 #define I2C_IFC_TXOF (0x1UL << 12)
631 #define _I2C_IFC_TXOF_SHIFT 12
632 #define _I2C_IFC_TXOF_MASK 0x1000UL
633 #define _I2C_IFC_TXOF_DEFAULT 0x00000000UL
634 #define I2C_IFC_TXOF_DEFAULT (_I2C_IFC_TXOF_DEFAULT << 12)
635 #define I2C_IFC_RXUF (0x1UL << 13)
636 #define _I2C_IFC_RXUF_SHIFT 13
637 #define _I2C_IFC_RXUF_MASK 0x2000UL
638 #define _I2C_IFC_RXUF_DEFAULT 0x00000000UL
639 #define I2C_IFC_RXUF_DEFAULT (_I2C_IFC_RXUF_DEFAULT << 13)
640 #define I2C_IFC_BITO (0x1UL << 14)
641 #define _I2C_IFC_BITO_SHIFT 14
642 #define _I2C_IFC_BITO_MASK 0x4000UL
643 #define _I2C_IFC_BITO_DEFAULT 0x00000000UL
644 #define I2C_IFC_BITO_DEFAULT (_I2C_IFC_BITO_DEFAULT << 14)
645 #define I2C_IFC_CLTO (0x1UL << 15)
646 #define _I2C_IFC_CLTO_SHIFT 15
647 #define _I2C_IFC_CLTO_MASK 0x8000UL
648 #define _I2C_IFC_CLTO_DEFAULT 0x00000000UL
649 #define I2C_IFC_CLTO_DEFAULT (_I2C_IFC_CLTO_DEFAULT << 15)
650 #define I2C_IFC_SSTOP (0x1UL << 16)
651 #define _I2C_IFC_SSTOP_SHIFT 16
652 #define _I2C_IFC_SSTOP_MASK 0x10000UL
653 #define _I2C_IFC_SSTOP_DEFAULT 0x00000000UL
654 #define I2C_IFC_SSTOP_DEFAULT (_I2C_IFC_SSTOP_DEFAULT << 16)
655 #define I2C_IFC_RXFULL (0x1UL << 17)
656 #define _I2C_IFC_RXFULL_SHIFT 17
657 #define _I2C_IFC_RXFULL_MASK 0x20000UL
658 #define _I2C_IFC_RXFULL_DEFAULT 0x00000000UL
659 #define I2C_IFC_RXFULL_DEFAULT (_I2C_IFC_RXFULL_DEFAULT << 17)
660 #define I2C_IFC_CLERR (0x1UL << 18)
661 #define _I2C_IFC_CLERR_SHIFT 18
662 #define _I2C_IFC_CLERR_MASK 0x40000UL
663 #define _I2C_IFC_CLERR_DEFAULT 0x00000000UL
664 #define I2C_IFC_CLERR_DEFAULT (_I2C_IFC_CLERR_DEFAULT << 18)
666 /* Bit fields for I2C IEN */
667 #define _I2C_IEN_RESETVALUE 0x00000000UL
668 #define _I2C_IEN_MASK 0x0007FFFFUL
669 #define I2C_IEN_START (0x1UL << 0)
670 #define _I2C_IEN_START_SHIFT 0
671 #define _I2C_IEN_START_MASK 0x1UL
672 #define _I2C_IEN_START_DEFAULT 0x00000000UL
673 #define I2C_IEN_START_DEFAULT (_I2C_IEN_START_DEFAULT << 0)
674 #define I2C_IEN_RSTART (0x1UL << 1)
675 #define _I2C_IEN_RSTART_SHIFT 1
676 #define _I2C_IEN_RSTART_MASK 0x2UL
677 #define _I2C_IEN_RSTART_DEFAULT 0x00000000UL
678 #define I2C_IEN_RSTART_DEFAULT (_I2C_IEN_RSTART_DEFAULT << 1)
679 #define I2C_IEN_ADDR (0x1UL << 2)
680 #define _I2C_IEN_ADDR_SHIFT 2
681 #define _I2C_IEN_ADDR_MASK 0x4UL
682 #define _I2C_IEN_ADDR_DEFAULT 0x00000000UL
683 #define I2C_IEN_ADDR_DEFAULT (_I2C_IEN_ADDR_DEFAULT << 2)
684 #define I2C_IEN_TXC (0x1UL << 3)
685 #define _I2C_IEN_TXC_SHIFT 3
686 #define _I2C_IEN_TXC_MASK 0x8UL
687 #define _I2C_IEN_TXC_DEFAULT 0x00000000UL
688 #define I2C_IEN_TXC_DEFAULT (_I2C_IEN_TXC_DEFAULT << 3)
689 #define I2C_IEN_TXBL (0x1UL << 4)
690 #define _I2C_IEN_TXBL_SHIFT 4
691 #define _I2C_IEN_TXBL_MASK 0x10UL
692 #define _I2C_IEN_TXBL_DEFAULT 0x00000000UL
693 #define I2C_IEN_TXBL_DEFAULT (_I2C_IEN_TXBL_DEFAULT << 4)
694 #define I2C_IEN_RXDATAV (0x1UL << 5)
695 #define _I2C_IEN_RXDATAV_SHIFT 5
696 #define _I2C_IEN_RXDATAV_MASK 0x20UL
697 #define _I2C_IEN_RXDATAV_DEFAULT 0x00000000UL
698 #define I2C_IEN_RXDATAV_DEFAULT (_I2C_IEN_RXDATAV_DEFAULT << 5)
699 #define I2C_IEN_ACK (0x1UL << 6)
700 #define _I2C_IEN_ACK_SHIFT 6
701 #define _I2C_IEN_ACK_MASK 0x40UL
702 #define _I2C_IEN_ACK_DEFAULT 0x00000000UL
703 #define I2C_IEN_ACK_DEFAULT (_I2C_IEN_ACK_DEFAULT << 6)
704 #define I2C_IEN_NACK (0x1UL << 7)
705 #define _I2C_IEN_NACK_SHIFT 7
706 #define _I2C_IEN_NACK_MASK 0x80UL
707 #define _I2C_IEN_NACK_DEFAULT 0x00000000UL
708 #define I2C_IEN_NACK_DEFAULT (_I2C_IEN_NACK_DEFAULT << 7)
709 #define I2C_IEN_MSTOP (0x1UL << 8)
710 #define _I2C_IEN_MSTOP_SHIFT 8
711 #define _I2C_IEN_MSTOP_MASK 0x100UL
712 #define _I2C_IEN_MSTOP_DEFAULT 0x00000000UL
713 #define I2C_IEN_MSTOP_DEFAULT (_I2C_IEN_MSTOP_DEFAULT << 8)
714 #define I2C_IEN_ARBLOST (0x1UL << 9)
715 #define _I2C_IEN_ARBLOST_SHIFT 9
716 #define _I2C_IEN_ARBLOST_MASK 0x200UL
717 #define _I2C_IEN_ARBLOST_DEFAULT 0x00000000UL
718 #define I2C_IEN_ARBLOST_DEFAULT (_I2C_IEN_ARBLOST_DEFAULT << 9)
719 #define I2C_IEN_BUSERR (0x1UL << 10)
720 #define _I2C_IEN_BUSERR_SHIFT 10
721 #define _I2C_IEN_BUSERR_MASK 0x400UL
722 #define _I2C_IEN_BUSERR_DEFAULT 0x00000000UL
723 #define I2C_IEN_BUSERR_DEFAULT (_I2C_IEN_BUSERR_DEFAULT << 10)
724 #define I2C_IEN_BUSHOLD (0x1UL << 11)
725 #define _I2C_IEN_BUSHOLD_SHIFT 11
726 #define _I2C_IEN_BUSHOLD_MASK 0x800UL
727 #define _I2C_IEN_BUSHOLD_DEFAULT 0x00000000UL
728 #define I2C_IEN_BUSHOLD_DEFAULT (_I2C_IEN_BUSHOLD_DEFAULT << 11)
729 #define I2C_IEN_TXOF (0x1UL << 12)
730 #define _I2C_IEN_TXOF_SHIFT 12
731 #define _I2C_IEN_TXOF_MASK 0x1000UL
732 #define _I2C_IEN_TXOF_DEFAULT 0x00000000UL
733 #define I2C_IEN_TXOF_DEFAULT (_I2C_IEN_TXOF_DEFAULT << 12)
734 #define I2C_IEN_RXUF (0x1UL << 13)
735 #define _I2C_IEN_RXUF_SHIFT 13
736 #define _I2C_IEN_RXUF_MASK 0x2000UL
737 #define _I2C_IEN_RXUF_DEFAULT 0x00000000UL
738 #define I2C_IEN_RXUF_DEFAULT (_I2C_IEN_RXUF_DEFAULT << 13)
739 #define I2C_IEN_BITO (0x1UL << 14)
740 #define _I2C_IEN_BITO_SHIFT 14
741 #define _I2C_IEN_BITO_MASK 0x4000UL
742 #define _I2C_IEN_BITO_DEFAULT 0x00000000UL
743 #define I2C_IEN_BITO_DEFAULT (_I2C_IEN_BITO_DEFAULT << 14)
744 #define I2C_IEN_CLTO (0x1UL << 15)
745 #define _I2C_IEN_CLTO_SHIFT 15
746 #define _I2C_IEN_CLTO_MASK 0x8000UL
747 #define _I2C_IEN_CLTO_DEFAULT 0x00000000UL
748 #define I2C_IEN_CLTO_DEFAULT (_I2C_IEN_CLTO_DEFAULT << 15)
749 #define I2C_IEN_SSTOP (0x1UL << 16)
750 #define _I2C_IEN_SSTOP_SHIFT 16
751 #define _I2C_IEN_SSTOP_MASK 0x10000UL
752 #define _I2C_IEN_SSTOP_DEFAULT 0x00000000UL
753 #define I2C_IEN_SSTOP_DEFAULT (_I2C_IEN_SSTOP_DEFAULT << 16)
754 #define I2C_IEN_RXFULL (0x1UL << 17)
755 #define _I2C_IEN_RXFULL_SHIFT 17
756 #define _I2C_IEN_RXFULL_MASK 0x20000UL
757 #define _I2C_IEN_RXFULL_DEFAULT 0x00000000UL
758 #define I2C_IEN_RXFULL_DEFAULT (_I2C_IEN_RXFULL_DEFAULT << 17)
759 #define I2C_IEN_CLERR (0x1UL << 18)
760 #define _I2C_IEN_CLERR_SHIFT 18
761 #define _I2C_IEN_CLERR_MASK 0x40000UL
762 #define _I2C_IEN_CLERR_DEFAULT 0x00000000UL
763 #define I2C_IEN_CLERR_DEFAULT (_I2C_IEN_CLERR_DEFAULT << 18)
765 /* Bit fields for I2C ROUTEPEN */
766 #define _I2C_ROUTEPEN_RESETVALUE 0x00000000UL
767 #define _I2C_ROUTEPEN_MASK 0x00000003UL
768 #define I2C_ROUTEPEN_SDAPEN (0x1UL << 0)
769 #define _I2C_ROUTEPEN_SDAPEN_SHIFT 0
770 #define _I2C_ROUTEPEN_SDAPEN_MASK 0x1UL
771 #define _I2C_ROUTEPEN_SDAPEN_DEFAULT 0x00000000UL
772 #define I2C_ROUTEPEN_SDAPEN_DEFAULT (_I2C_ROUTEPEN_SDAPEN_DEFAULT << 0)
773 #define I2C_ROUTEPEN_SCLPEN (0x1UL << 1)
774 #define _I2C_ROUTEPEN_SCLPEN_SHIFT 1
775 #define _I2C_ROUTEPEN_SCLPEN_MASK 0x2UL
776 #define _I2C_ROUTEPEN_SCLPEN_DEFAULT 0x00000000UL
777 #define I2C_ROUTEPEN_SCLPEN_DEFAULT (_I2C_ROUTEPEN_SCLPEN_DEFAULT << 1)
779 /* Bit fields for I2C ROUTELOC0 */
780 #define _I2C_ROUTELOC0_RESETVALUE 0x00000000UL
781 #define _I2C_ROUTELOC0_MASK 0x00001F1FUL
782 #define _I2C_ROUTELOC0_SDALOC_SHIFT 0
783 #define _I2C_ROUTELOC0_SDALOC_MASK 0x1FUL
784 #define _I2C_ROUTELOC0_SDALOC_LOC0 0x00000000UL
785 #define _I2C_ROUTELOC0_SDALOC_DEFAULT 0x00000000UL
786 #define _I2C_ROUTELOC0_SDALOC_LOC1 0x00000001UL
787 #define _I2C_ROUTELOC0_SDALOC_LOC2 0x00000002UL
788 #define _I2C_ROUTELOC0_SDALOC_LOC3 0x00000003UL
789 #define _I2C_ROUTELOC0_SDALOC_LOC4 0x00000004UL
790 #define _I2C_ROUTELOC0_SDALOC_LOC5 0x00000005UL
791 #define _I2C_ROUTELOC0_SDALOC_LOC6 0x00000006UL
792 #define _I2C_ROUTELOC0_SDALOC_LOC7 0x00000007UL
793 #define _I2C_ROUTELOC0_SDALOC_LOC8 0x00000008UL
794 #define _I2C_ROUTELOC0_SDALOC_LOC9 0x00000009UL
795 #define _I2C_ROUTELOC0_SDALOC_LOC10 0x0000000AUL
796 #define _I2C_ROUTELOC0_SDALOC_LOC11 0x0000000BUL
797 #define _I2C_ROUTELOC0_SDALOC_LOC12 0x0000000CUL
798 #define _I2C_ROUTELOC0_SDALOC_LOC13 0x0000000DUL
799 #define _I2C_ROUTELOC0_SDALOC_LOC14 0x0000000EUL
800 #define _I2C_ROUTELOC0_SDALOC_LOC15 0x0000000FUL
801 #define _I2C_ROUTELOC0_SDALOC_LOC16 0x00000010UL
802 #define _I2C_ROUTELOC0_SDALOC_LOC17 0x00000011UL
803 #define _I2C_ROUTELOC0_SDALOC_LOC18 0x00000012UL
804 #define _I2C_ROUTELOC0_SDALOC_LOC19 0x00000013UL
805 #define _I2C_ROUTELOC0_SDALOC_LOC20 0x00000014UL
806 #define _I2C_ROUTELOC0_SDALOC_LOC21 0x00000015UL
807 #define _I2C_ROUTELOC0_SDALOC_LOC22 0x00000016UL
808 #define _I2C_ROUTELOC0_SDALOC_LOC23 0x00000017UL
809 #define _I2C_ROUTELOC0_SDALOC_LOC24 0x00000018UL
810 #define _I2C_ROUTELOC0_SDALOC_LOC25 0x00000019UL
811 #define _I2C_ROUTELOC0_SDALOC_LOC26 0x0000001AUL
812 #define _I2C_ROUTELOC0_SDALOC_LOC27 0x0000001BUL
813 #define _I2C_ROUTELOC0_SDALOC_LOC28 0x0000001CUL
814 #define _I2C_ROUTELOC0_SDALOC_LOC29 0x0000001DUL
815 #define _I2C_ROUTELOC0_SDALOC_LOC30 0x0000001EUL
816 #define _I2C_ROUTELOC0_SDALOC_LOC31 0x0000001FUL
817 #define I2C_ROUTELOC0_SDALOC_LOC0 (_I2C_ROUTELOC0_SDALOC_LOC0 << 0)
818 #define I2C_ROUTELOC0_SDALOC_DEFAULT (_I2C_ROUTELOC0_SDALOC_DEFAULT << 0)
819 #define I2C_ROUTELOC0_SDALOC_LOC1 (_I2C_ROUTELOC0_SDALOC_LOC1 << 0)
820 #define I2C_ROUTELOC0_SDALOC_LOC2 (_I2C_ROUTELOC0_SDALOC_LOC2 << 0)
821 #define I2C_ROUTELOC0_SDALOC_LOC3 (_I2C_ROUTELOC0_SDALOC_LOC3 << 0)
822 #define I2C_ROUTELOC0_SDALOC_LOC4 (_I2C_ROUTELOC0_SDALOC_LOC4 << 0)
823 #define I2C_ROUTELOC0_SDALOC_LOC5 (_I2C_ROUTELOC0_SDALOC_LOC5 << 0)
824 #define I2C_ROUTELOC0_SDALOC_LOC6 (_I2C_ROUTELOC0_SDALOC_LOC6 << 0)
825 #define I2C_ROUTELOC0_SDALOC_LOC7 (_I2C_ROUTELOC0_SDALOC_LOC7 << 0)
826 #define I2C_ROUTELOC0_SDALOC_LOC8 (_I2C_ROUTELOC0_SDALOC_LOC8 << 0)
827 #define I2C_ROUTELOC0_SDALOC_LOC9 (_I2C_ROUTELOC0_SDALOC_LOC9 << 0)
828 #define I2C_ROUTELOC0_SDALOC_LOC10 (_I2C_ROUTELOC0_SDALOC_LOC10 << 0)
829 #define I2C_ROUTELOC0_SDALOC_LOC11 (_I2C_ROUTELOC0_SDALOC_LOC11 << 0)
830 #define I2C_ROUTELOC0_SDALOC_LOC12 (_I2C_ROUTELOC0_SDALOC_LOC12 << 0)
831 #define I2C_ROUTELOC0_SDALOC_LOC13 (_I2C_ROUTELOC0_SDALOC_LOC13 << 0)
832 #define I2C_ROUTELOC0_SDALOC_LOC14 (_I2C_ROUTELOC0_SDALOC_LOC14 << 0)
833 #define I2C_ROUTELOC0_SDALOC_LOC15 (_I2C_ROUTELOC0_SDALOC_LOC15 << 0)
834 #define I2C_ROUTELOC0_SDALOC_LOC16 (_I2C_ROUTELOC0_SDALOC_LOC16 << 0)
835 #define I2C_ROUTELOC0_SDALOC_LOC17 (_I2C_ROUTELOC0_SDALOC_LOC17 << 0)
836 #define I2C_ROUTELOC0_SDALOC_LOC18 (_I2C_ROUTELOC0_SDALOC_LOC18 << 0)
837 #define I2C_ROUTELOC0_SDALOC_LOC19 (_I2C_ROUTELOC0_SDALOC_LOC19 << 0)
838 #define I2C_ROUTELOC0_SDALOC_LOC20 (_I2C_ROUTELOC0_SDALOC_LOC20 << 0)
839 #define I2C_ROUTELOC0_SDALOC_LOC21 (_I2C_ROUTELOC0_SDALOC_LOC21 << 0)
840 #define I2C_ROUTELOC0_SDALOC_LOC22 (_I2C_ROUTELOC0_SDALOC_LOC22 << 0)
841 #define I2C_ROUTELOC0_SDALOC_LOC23 (_I2C_ROUTELOC0_SDALOC_LOC23 << 0)
842 #define I2C_ROUTELOC0_SDALOC_LOC24 (_I2C_ROUTELOC0_SDALOC_LOC24 << 0)
843 #define I2C_ROUTELOC0_SDALOC_LOC25 (_I2C_ROUTELOC0_SDALOC_LOC25 << 0)
844 #define I2C_ROUTELOC0_SDALOC_LOC26 (_I2C_ROUTELOC0_SDALOC_LOC26 << 0)
845 #define I2C_ROUTELOC0_SDALOC_LOC27 (_I2C_ROUTELOC0_SDALOC_LOC27 << 0)
846 #define I2C_ROUTELOC0_SDALOC_LOC28 (_I2C_ROUTELOC0_SDALOC_LOC28 << 0)
847 #define I2C_ROUTELOC0_SDALOC_LOC29 (_I2C_ROUTELOC0_SDALOC_LOC29 << 0)
848 #define I2C_ROUTELOC0_SDALOC_LOC30 (_I2C_ROUTELOC0_SDALOC_LOC30 << 0)
849 #define I2C_ROUTELOC0_SDALOC_LOC31 (_I2C_ROUTELOC0_SDALOC_LOC31 << 0)
850 #define _I2C_ROUTELOC0_SCLLOC_SHIFT 8
851 #define _I2C_ROUTELOC0_SCLLOC_MASK 0x1F00UL
852 #define _I2C_ROUTELOC0_SCLLOC_LOC0 0x00000000UL
853 #define _I2C_ROUTELOC0_SCLLOC_DEFAULT 0x00000000UL
854 #define _I2C_ROUTELOC0_SCLLOC_LOC1 0x00000001UL
855 #define _I2C_ROUTELOC0_SCLLOC_LOC2 0x00000002UL
856 #define _I2C_ROUTELOC0_SCLLOC_LOC3 0x00000003UL
857 #define _I2C_ROUTELOC0_SCLLOC_LOC4 0x00000004UL
858 #define _I2C_ROUTELOC0_SCLLOC_LOC5 0x00000005UL
859 #define _I2C_ROUTELOC0_SCLLOC_LOC6 0x00000006UL
860 #define _I2C_ROUTELOC0_SCLLOC_LOC7 0x00000007UL
861 #define _I2C_ROUTELOC0_SCLLOC_LOC8 0x00000008UL
862 #define _I2C_ROUTELOC0_SCLLOC_LOC9 0x00000009UL
863 #define _I2C_ROUTELOC0_SCLLOC_LOC10 0x0000000AUL
864 #define _I2C_ROUTELOC0_SCLLOC_LOC11 0x0000000BUL
865 #define _I2C_ROUTELOC0_SCLLOC_LOC12 0x0000000CUL
866 #define _I2C_ROUTELOC0_SCLLOC_LOC13 0x0000000DUL
867 #define _I2C_ROUTELOC0_SCLLOC_LOC14 0x0000000EUL
868 #define _I2C_ROUTELOC0_SCLLOC_LOC15 0x0000000FUL
869 #define _I2C_ROUTELOC0_SCLLOC_LOC16 0x00000010UL
870 #define _I2C_ROUTELOC0_SCLLOC_LOC17 0x00000011UL
871 #define _I2C_ROUTELOC0_SCLLOC_LOC18 0x00000012UL
872 #define _I2C_ROUTELOC0_SCLLOC_LOC19 0x00000013UL
873 #define _I2C_ROUTELOC0_SCLLOC_LOC20 0x00000014UL
874 #define _I2C_ROUTELOC0_SCLLOC_LOC21 0x00000015UL
875 #define _I2C_ROUTELOC0_SCLLOC_LOC22 0x00000016UL
876 #define _I2C_ROUTELOC0_SCLLOC_LOC23 0x00000017UL
877 #define _I2C_ROUTELOC0_SCLLOC_LOC24 0x00000018UL
878 #define _I2C_ROUTELOC0_SCLLOC_LOC25 0x00000019UL
879 #define _I2C_ROUTELOC0_SCLLOC_LOC26 0x0000001AUL
880 #define _I2C_ROUTELOC0_SCLLOC_LOC27 0x0000001BUL
881 #define _I2C_ROUTELOC0_SCLLOC_LOC28 0x0000001CUL
882 #define _I2C_ROUTELOC0_SCLLOC_LOC29 0x0000001DUL
883 #define _I2C_ROUTELOC0_SCLLOC_LOC30 0x0000001EUL
884 #define _I2C_ROUTELOC0_SCLLOC_LOC31 0x0000001FUL
885 #define I2C_ROUTELOC0_SCLLOC_LOC0 (_I2C_ROUTELOC0_SCLLOC_LOC0 << 8)
886 #define I2C_ROUTELOC0_SCLLOC_DEFAULT (_I2C_ROUTELOC0_SCLLOC_DEFAULT << 8)
887 #define I2C_ROUTELOC0_SCLLOC_LOC1 (_I2C_ROUTELOC0_SCLLOC_LOC1 << 8)
888 #define I2C_ROUTELOC0_SCLLOC_LOC2 (_I2C_ROUTELOC0_SCLLOC_LOC2 << 8)
889 #define I2C_ROUTELOC0_SCLLOC_LOC3 (_I2C_ROUTELOC0_SCLLOC_LOC3 << 8)
890 #define I2C_ROUTELOC0_SCLLOC_LOC4 (_I2C_ROUTELOC0_SCLLOC_LOC4 << 8)
891 #define I2C_ROUTELOC0_SCLLOC_LOC5 (_I2C_ROUTELOC0_SCLLOC_LOC5 << 8)
892 #define I2C_ROUTELOC0_SCLLOC_LOC6 (_I2C_ROUTELOC0_SCLLOC_LOC6 << 8)
893 #define I2C_ROUTELOC0_SCLLOC_LOC7 (_I2C_ROUTELOC0_SCLLOC_LOC7 << 8)
894 #define I2C_ROUTELOC0_SCLLOC_LOC8 (_I2C_ROUTELOC0_SCLLOC_LOC8 << 8)
895 #define I2C_ROUTELOC0_SCLLOC_LOC9 (_I2C_ROUTELOC0_SCLLOC_LOC9 << 8)
896 #define I2C_ROUTELOC0_SCLLOC_LOC10 (_I2C_ROUTELOC0_SCLLOC_LOC10 << 8)
897 #define I2C_ROUTELOC0_SCLLOC_LOC11 (_I2C_ROUTELOC0_SCLLOC_LOC11 << 8)
898 #define I2C_ROUTELOC0_SCLLOC_LOC12 (_I2C_ROUTELOC0_SCLLOC_LOC12 << 8)
899 #define I2C_ROUTELOC0_SCLLOC_LOC13 (_I2C_ROUTELOC0_SCLLOC_LOC13 << 8)
900 #define I2C_ROUTELOC0_SCLLOC_LOC14 (_I2C_ROUTELOC0_SCLLOC_LOC14 << 8)
901 #define I2C_ROUTELOC0_SCLLOC_LOC15 (_I2C_ROUTELOC0_SCLLOC_LOC15 << 8)
902 #define I2C_ROUTELOC0_SCLLOC_LOC16 (_I2C_ROUTELOC0_SCLLOC_LOC16 << 8)
903 #define I2C_ROUTELOC0_SCLLOC_LOC17 (_I2C_ROUTELOC0_SCLLOC_LOC17 << 8)
904 #define I2C_ROUTELOC0_SCLLOC_LOC18 (_I2C_ROUTELOC0_SCLLOC_LOC18 << 8)
905 #define I2C_ROUTELOC0_SCLLOC_LOC19 (_I2C_ROUTELOC0_SCLLOC_LOC19 << 8)
906 #define I2C_ROUTELOC0_SCLLOC_LOC20 (_I2C_ROUTELOC0_SCLLOC_LOC20 << 8)
907 #define I2C_ROUTELOC0_SCLLOC_LOC21 (_I2C_ROUTELOC0_SCLLOC_LOC21 << 8)
908 #define I2C_ROUTELOC0_SCLLOC_LOC22 (_I2C_ROUTELOC0_SCLLOC_LOC22 << 8)
909 #define I2C_ROUTELOC0_SCLLOC_LOC23 (_I2C_ROUTELOC0_SCLLOC_LOC23 << 8)
910 #define I2C_ROUTELOC0_SCLLOC_LOC24 (_I2C_ROUTELOC0_SCLLOC_LOC24 << 8)
911 #define I2C_ROUTELOC0_SCLLOC_LOC25 (_I2C_ROUTELOC0_SCLLOC_LOC25 << 8)
912 #define I2C_ROUTELOC0_SCLLOC_LOC26 (_I2C_ROUTELOC0_SCLLOC_LOC26 << 8)
913 #define I2C_ROUTELOC0_SCLLOC_LOC27 (_I2C_ROUTELOC0_SCLLOC_LOC27 << 8)
914 #define I2C_ROUTELOC0_SCLLOC_LOC28 (_I2C_ROUTELOC0_SCLLOC_LOC28 << 8)
915 #define I2C_ROUTELOC0_SCLLOC_LOC29 (_I2C_ROUTELOC0_SCLLOC_LOC29 << 8)
916 #define I2C_ROUTELOC0_SCLLOC_LOC30 (_I2C_ROUTELOC0_SCLLOC_LOC30 << 8)
917 #define I2C_ROUTELOC0_SCLLOC_LOC31 (_I2C_ROUTELOC0_SCLLOC_LOC31 << 8)
__IOM uint32_t SADDR
Definition: efr32mg1p_i2c.h:48
__IOM uint32_t CMD
Definition: efr32mg1p_i2c.h:44
__IM uint32_t RXDATAP
Definition: efr32mg1p_i2c.h:52
__IM uint32_t STATUS
Definition: efr32mg1p_i2c.h:46
__IM uint32_t IF
Definition: efr32mg1p_i2c.h:56
__IM uint32_t RXDATA
Definition: efr32mg1p_i2c.h:50
__IM uint32_t RXDOUBLEP
Definition: efr32mg1p_i2c.h:53
__IM uint32_t STATE
Definition: efr32mg1p_i2c.h:45
__IOM uint32_t CTRL
Definition: efr32mg1p_i2c.h:43
__IOM uint32_t TXDATA
Definition: efr32mg1p_i2c.h:54
__IOM uint32_t IFS
Definition: efr32mg1p_i2c.h:57
__IOM uint32_t SADDRMASK
Definition: efr32mg1p_i2c.h:49
__IM uint32_t RXDOUBLE
Definition: efr32mg1p_i2c.h:51
__IOM uint32_t TXDOUBLE
Definition: efr32mg1p_i2c.h:55
__IOM uint32_t CLKDIV
Definition: efr32mg1p_i2c.h:47
__IOM uint32_t IFC
Definition: efr32mg1p_i2c.h:58
__IOM uint32_t ROUTELOC0
Definition: efr32mg1p_i2c.h:61
__IOM uint32_t IEN
Definition: efr32mg1p_i2c.h:59
__IOM uint32_t ROUTEPEN
Definition: efr32mg1p_i2c.h:60