EFR32 Mighty Gecko 1 Software Documentation  efr32mg1-doc-5.1.2
Macros
efr32mg1p_dmareq.h File Reference

Detailed Description

EFR32MG1P_DMAREQ register and bit field definitions.

Version
5.1.2

License

Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

  1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software.
  2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
  3. This notice may not be removed or altered from any source distribution.

DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. has no obligation to support this Software. Silicon Laboratories, Inc. is providing the Software "AS IS", with no express or implied warranties of any kind, including, but not limited to, any implied warranties of merchantability or fitness for any particular purpose or warranties against infringement of any proprietary rights of a third party.

Silicon Laboratories, Inc. will not be liable for any consequential, incidental, or special damages, or any other relief, or for any claim by any third party, arising from your use of this Software.

Definition in file efr32mg1p_dmareq.h.

Go to the source code of this file.

Macros

#define DMAREQ_ADC0_SCAN   ((8 << 16) + 1)
 
#define DMAREQ_ADC0_SINGLE   ((8 << 16) + 0)
 
#define DMAREQ_CRYPTO_DATA0RD   ((49 << 16) + 2)
 
#define DMAREQ_CRYPTO_DATA0WR   ((49 << 16) + 0)
 
#define DMAREQ_CRYPTO_DATA0XWR   ((49 << 16) + 1)
 
#define DMAREQ_CRYPTO_DATA1RD   ((49 << 16) + 4)
 
#define DMAREQ_CRYPTO_DATA1WR   ((49 << 16) + 3)
 
#define DMAREQ_I2C0_RXDATAV   ((20 << 16) + 0)
 
#define DMAREQ_I2C0_TXBL   ((20 << 16) + 1)
 
#define DMAREQ_LEUART0_RXDATAV   ((16 << 16) + 0)
 
#define DMAREQ_LEUART0_TXBL   ((16 << 16) + 1)
 
#define DMAREQ_LEUART0_TXEMPTY   ((16 << 16) + 2)
 
#define DMAREQ_MSC_WDATA   ((48 << 16) + 0)
 
#define DMAREQ_PRS_REQ0   ((1 << 16) + 0)
 
#define DMAREQ_PRS_REQ1   ((1 << 16) + 1)
 
#define DMAREQ_TIMER0_CC0   ((24 << 16) + 1)
 
#define DMAREQ_TIMER0_CC1   ((24 << 16) + 2)
 
#define DMAREQ_TIMER0_CC2   ((24 << 16) + 3)
 
#define DMAREQ_TIMER0_UFOF   ((24 << 16) + 0)
 
#define DMAREQ_TIMER1_CC0   ((25 << 16) + 1)
 
#define DMAREQ_TIMER1_CC1   ((25 << 16) + 2)
 
#define DMAREQ_TIMER1_CC2   ((25 << 16) + 3)
 
#define DMAREQ_TIMER1_CC3   ((25 << 16) + 4)
 
#define DMAREQ_TIMER1_UFOF   ((25 << 16) + 0)
 
#define DMAREQ_USART0_RXDATAV   ((12 << 16) + 0)
 
#define DMAREQ_USART0_TXBL   ((12 << 16) + 1)
 
#define DMAREQ_USART0_TXEMPTY   ((12 << 16) + 2)
 
#define DMAREQ_USART1_RXDATAV   ((13 << 16) + 0)
 
#define DMAREQ_USART1_RXDATAVRIGHT   ((13 << 16) + 3)
 
#define DMAREQ_USART1_TXBL   ((13 << 16) + 1)
 
#define DMAREQ_USART1_TXBLRIGHT   ((13 << 16) + 4)
 
#define DMAREQ_USART1_TXEMPTY   ((13 << 16) + 2)