EFR32 Blue Gecko 13 Software Documentation  efr32bg13-doc-5.1.2
efr32bg13p_idac.h
Go to the documentation of this file.
1 /**************************************************************************/
32 /**************************************************************************/
36 /**************************************************************************/
41 typedef struct
42 {
43  __IOM uint32_t CTRL;
44  __IOM uint32_t CURPROG;
45  uint32_t RESERVED0[1];
46  __IOM uint32_t DUTYCONFIG;
48  uint32_t RESERVED1[2];
49  __IM uint32_t STATUS;
50  uint32_t RESERVED2[1];
51  __IM uint32_t IF;
52  __IOM uint32_t IFS;
53  __IOM uint32_t IFC;
54  __IOM uint32_t IEN;
55  uint32_t RESERVED3[1];
56  __IM uint32_t APORTREQ;
57  __IM uint32_t APORTCONFLICT;
58 } IDAC_TypeDef;
60 /**************************************************************************/
65 /* Bit fields for IDAC CTRL */
66 #define _IDAC_CTRL_RESETVALUE 0x00000000UL
67 #define _IDAC_CTRL_MASK 0x00FD7FFFUL
68 #define IDAC_CTRL_EN (0x1UL << 0)
69 #define _IDAC_CTRL_EN_SHIFT 0
70 #define _IDAC_CTRL_EN_MASK 0x1UL
71 #define _IDAC_CTRL_EN_DEFAULT 0x00000000UL
72 #define IDAC_CTRL_EN_DEFAULT (_IDAC_CTRL_EN_DEFAULT << 0)
73 #define IDAC_CTRL_CURSINK (0x1UL << 1)
74 #define _IDAC_CTRL_CURSINK_SHIFT 1
75 #define _IDAC_CTRL_CURSINK_MASK 0x2UL
76 #define _IDAC_CTRL_CURSINK_DEFAULT 0x00000000UL
77 #define IDAC_CTRL_CURSINK_DEFAULT (_IDAC_CTRL_CURSINK_DEFAULT << 1)
78 #define IDAC_CTRL_MINOUTTRANS (0x1UL << 2)
79 #define _IDAC_CTRL_MINOUTTRANS_SHIFT 2
80 #define _IDAC_CTRL_MINOUTTRANS_MASK 0x4UL
81 #define _IDAC_CTRL_MINOUTTRANS_DEFAULT 0x00000000UL
82 #define IDAC_CTRL_MINOUTTRANS_DEFAULT (_IDAC_CTRL_MINOUTTRANS_DEFAULT << 2)
83 #define IDAC_CTRL_APORTOUTEN (0x1UL << 3)
84 #define _IDAC_CTRL_APORTOUTEN_SHIFT 3
85 #define _IDAC_CTRL_APORTOUTEN_MASK 0x8UL
86 #define _IDAC_CTRL_APORTOUTEN_DEFAULT 0x00000000UL
87 #define IDAC_CTRL_APORTOUTEN_DEFAULT (_IDAC_CTRL_APORTOUTEN_DEFAULT << 3)
88 #define _IDAC_CTRL_APORTOUTSEL_SHIFT 4
89 #define _IDAC_CTRL_APORTOUTSEL_MASK 0xFF0UL
90 #define _IDAC_CTRL_APORTOUTSEL_DEFAULT 0x00000000UL
91 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH0 0x00000020UL
92 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH1 0x00000021UL
93 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH2 0x00000022UL
94 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH3 0x00000023UL
95 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH4 0x00000024UL
96 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH5 0x00000025UL
97 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH6 0x00000026UL
98 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH7 0x00000027UL
99 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH8 0x00000028UL
100 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH9 0x00000029UL
101 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH10 0x0000002AUL
102 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH11 0x0000002BUL
103 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH12 0x0000002CUL
104 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH13 0x0000002DUL
105 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH14 0x0000002EUL
106 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH15 0x0000002FUL
107 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH16 0x00000030UL
108 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH17 0x00000031UL
109 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH18 0x00000032UL
110 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH19 0x00000033UL
111 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH20 0x00000034UL
112 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH21 0x00000035UL
113 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH22 0x00000036UL
114 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH23 0x00000037UL
115 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH24 0x00000038UL
116 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH25 0x00000039UL
117 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH26 0x0000003AUL
118 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH27 0x0000003BUL
119 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH28 0x0000003CUL
120 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH29 0x0000003DUL
121 #define _IDAC_CTRL_APORTOUTSEL_APORT1XCH30 0x0000003EUL
122 #define _IDAC_CTRL_APORTOUTSEL_APORT1YCH31 0x0000003FUL
123 #define IDAC_CTRL_APORTOUTSEL_DEFAULT (_IDAC_CTRL_APORTOUTSEL_DEFAULT << 4)
124 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH0 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH0 << 4)
125 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH1 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH1 << 4)
126 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH2 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH2 << 4)
127 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH3 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH3 << 4)
128 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH4 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH4 << 4)
129 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH5 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH5 << 4)
130 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH6 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH6 << 4)
131 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH7 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH7 << 4)
132 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH8 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH8 << 4)
133 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH9 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH9 << 4)
134 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH10 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH10 << 4)
135 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH11 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH11 << 4)
136 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH12 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH12 << 4)
137 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH13 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH13 << 4)
138 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH14 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH14 << 4)
139 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH15 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH15 << 4)
140 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH16 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH16 << 4)
141 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH17 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH17 << 4)
142 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH18 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH18 << 4)
143 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH19 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH19 << 4)
144 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH20 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH20 << 4)
145 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH21 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH21 << 4)
146 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH22 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH22 << 4)
147 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH23 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH23 << 4)
148 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH24 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH24 << 4)
149 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH25 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH25 << 4)
150 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH26 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH26 << 4)
151 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH27 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH27 << 4)
152 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH28 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH28 << 4)
153 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH29 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH29 << 4)
154 #define IDAC_CTRL_APORTOUTSEL_APORT1XCH30 (_IDAC_CTRL_APORTOUTSEL_APORT1XCH30 << 4)
155 #define IDAC_CTRL_APORTOUTSEL_APORT1YCH31 (_IDAC_CTRL_APORTOUTSEL_APORT1YCH31 << 4)
156 #define IDAC_CTRL_PWRSEL (0x1UL << 12)
157 #define _IDAC_CTRL_PWRSEL_SHIFT 12
158 #define _IDAC_CTRL_PWRSEL_MASK 0x1000UL
159 #define _IDAC_CTRL_PWRSEL_DEFAULT 0x00000000UL
160 #define _IDAC_CTRL_PWRSEL_ANA 0x00000000UL
161 #define _IDAC_CTRL_PWRSEL_IO 0x00000001UL
162 #define IDAC_CTRL_PWRSEL_DEFAULT (_IDAC_CTRL_PWRSEL_DEFAULT << 12)
163 #define IDAC_CTRL_PWRSEL_ANA (_IDAC_CTRL_PWRSEL_ANA << 12)
164 #define IDAC_CTRL_PWRSEL_IO (_IDAC_CTRL_PWRSEL_IO << 12)
165 #define IDAC_CTRL_EM2DELAY (0x1UL << 13)
166 #define _IDAC_CTRL_EM2DELAY_SHIFT 13
167 #define _IDAC_CTRL_EM2DELAY_MASK 0x2000UL
168 #define _IDAC_CTRL_EM2DELAY_DEFAULT 0x00000000UL
169 #define IDAC_CTRL_EM2DELAY_DEFAULT (_IDAC_CTRL_EM2DELAY_DEFAULT << 13)
170 #define IDAC_CTRL_APORTMASTERDIS (0x1UL << 14)
171 #define _IDAC_CTRL_APORTMASTERDIS_SHIFT 14
172 #define _IDAC_CTRL_APORTMASTERDIS_MASK 0x4000UL
173 #define _IDAC_CTRL_APORTMASTERDIS_DEFAULT 0x00000000UL
174 #define IDAC_CTRL_APORTMASTERDIS_DEFAULT (_IDAC_CTRL_APORTMASTERDIS_DEFAULT << 14)
175 #define IDAC_CTRL_APORTOUTENPRS (0x1UL << 16)
176 #define _IDAC_CTRL_APORTOUTENPRS_SHIFT 16
177 #define _IDAC_CTRL_APORTOUTENPRS_MASK 0x10000UL
178 #define _IDAC_CTRL_APORTOUTENPRS_DEFAULT 0x00000000UL
179 #define IDAC_CTRL_APORTOUTENPRS_DEFAULT (_IDAC_CTRL_APORTOUTENPRS_DEFAULT << 16)
180 #define IDAC_CTRL_MAINOUTEN (0x1UL << 18)
181 #define _IDAC_CTRL_MAINOUTEN_SHIFT 18
182 #define _IDAC_CTRL_MAINOUTEN_MASK 0x40000UL
183 #define _IDAC_CTRL_MAINOUTEN_DEFAULT 0x00000000UL
184 #define IDAC_CTRL_MAINOUTEN_DEFAULT (_IDAC_CTRL_MAINOUTEN_DEFAULT << 18)
185 #define IDAC_CTRL_MAINOUTENPRS (0x1UL << 19)
186 #define _IDAC_CTRL_MAINOUTENPRS_SHIFT 19
187 #define _IDAC_CTRL_MAINOUTENPRS_MASK 0x80000UL
188 #define _IDAC_CTRL_MAINOUTENPRS_DEFAULT 0x00000000UL
189 #define IDAC_CTRL_MAINOUTENPRS_DEFAULT (_IDAC_CTRL_MAINOUTENPRS_DEFAULT << 19)
190 #define _IDAC_CTRL_PRSSEL_SHIFT 20
191 #define _IDAC_CTRL_PRSSEL_MASK 0xF00000UL
192 #define _IDAC_CTRL_PRSSEL_DEFAULT 0x00000000UL
193 #define _IDAC_CTRL_PRSSEL_PRSCH0 0x00000000UL
194 #define _IDAC_CTRL_PRSSEL_PRSCH1 0x00000001UL
195 #define _IDAC_CTRL_PRSSEL_PRSCH2 0x00000002UL
196 #define _IDAC_CTRL_PRSSEL_PRSCH3 0x00000003UL
197 #define _IDAC_CTRL_PRSSEL_PRSCH4 0x00000004UL
198 #define _IDAC_CTRL_PRSSEL_PRSCH5 0x00000005UL
199 #define _IDAC_CTRL_PRSSEL_PRSCH6 0x00000006UL
200 #define _IDAC_CTRL_PRSSEL_PRSCH7 0x00000007UL
201 #define _IDAC_CTRL_PRSSEL_PRSCH8 0x00000008UL
202 #define _IDAC_CTRL_PRSSEL_PRSCH9 0x00000009UL
203 #define _IDAC_CTRL_PRSSEL_PRSCH10 0x0000000AUL
204 #define _IDAC_CTRL_PRSSEL_PRSCH11 0x0000000BUL
205 #define IDAC_CTRL_PRSSEL_DEFAULT (_IDAC_CTRL_PRSSEL_DEFAULT << 20)
206 #define IDAC_CTRL_PRSSEL_PRSCH0 (_IDAC_CTRL_PRSSEL_PRSCH0 << 20)
207 #define IDAC_CTRL_PRSSEL_PRSCH1 (_IDAC_CTRL_PRSSEL_PRSCH1 << 20)
208 #define IDAC_CTRL_PRSSEL_PRSCH2 (_IDAC_CTRL_PRSSEL_PRSCH2 << 20)
209 #define IDAC_CTRL_PRSSEL_PRSCH3 (_IDAC_CTRL_PRSSEL_PRSCH3 << 20)
210 #define IDAC_CTRL_PRSSEL_PRSCH4 (_IDAC_CTRL_PRSSEL_PRSCH4 << 20)
211 #define IDAC_CTRL_PRSSEL_PRSCH5 (_IDAC_CTRL_PRSSEL_PRSCH5 << 20)
212 #define IDAC_CTRL_PRSSEL_PRSCH6 (_IDAC_CTRL_PRSSEL_PRSCH6 << 20)
213 #define IDAC_CTRL_PRSSEL_PRSCH7 (_IDAC_CTRL_PRSSEL_PRSCH7 << 20)
214 #define IDAC_CTRL_PRSSEL_PRSCH8 (_IDAC_CTRL_PRSSEL_PRSCH8 << 20)
215 #define IDAC_CTRL_PRSSEL_PRSCH9 (_IDAC_CTRL_PRSSEL_PRSCH9 << 20)
216 #define IDAC_CTRL_PRSSEL_PRSCH10 (_IDAC_CTRL_PRSSEL_PRSCH10 << 20)
217 #define IDAC_CTRL_PRSSEL_PRSCH11 (_IDAC_CTRL_PRSSEL_PRSCH11 << 20)
219 /* Bit fields for IDAC CURPROG */
220 #define _IDAC_CURPROG_RESETVALUE 0x009B0000UL
221 #define _IDAC_CURPROG_MASK 0x00FF1F03UL
222 #define _IDAC_CURPROG_RANGESEL_SHIFT 0
223 #define _IDAC_CURPROG_RANGESEL_MASK 0x3UL
224 #define _IDAC_CURPROG_RANGESEL_DEFAULT 0x00000000UL
225 #define _IDAC_CURPROG_RANGESEL_RANGE0 0x00000000UL
226 #define _IDAC_CURPROG_RANGESEL_RANGE1 0x00000001UL
227 #define _IDAC_CURPROG_RANGESEL_RANGE2 0x00000002UL
228 #define _IDAC_CURPROG_RANGESEL_RANGE3 0x00000003UL
229 #define IDAC_CURPROG_RANGESEL_DEFAULT (_IDAC_CURPROG_RANGESEL_DEFAULT << 0)
230 #define IDAC_CURPROG_RANGESEL_RANGE0 (_IDAC_CURPROG_RANGESEL_RANGE0 << 0)
231 #define IDAC_CURPROG_RANGESEL_RANGE1 (_IDAC_CURPROG_RANGESEL_RANGE1 << 0)
232 #define IDAC_CURPROG_RANGESEL_RANGE2 (_IDAC_CURPROG_RANGESEL_RANGE2 << 0)
233 #define IDAC_CURPROG_RANGESEL_RANGE3 (_IDAC_CURPROG_RANGESEL_RANGE3 << 0)
234 #define _IDAC_CURPROG_STEPSEL_SHIFT 8
235 #define _IDAC_CURPROG_STEPSEL_MASK 0x1F00UL
236 #define _IDAC_CURPROG_STEPSEL_DEFAULT 0x00000000UL
237 #define IDAC_CURPROG_STEPSEL_DEFAULT (_IDAC_CURPROG_STEPSEL_DEFAULT << 8)
238 #define _IDAC_CURPROG_TUNING_SHIFT 16
239 #define _IDAC_CURPROG_TUNING_MASK 0xFF0000UL
240 #define _IDAC_CURPROG_TUNING_DEFAULT 0x0000009BUL
241 #define IDAC_CURPROG_TUNING_DEFAULT (_IDAC_CURPROG_TUNING_DEFAULT << 16)
243 /* Bit fields for IDAC DUTYCONFIG */
244 #define _IDAC_DUTYCONFIG_RESETVALUE 0x00000000UL
245 #define _IDAC_DUTYCONFIG_MASK 0x00000002UL
246 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS (0x1UL << 1)
247 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_SHIFT 1
248 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_MASK 0x2UL
249 #define _IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT 0x00000000UL
250 #define IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT (_IDAC_DUTYCONFIG_EM2DUTYCYCLEDIS_DEFAULT << 1)
252 /* Bit fields for IDAC STATUS */
253 #define _IDAC_STATUS_RESETVALUE 0x00000000UL
254 #define _IDAC_STATUS_MASK 0x00000002UL
255 #define IDAC_STATUS_APORTCONFLICT (0x1UL << 1)
256 #define _IDAC_STATUS_APORTCONFLICT_SHIFT 1
257 #define _IDAC_STATUS_APORTCONFLICT_MASK 0x2UL
258 #define _IDAC_STATUS_APORTCONFLICT_DEFAULT 0x00000000UL
259 #define IDAC_STATUS_APORTCONFLICT_DEFAULT (_IDAC_STATUS_APORTCONFLICT_DEFAULT << 1)
261 /* Bit fields for IDAC IF */
262 #define _IDAC_IF_RESETVALUE 0x00000000UL
263 #define _IDAC_IF_MASK 0x00000002UL
264 #define IDAC_IF_APORTCONFLICT (0x1UL << 1)
265 #define _IDAC_IF_APORTCONFLICT_SHIFT 1
266 #define _IDAC_IF_APORTCONFLICT_MASK 0x2UL
267 #define _IDAC_IF_APORTCONFLICT_DEFAULT 0x00000000UL
268 #define IDAC_IF_APORTCONFLICT_DEFAULT (_IDAC_IF_APORTCONFLICT_DEFAULT << 1)
270 /* Bit fields for IDAC IFS */
271 #define _IDAC_IFS_RESETVALUE 0x00000000UL
272 #define _IDAC_IFS_MASK 0x00000002UL
273 #define IDAC_IFS_APORTCONFLICT (0x1UL << 1)
274 #define _IDAC_IFS_APORTCONFLICT_SHIFT 1
275 #define _IDAC_IFS_APORTCONFLICT_MASK 0x2UL
276 #define _IDAC_IFS_APORTCONFLICT_DEFAULT 0x00000000UL
277 #define IDAC_IFS_APORTCONFLICT_DEFAULT (_IDAC_IFS_APORTCONFLICT_DEFAULT << 1)
279 /* Bit fields for IDAC IFC */
280 #define _IDAC_IFC_RESETVALUE 0x00000000UL
281 #define _IDAC_IFC_MASK 0x00000002UL
282 #define IDAC_IFC_APORTCONFLICT (0x1UL << 1)
283 #define _IDAC_IFC_APORTCONFLICT_SHIFT 1
284 #define _IDAC_IFC_APORTCONFLICT_MASK 0x2UL
285 #define _IDAC_IFC_APORTCONFLICT_DEFAULT 0x00000000UL
286 #define IDAC_IFC_APORTCONFLICT_DEFAULT (_IDAC_IFC_APORTCONFLICT_DEFAULT << 1)
288 /* Bit fields for IDAC IEN */
289 #define _IDAC_IEN_RESETVALUE 0x00000000UL
290 #define _IDAC_IEN_MASK 0x00000002UL
291 #define IDAC_IEN_APORTCONFLICT (0x1UL << 1)
292 #define _IDAC_IEN_APORTCONFLICT_SHIFT 1
293 #define _IDAC_IEN_APORTCONFLICT_MASK 0x2UL
294 #define _IDAC_IEN_APORTCONFLICT_DEFAULT 0x00000000UL
295 #define IDAC_IEN_APORTCONFLICT_DEFAULT (_IDAC_IEN_APORTCONFLICT_DEFAULT << 1)
297 /* Bit fields for IDAC APORTREQ */
298 #define _IDAC_APORTREQ_RESETVALUE 0x00000000UL
299 #define _IDAC_APORTREQ_MASK 0x0000000CUL
300 #define IDAC_APORTREQ_APORT1XREQ (0x1UL << 2)
301 #define _IDAC_APORTREQ_APORT1XREQ_SHIFT 2
302 #define _IDAC_APORTREQ_APORT1XREQ_MASK 0x4UL
303 #define _IDAC_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL
304 #define IDAC_APORTREQ_APORT1XREQ_DEFAULT (_IDAC_APORTREQ_APORT1XREQ_DEFAULT << 2)
305 #define IDAC_APORTREQ_APORT1YREQ (0x1UL << 3)
306 #define _IDAC_APORTREQ_APORT1YREQ_SHIFT 3
307 #define _IDAC_APORTREQ_APORT1YREQ_MASK 0x8UL
308 #define _IDAC_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL
309 #define IDAC_APORTREQ_APORT1YREQ_DEFAULT (_IDAC_APORTREQ_APORT1YREQ_DEFAULT << 3)
311 /* Bit fields for IDAC APORTCONFLICT */
312 #define _IDAC_APORTCONFLICT_RESETVALUE 0x00000000UL
313 #define _IDAC_APORTCONFLICT_MASK 0x0000000CUL
314 #define IDAC_APORTCONFLICT_APORT1XCONFLICT (0x1UL << 2)
315 #define _IDAC_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2
316 #define _IDAC_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL
317 #define _IDAC_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL
318 #define IDAC_APORTCONFLICT_APORT1XCONFLICT_DEFAULT (_IDAC_APORTCONFLICT_APORT1XCONFLICT_DEFAULT << 2)
319 #define IDAC_APORTCONFLICT_APORT1YCONFLICT (0x1UL << 3)
320 #define _IDAC_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3
321 #define _IDAC_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL
322 #define _IDAC_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL
323 #define IDAC_APORTCONFLICT_APORT1YCONFLICT_DEFAULT (_IDAC_APORTCONFLICT_APORT1YCONFLICT_DEFAULT << 3)
__IOM uint32_t IFC
__IOM uint32_t CTRL
__IOM uint32_t CURPROG
__IM uint32_t APORTCONFLICT
__IOM uint32_t DUTYCONFIG
__IOM uint32_t IFS
__IM uint32_t STATUS
__IM uint32_t APORTREQ
__IM uint32_t IF
__IOM uint32_t IEN