efr32bg13/html/efr32bg13p__cmu_8h_source.html

 /**************************************************************************/

 /**************************************************************************/

 /**************************************************************************/

 typedef struct

 {

   __IOM uint32_t CTRL;

   uint32_t       RESERVED0[3];

   __IOM uint32_t HFRCOCTRL;

   uint32_t       RESERVED1[1];

   __IOM uint32_t AUXHFRCOCTRL;

   uint32_t       RESERVED2[1];

   __IOM uint32_t LFRCOCTRL;

   __IOM uint32_t HFXOCTRL;

   uint32_t       RESERVED3[1];

   __IOM uint32_t HFXOSTARTUPCTRL;

   __IOM uint32_t HFXOSTEADYSTATECTRL;

   __IOM uint32_t HFXOTIMEOUTCTRL;

   __IOM uint32_t LFXOCTRL;

   uint32_t       RESERVED4[1];

   __IOM uint32_t DPLLCTRL;

   __IOM uint32_t DPLLCTRL1;

   uint32_t       RESERVED5[2];

   __IOM uint32_t CALCTRL;

   __IOM uint32_t CALCNT;

   uint32_t       RESERVED6[2];

   __IOM uint32_t OSCENCMD;

   __IOM uint32_t CMD;

   uint32_t       RESERVED7[2];

   __IOM uint32_t DBGCLKSEL;

   __IOM uint32_t HFCLKSEL;

   uint32_t       RESERVED8[2];

   __IOM uint32_t LFACLKSEL;

   __IOM uint32_t LFBCLKSEL;

   __IOM uint32_t LFECLKSEL;

   uint32_t       RESERVED9[1];

   __IM uint32_t  STATUS;

   __IM uint32_t  HFCLKSTATUS;

   uint32_t       RESERVED10[1];

   __IM uint32_t  HFXOTRIMSTATUS;

   __IM uint32_t  IF;

   __IOM uint32_t IFS;

   __IOM uint32_t IFC;

   __IOM uint32_t IEN;

   __IOM uint32_t HFBUSCLKEN0;

   uint32_t       RESERVED11[3];

   __IOM uint32_t HFPERCLKEN0;

   uint32_t       RESERVED12[7];

   __IOM uint32_t LFACLKEN0;

   uint32_t       RESERVED13[1];

   __IOM uint32_t LFBCLKEN0;

   uint32_t       RESERVED14[1];

   __IOM uint32_t LFECLKEN0;

   uint32_t       RESERVED15[3];

   __IOM uint32_t HFPRESC;

   uint32_t       RESERVED16[1];

   __IOM uint32_t HFCOREPRESC;

   __IOM uint32_t HFPERPRESC;

   uint32_t       RESERVED17[1];

   __IOM uint32_t HFEXPPRESC;

   uint32_t       RESERVED18[2];

   __IOM uint32_t LFAPRESC0;

   uint32_t       RESERVED19[1];

   __IOM uint32_t LFBPRESC0;

   uint32_t       RESERVED20[1];

   __IOM uint32_t LFEPRESC0;

   uint32_t       RESERVED21[3];

   __IM uint32_t  SYNCBUSY;

   __IOM uint32_t FREEZE;

   uint32_t       RESERVED22[2];

   __IOM uint32_t PCNTCTRL;

   uint32_t       RESERVED23[2];

   __IOM uint32_t ADCCTRL;

   uint32_t       RESERVED24[4];

   __IOM uint32_t ROUTEPEN;

   __IOM uint32_t ROUTELOC0;

   __IOM uint32_t ROUTELOC1;

   uint32_t       RESERVED25[1];

   __IOM uint32_t LOCK;

   __IOM uint32_t HFRCOSS;

 } CMU_TypeDef;

 /**************************************************************************/

 /* Bit fields for CMU CTRL */

 #define _CMU_CTRL_RESETVALUE                              0x00300000UL

 #define _CMU_CTRL_MASK                                    0x001103FFUL

 #define _CMU_CTRL_CLKOUTSEL0_SHIFT                        0

 #define _CMU_CTRL_CLKOUTSEL0_MASK                         0x1FUL

 #define _CMU_CTRL_CLKOUTSEL0_DEFAULT                      0x00000000UL

 #define _CMU_CTRL_CLKOUTSEL0_DISABLED                     0x00000000UL

 #define _CMU_CTRL_CLKOUTSEL0_ULFRCO                       0x00000001UL

 #define _CMU_CTRL_CLKOUTSEL0_LFRCO                        0x00000002UL

 #define _CMU_CTRL_CLKOUTSEL0_LFXO                         0x00000003UL

 #define _CMU_CTRL_CLKOUTSEL0_HFXO                         0x00000006UL

 #define _CMU_CTRL_CLKOUTSEL0_HFEXPCLK                     0x00000007UL

 #define _CMU_CTRL_CLKOUTSEL0_ULFRCOQ                      0x00000009UL

 #define _CMU_CTRL_CLKOUTSEL0_LFRCOQ                       0x0000000AUL

 #define _CMU_CTRL_CLKOUTSEL0_LFXOQ                        0x0000000BUL

 #define _CMU_CTRL_CLKOUTSEL0_HFRCOQ                       0x0000000CUL

 #define _CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ                    0x0000000DUL

 #define _CMU_CTRL_CLKOUTSEL0_HFXOQ                        0x0000000EUL

 #define _CMU_CTRL_CLKOUTSEL0_HFSRCCLK                     0x0000000FUL

 #define CMU_CTRL_CLKOUTSEL0_DEFAULT                       (_CMU_CTRL_CLKOUTSEL0_DEFAULT << 0)

 #define CMU_CTRL_CLKOUTSEL0_DISABLED                      (_CMU_CTRL_CLKOUTSEL0_DISABLED << 0)

 #define CMU_CTRL_CLKOUTSEL0_ULFRCO                        (_CMU_CTRL_CLKOUTSEL0_ULFRCO << 0)

 #define CMU_CTRL_CLKOUTSEL0_LFRCO                         (_CMU_CTRL_CLKOUTSEL0_LFRCO << 0)

 #define CMU_CTRL_CLKOUTSEL0_LFXO                          (_CMU_CTRL_CLKOUTSEL0_LFXO << 0)

 #define CMU_CTRL_CLKOUTSEL0_HFXO                          (_CMU_CTRL_CLKOUTSEL0_HFXO << 0)

 #define CMU_CTRL_CLKOUTSEL0_HFEXPCLK                      (_CMU_CTRL_CLKOUTSEL0_HFEXPCLK << 0)

 #define CMU_CTRL_CLKOUTSEL0_ULFRCOQ                       (_CMU_CTRL_CLKOUTSEL0_ULFRCOQ << 0)

 #define CMU_CTRL_CLKOUTSEL0_LFRCOQ                        (_CMU_CTRL_CLKOUTSEL0_LFRCOQ << 0)

 #define CMU_CTRL_CLKOUTSEL0_LFXOQ                         (_CMU_CTRL_CLKOUTSEL0_LFXOQ << 0)

 #define CMU_CTRL_CLKOUTSEL0_HFRCOQ                        (_CMU_CTRL_CLKOUTSEL0_HFRCOQ << 0)

 #define CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ                     (_CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ << 0)

 #define CMU_CTRL_CLKOUTSEL0_HFXOQ                         (_CMU_CTRL_CLKOUTSEL0_HFXOQ << 0)

 #define CMU_CTRL_CLKOUTSEL0_HFSRCCLK                      (_CMU_CTRL_CLKOUTSEL0_HFSRCCLK << 0)

 #define _CMU_CTRL_CLKOUTSEL1_SHIFT                        5

 #define _CMU_CTRL_CLKOUTSEL1_MASK                         0x3E0UL

 #define _CMU_CTRL_CLKOUTSEL1_DEFAULT                      0x00000000UL

 #define _CMU_CTRL_CLKOUTSEL1_DISABLED                     0x00000000UL

 #define _CMU_CTRL_CLKOUTSEL1_ULFRCO                       0x00000001UL

 #define _CMU_CTRL_CLKOUTSEL1_LFRCO                        0x00000002UL

 #define _CMU_CTRL_CLKOUTSEL1_LFXO                         0x00000003UL

 #define _CMU_CTRL_CLKOUTSEL1_HFXO                         0x00000006UL

 #define _CMU_CTRL_CLKOUTSEL1_HFEXPCLK                     0x00000007UL

 #define _CMU_CTRL_CLKOUTSEL1_ULFRCOQ                      0x00000009UL

 #define _CMU_CTRL_CLKOUTSEL1_LFRCOQ                       0x0000000AUL

 #define _CMU_CTRL_CLKOUTSEL1_LFXOQ                        0x0000000BUL

 #define _CMU_CTRL_CLKOUTSEL1_HFRCOQ                       0x0000000CUL

 #define _CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ                    0x0000000DUL

 #define _CMU_CTRL_CLKOUTSEL1_HFXOQ                        0x0000000EUL

 #define _CMU_CTRL_CLKOUTSEL1_HFSRCCLK                     0x0000000FUL

 #define CMU_CTRL_CLKOUTSEL1_DEFAULT                       (_CMU_CTRL_CLKOUTSEL1_DEFAULT << 5)

 #define CMU_CTRL_CLKOUTSEL1_DISABLED                      (_CMU_CTRL_CLKOUTSEL1_DISABLED << 5)

 #define CMU_CTRL_CLKOUTSEL1_ULFRCO                        (_CMU_CTRL_CLKOUTSEL1_ULFRCO << 5)

 #define CMU_CTRL_CLKOUTSEL1_LFRCO                         (_CMU_CTRL_CLKOUTSEL1_LFRCO << 5)

 #define CMU_CTRL_CLKOUTSEL1_LFXO                          (_CMU_CTRL_CLKOUTSEL1_LFXO << 5)

 #define CMU_CTRL_CLKOUTSEL1_HFXO                          (_CMU_CTRL_CLKOUTSEL1_HFXO << 5)

 #define CMU_CTRL_CLKOUTSEL1_HFEXPCLK                      (_CMU_CTRL_CLKOUTSEL1_HFEXPCLK << 5)

 #define CMU_CTRL_CLKOUTSEL1_ULFRCOQ                       (_CMU_CTRL_CLKOUTSEL1_ULFRCOQ << 5)

 #define CMU_CTRL_CLKOUTSEL1_LFRCOQ                        (_CMU_CTRL_CLKOUTSEL1_LFRCOQ << 5)

 #define CMU_CTRL_CLKOUTSEL1_LFXOQ                         (_CMU_CTRL_CLKOUTSEL1_LFXOQ << 5)

 #define CMU_CTRL_CLKOUTSEL1_HFRCOQ                        (_CMU_CTRL_CLKOUTSEL1_HFRCOQ << 5)

 #define CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ                     (_CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ << 5)

 #define CMU_CTRL_CLKOUTSEL1_HFXOQ                         (_CMU_CTRL_CLKOUTSEL1_HFXOQ << 5)

 #define CMU_CTRL_CLKOUTSEL1_HFSRCCLK                      (_CMU_CTRL_CLKOUTSEL1_HFSRCCLK << 5)

 #define CMU_CTRL_WSHFLE                                   (0x1UL << 16)

 #define _CMU_CTRL_WSHFLE_SHIFT                            16

 #define _CMU_CTRL_WSHFLE_MASK                             0x10000UL

 #define _CMU_CTRL_WSHFLE_DEFAULT                          0x00000000UL

 #define CMU_CTRL_WSHFLE_DEFAULT                           (_CMU_CTRL_WSHFLE_DEFAULT << 16)

 #define CMU_CTRL_HFPERCLKEN                               (0x1UL << 20)

 #define _CMU_CTRL_HFPERCLKEN_SHIFT                        20

 #define _CMU_CTRL_HFPERCLKEN_MASK                         0x100000UL

 #define _CMU_CTRL_HFPERCLKEN_DEFAULT                      0x00000001UL

 #define CMU_CTRL_HFPERCLKEN_DEFAULT                       (_CMU_CTRL_HFPERCLKEN_DEFAULT << 20)

 /* Bit fields for CMU HFRCOCTRL */

 #define _CMU_HFRCOCTRL_RESETVALUE                         0xB1481F7FUL

 #define _CMU_HFRCOCTRL_MASK                               0xFFFF3F7FUL

 #define _CMU_HFRCOCTRL_TUNING_SHIFT                       0

 #define _CMU_HFRCOCTRL_TUNING_MASK                        0x7FUL

 #define _CMU_HFRCOCTRL_TUNING_DEFAULT                     0x0000007FUL

 #define CMU_HFRCOCTRL_TUNING_DEFAULT                      (_CMU_HFRCOCTRL_TUNING_DEFAULT << 0)

 #define _CMU_HFRCOCTRL_FINETUNING_SHIFT                   8

 #define _CMU_HFRCOCTRL_FINETUNING_MASK                    0x3F00UL

 #define _CMU_HFRCOCTRL_FINETUNING_DEFAULT                 0x0000001FUL

 #define CMU_HFRCOCTRL_FINETUNING_DEFAULT                  (_CMU_HFRCOCTRL_FINETUNING_DEFAULT << 8)

 #define _CMU_HFRCOCTRL_FREQRANGE_SHIFT                    16

 #define _CMU_HFRCOCTRL_FREQRANGE_MASK                     0x1F0000UL

 #define _CMU_HFRCOCTRL_FREQRANGE_DEFAULT                  0x00000008UL

 #define CMU_HFRCOCTRL_FREQRANGE_DEFAULT                   (_CMU_HFRCOCTRL_FREQRANGE_DEFAULT << 16)

 #define _CMU_HFRCOCTRL_CMPBIAS_SHIFT                      21

 #define _CMU_HFRCOCTRL_CMPBIAS_MASK                       0xE00000UL

 #define _CMU_HFRCOCTRL_CMPBIAS_DEFAULT                    0x00000002UL

 #define CMU_HFRCOCTRL_CMPBIAS_DEFAULT                     (_CMU_HFRCOCTRL_CMPBIAS_DEFAULT << 21)

 #define CMU_HFRCOCTRL_LDOHP                               (0x1UL << 24)

 #define _CMU_HFRCOCTRL_LDOHP_SHIFT                        24

 #define _CMU_HFRCOCTRL_LDOHP_MASK                         0x1000000UL

 #define _CMU_HFRCOCTRL_LDOHP_DEFAULT                      0x00000001UL

 #define CMU_HFRCOCTRL_LDOHP_DEFAULT                       (_CMU_HFRCOCTRL_LDOHP_DEFAULT << 24)

 #define _CMU_HFRCOCTRL_CLKDIV_SHIFT                       25

 #define _CMU_HFRCOCTRL_CLKDIV_MASK                        0x6000000UL

 #define _CMU_HFRCOCTRL_CLKDIV_DEFAULT                     0x00000000UL

 #define _CMU_HFRCOCTRL_CLKDIV_DIV1                        0x00000000UL

 #define _CMU_HFRCOCTRL_CLKDIV_DIV2                        0x00000001UL

 #define _CMU_HFRCOCTRL_CLKDIV_DIV4                        0x00000002UL

 #define CMU_HFRCOCTRL_CLKDIV_DEFAULT                      (_CMU_HFRCOCTRL_CLKDIV_DEFAULT << 25)

 #define CMU_HFRCOCTRL_CLKDIV_DIV1                         (_CMU_HFRCOCTRL_CLKDIV_DIV1 << 25)

 #define CMU_HFRCOCTRL_CLKDIV_DIV2                         (_CMU_HFRCOCTRL_CLKDIV_DIV2 << 25)

 #define CMU_HFRCOCTRL_CLKDIV_DIV4                         (_CMU_HFRCOCTRL_CLKDIV_DIV4 << 25)

 #define CMU_HFRCOCTRL_FINETUNINGEN                        (0x1UL << 27)

 #define _CMU_HFRCOCTRL_FINETUNINGEN_SHIFT                 27

 #define _CMU_HFRCOCTRL_FINETUNINGEN_MASK                  0x8000000UL

 #define _CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT               0x00000000UL

 #define CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT                (_CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

 #define _CMU_HFRCOCTRL_VREFTC_SHIFT                       28

 #define _CMU_HFRCOCTRL_VREFTC_MASK                        0xF0000000UL

 #define _CMU_HFRCOCTRL_VREFTC_DEFAULT                     0x0000000BUL

 #define CMU_HFRCOCTRL_VREFTC_DEFAULT                      (_CMU_HFRCOCTRL_VREFTC_DEFAULT << 28)

 /* Bit fields for CMU AUXHFRCOCTRL */

 #define _CMU_AUXHFRCOCTRL_RESETVALUE                      0xB1481F7FUL

 #define _CMU_AUXHFRCOCTRL_MASK                            0xFFFF3F7FUL

 #define _CMU_AUXHFRCOCTRL_TUNING_SHIFT                    0

 #define _CMU_AUXHFRCOCTRL_TUNING_MASK                     0x7FUL

 #define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT                  0x0000007FUL

 #define CMU_AUXHFRCOCTRL_TUNING_DEFAULT                   (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0)

 #define _CMU_AUXHFRCOCTRL_FINETUNING_SHIFT                8

 #define _CMU_AUXHFRCOCTRL_FINETUNING_MASK                 0x3F00UL

 #define _CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT              0x0000001FUL

 #define CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT               (_CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT << 8)

 #define _CMU_AUXHFRCOCTRL_FREQRANGE_SHIFT                 16

 #define _CMU_AUXHFRCOCTRL_FREQRANGE_MASK                  0x1F0000UL

 #define _CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT               0x00000008UL

 #define CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT                (_CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT << 16)

 #define _CMU_AUXHFRCOCTRL_CMPBIAS_SHIFT                   21

 #define _CMU_AUXHFRCOCTRL_CMPBIAS_MASK                    0xE00000UL

 #define _CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT                 0x00000002UL

 #define CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT                  (_CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT << 21)

 #define CMU_AUXHFRCOCTRL_LDOHP                            (0x1UL << 24)

 #define _CMU_AUXHFRCOCTRL_LDOHP_SHIFT                     24

 #define _CMU_AUXHFRCOCTRL_LDOHP_MASK                      0x1000000UL

 #define _CMU_AUXHFRCOCTRL_LDOHP_DEFAULT                   0x00000001UL

 #define CMU_AUXHFRCOCTRL_LDOHP_DEFAULT                    (_CMU_AUXHFRCOCTRL_LDOHP_DEFAULT << 24)

 #define _CMU_AUXHFRCOCTRL_CLKDIV_SHIFT                    25

 #define _CMU_AUXHFRCOCTRL_CLKDIV_MASK                     0x6000000UL

 #define _CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT                  0x00000000UL

 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1                     0x00000000UL

 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV2                     0x00000001UL

 #define _CMU_AUXHFRCOCTRL_CLKDIV_DIV4                     0x00000002UL

 #define CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT                   (_CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT << 25)

 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV1                      (_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25)

 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV2                      (_CMU_AUXHFRCOCTRL_CLKDIV_DIV2 << 25)

 #define CMU_AUXHFRCOCTRL_CLKDIV_DIV4                      (_CMU_AUXHFRCOCTRL_CLKDIV_DIV4 << 25)

 #define CMU_AUXHFRCOCTRL_FINETUNINGEN                     (0x1UL << 27)

 #define _CMU_AUXHFRCOCTRL_FINETUNINGEN_SHIFT              27

 #define _CMU_AUXHFRCOCTRL_FINETUNINGEN_MASK               0x8000000UL

 #define _CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT            0x00000000UL

 #define CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT             (_CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

 #define _CMU_AUXHFRCOCTRL_VREFTC_SHIFT                    28

 #define _CMU_AUXHFRCOCTRL_VREFTC_MASK                     0xF0000000UL

 #define _CMU_AUXHFRCOCTRL_VREFTC_DEFAULT                  0x0000000BUL

 #define CMU_AUXHFRCOCTRL_VREFTC_DEFAULT                   (_CMU_AUXHFRCOCTRL_VREFTC_DEFAULT << 28)

 /* Bit fields for CMU LFRCOCTRL */

 #define _CMU_LFRCOCTRL_RESETVALUE                         0x81060100UL

 #define _CMU_LFRCOCTRL_MASK                               0xF33701FFUL

 #define _CMU_LFRCOCTRL_TUNING_SHIFT                       0

 #define _CMU_LFRCOCTRL_TUNING_MASK                        0x1FFUL

 #define _CMU_LFRCOCTRL_TUNING_DEFAULT                     0x00000100UL

 #define CMU_LFRCOCTRL_TUNING_DEFAULT                      (_CMU_LFRCOCTRL_TUNING_DEFAULT << 0)

 #define CMU_LFRCOCTRL_ENVREF                              (0x1UL << 16)

 #define _CMU_LFRCOCTRL_ENVREF_SHIFT                       16

 #define _CMU_LFRCOCTRL_ENVREF_MASK                        0x10000UL

 #define _CMU_LFRCOCTRL_ENVREF_DEFAULT                     0x00000000UL

 #define CMU_LFRCOCTRL_ENVREF_DEFAULT                      (_CMU_LFRCOCTRL_ENVREF_DEFAULT << 16)

 #define CMU_LFRCOCTRL_ENCHOP                              (0x1UL << 17)

 #define _CMU_LFRCOCTRL_ENCHOP_SHIFT                       17

 #define _CMU_LFRCOCTRL_ENCHOP_MASK                        0x20000UL

 #define _CMU_LFRCOCTRL_ENCHOP_DEFAULT                     0x00000001UL

 #define CMU_LFRCOCTRL_ENCHOP_DEFAULT                      (_CMU_LFRCOCTRL_ENCHOP_DEFAULT << 17)

 #define CMU_LFRCOCTRL_ENDEM                               (0x1UL << 18)

 #define _CMU_LFRCOCTRL_ENDEM_SHIFT                        18

 #define _CMU_LFRCOCTRL_ENDEM_MASK                         0x40000UL

 #define _CMU_LFRCOCTRL_ENDEM_DEFAULT                      0x00000001UL

 #define CMU_LFRCOCTRL_ENDEM_DEFAULT                       (_CMU_LFRCOCTRL_ENDEM_DEFAULT << 18)

 #define _CMU_LFRCOCTRL_VREFUPDATE_SHIFT                   20

 #define _CMU_LFRCOCTRL_VREFUPDATE_MASK                    0x300000UL

 #define _CMU_LFRCOCTRL_VREFUPDATE_DEFAULT                 0x00000000UL

 #define _CMU_LFRCOCTRL_VREFUPDATE_32CYCLES                0x00000000UL

 #define _CMU_LFRCOCTRL_VREFUPDATE_64CYCLES                0x00000001UL

 #define _CMU_LFRCOCTRL_VREFUPDATE_128CYCLES               0x00000002UL

 #define _CMU_LFRCOCTRL_VREFUPDATE_256CYCLES               0x00000003UL

 #define CMU_LFRCOCTRL_VREFUPDATE_DEFAULT                  (_CMU_LFRCOCTRL_VREFUPDATE_DEFAULT << 20)

 #define CMU_LFRCOCTRL_VREFUPDATE_32CYCLES                 (_CMU_LFRCOCTRL_VREFUPDATE_32CYCLES << 20)

 #define CMU_LFRCOCTRL_VREFUPDATE_64CYCLES                 (_CMU_LFRCOCTRL_VREFUPDATE_64CYCLES << 20)

 #define CMU_LFRCOCTRL_VREFUPDATE_128CYCLES                (_CMU_LFRCOCTRL_VREFUPDATE_128CYCLES << 20)

 #define CMU_LFRCOCTRL_VREFUPDATE_256CYCLES                (_CMU_LFRCOCTRL_VREFUPDATE_256CYCLES << 20)

 #define _CMU_LFRCOCTRL_TIMEOUT_SHIFT                      24

 #define _CMU_LFRCOCTRL_TIMEOUT_MASK                       0x3000000UL

 #define _CMU_LFRCOCTRL_TIMEOUT_2CYCLES                    0x00000000UL

 #define _CMU_LFRCOCTRL_TIMEOUT_DEFAULT                    0x00000001UL

 #define _CMU_LFRCOCTRL_TIMEOUT_16CYCLES                   0x00000001UL

 #define _CMU_LFRCOCTRL_TIMEOUT_32CYCLES                   0x00000002UL

 #define CMU_LFRCOCTRL_TIMEOUT_2CYCLES                     (_CMU_LFRCOCTRL_TIMEOUT_2CYCLES << 24)

 #define CMU_LFRCOCTRL_TIMEOUT_DEFAULT                     (_CMU_LFRCOCTRL_TIMEOUT_DEFAULT << 24)

 #define CMU_LFRCOCTRL_TIMEOUT_16CYCLES                    (_CMU_LFRCOCTRL_TIMEOUT_16CYCLES << 24)

 #define CMU_LFRCOCTRL_TIMEOUT_32CYCLES                    (_CMU_LFRCOCTRL_TIMEOUT_32CYCLES << 24)

 #define _CMU_LFRCOCTRL_GMCCURTUNE_SHIFT                   28

 #define _CMU_LFRCOCTRL_GMCCURTUNE_MASK                    0xF0000000UL

 #define _CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT                 0x00000008UL

 #define CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT                  (_CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT << 28)

 /* Bit fields for CMU HFXOCTRL */

 #define _CMU_HFXOCTRL_RESETVALUE                          0x00000000UL

 #define _CMU_HFXOCTRL_MASK                                0x37000731UL

 #define CMU_HFXOCTRL_MODE                                 (0x1UL << 0)

 #define _CMU_HFXOCTRL_MODE_SHIFT                          0

 #define _CMU_HFXOCTRL_MODE_MASK                           0x1UL

 #define _CMU_HFXOCTRL_MODE_DEFAULT                        0x00000000UL

 #define _CMU_HFXOCTRL_MODE_XTAL                           0x00000000UL

 #define _CMU_HFXOCTRL_MODE_EXTCLK                         0x00000001UL

 #define CMU_HFXOCTRL_MODE_DEFAULT                         (_CMU_HFXOCTRL_MODE_DEFAULT << 0)

 #define CMU_HFXOCTRL_MODE_XTAL                            (_CMU_HFXOCTRL_MODE_XTAL << 0)

 #define CMU_HFXOCTRL_MODE_EXTCLK                          (_CMU_HFXOCTRL_MODE_EXTCLK << 0)

 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_SHIFT           4

 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK            0x30UL

 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_DEFAULT         0x00000000UL

 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD         0x00000000UL

 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD             0x00000001UL

 #define _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MANUAL          0x00000002UL

 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_DEFAULT          (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_DEFAULT << 4)

 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD          (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_AUTOCMD << 4)

 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD              (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD << 4)

 #define CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MANUAL           (_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MANUAL << 4)

 #define CMU_HFXOCTRL_LOWPOWER                             (0x1UL << 8)

 #define _CMU_HFXOCTRL_LOWPOWER_SHIFT                      8

 #define _CMU_HFXOCTRL_LOWPOWER_MASK                       0x100UL

 #define _CMU_HFXOCTRL_LOWPOWER_DEFAULT                    0x00000000UL

 #define CMU_HFXOCTRL_LOWPOWER_DEFAULT                     (_CMU_HFXOCTRL_LOWPOWER_DEFAULT << 8)

 #define CMU_HFXOCTRL_XTI2GND                              (0x1UL << 9)

 #define _CMU_HFXOCTRL_XTI2GND_SHIFT                       9

 #define _CMU_HFXOCTRL_XTI2GND_MASK                        0x200UL

 #define _CMU_HFXOCTRL_XTI2GND_DEFAULT                     0x00000000UL

 #define CMU_HFXOCTRL_XTI2GND_DEFAULT                      (_CMU_HFXOCTRL_XTI2GND_DEFAULT << 9)

 #define CMU_HFXOCTRL_XTO2GND                              (0x1UL << 10)

 #define _CMU_HFXOCTRL_XTO2GND_SHIFT                       10

 #define _CMU_HFXOCTRL_XTO2GND_MASK                        0x400UL

 #define _CMU_HFXOCTRL_XTO2GND_DEFAULT                     0x00000000UL

 #define CMU_HFXOCTRL_XTO2GND_DEFAULT                      (_CMU_HFXOCTRL_XTO2GND_DEFAULT << 10)

 #define _CMU_HFXOCTRL_LFTIMEOUT_SHIFT                     24

 #define _CMU_HFXOCTRL_LFTIMEOUT_MASK                      0x7000000UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_DEFAULT                   0x00000000UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_0CYCLES                   0x00000000UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_2CYCLES                   0x00000001UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_4CYCLES                   0x00000002UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_16CYCLES                  0x00000003UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_32CYCLES                  0x00000004UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_64CYCLES                  0x00000005UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES                  0x00000006UL

 #define _CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES                  0x00000007UL

 #define CMU_HFXOCTRL_LFTIMEOUT_DEFAULT                    (_CMU_HFXOCTRL_LFTIMEOUT_DEFAULT << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_0CYCLES                    (_CMU_HFXOCTRL_LFTIMEOUT_0CYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_2CYCLES                    (_CMU_HFXOCTRL_LFTIMEOUT_2CYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_4CYCLES                    (_CMU_HFXOCTRL_LFTIMEOUT_4CYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_16CYCLES                   (_CMU_HFXOCTRL_LFTIMEOUT_16CYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_32CYCLES                   (_CMU_HFXOCTRL_LFTIMEOUT_32CYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_64CYCLES                   (_CMU_HFXOCTRL_LFTIMEOUT_64CYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES                   (_CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES << 24)

 #define CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES                   (_CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES << 24)

 #define CMU_HFXOCTRL_AUTOSTARTEM0EM1                      (0x1UL << 28)

 #define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_SHIFT               28

 #define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK                0x10000000UL

 #define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT             0x00000000UL

 #define CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT              (_CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT << 28)

 #define CMU_HFXOCTRL_AUTOSTARTSELEM0EM1                   (0x1UL << 29)

 #define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_SHIFT            29

 #define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK             0x20000000UL

 #define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT          0x00000000UL

 #define CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT           (_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT << 29)

 /* Bit fields for CMU HFXOSTARTUPCTRL */

 #define _CMU_HFXOSTARTUPCTRL_RESETVALUE                   0x00050020UL

 #define _CMU_HFXOSTARTUPCTRL_MASK                         0x000FF87FUL

 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT           0

 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK            0x7FUL

 #define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT         0x00000020UL

 #define CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT          (_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT << 0)

 #define _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT                  11

 #define _CMU_HFXOSTARTUPCTRL_CTUNE_MASK                   0xFF800UL

 #define _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT                0x000000A0UL

 #define CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT                 (_CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT << 11)

 /* Bit fields for CMU HFXOSTEADYSTATECTRL */

 #define _CMU_HFXOSTEADYSTATECTRL_RESETVALUE               0xA30B4507UL

 #define _CMU_HFXOSTEADYSTATECTRL_MASK                     0xF70FFFFFUL

 #define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT       0

 #define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK        0x7FUL

 #define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT     0x00000007UL

 #define CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT      (_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT << 0)

 #define _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT             7

 #define _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK              0x780UL

 #define _CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT           0x0000000AUL

 #define CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT            (_CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT << 7)

 #define _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT              11

 #define _CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK               0xFF800UL

 #define _CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT            0x00000168UL

 #define CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT             (_CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT << 11)

 #define _CMU_HFXOSTEADYSTATECTRL_REGSELILOW_SHIFT         24

 #define _CMU_HFXOSTEADYSTATECTRL_REGSELILOW_MASK          0x3000000UL

 #define _CMU_HFXOSTEADYSTATECTRL_REGSELILOW_DEFAULT       0x00000003UL

 #define CMU_HFXOSTEADYSTATECTRL_REGSELILOW_DEFAULT        (_CMU_HFXOSTEADYSTATECTRL_REGSELILOW_DEFAULT << 24)

 #define CMU_HFXOSTEADYSTATECTRL_PEAKDETEN                 (0x1UL << 26)

 #define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_SHIFT          26

 #define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_MASK           0x4000000UL

 #define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT        0x00000000UL

 #define CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT         (_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT << 26)

 #define _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_SHIFT        28

 #define _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK         0xF0000000UL

 #define _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_DEFAULT      0x0000000AUL

 #define CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_DEFAULT       (_CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_DEFAULT << 28)

 /* Bit fields for CMU HFXOTIMEOUTCTRL */

 #define _CMU_HFXOTIMEOUTCTRL_RESETVALUE                   0x0002A067UL

 #define _CMU_HFXOTIMEOUTCTRL_MASK                         0x000FF0FFUL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT         0

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_MASK          0xFUL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES       0x00000000UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES       0x00000001UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES      0x00000002UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES      0x00000003UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES     0x00000004UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES      0x00000005UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES      0x00000006UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT       0x00000007UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES      0x00000007UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES      0x00000008UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES     0x00000009UL

 #define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES     0x0000000AUL

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES        (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES        (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES       (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES       (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES      (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES       (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES       (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT        (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES       (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES       (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES      (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES << 0)

 #define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES      (_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES << 0)

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT          4

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_MASK           0xF0UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES        0x00000000UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES        0x00000001UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES       0x00000002UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES       0x00000003UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES      0x00000004UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES       0x00000005UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT        0x00000006UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES       0x00000006UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES       0x00000007UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES       0x00000008UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES      0x00000009UL

 #define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES      0x0000000AUL

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES         (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES         (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES        (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES        (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES       (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES        (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT         (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES        (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES        (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES        (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES       (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES << 4)

 #define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES       (_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES << 4)

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT         12

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_MASK          0xF000UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES       0x00000000UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES       0x00000001UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES      0x00000002UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES      0x00000003UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES     0x00000004UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES      0x00000005UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES      0x00000006UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES      0x00000007UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES      0x00000008UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES     0x00000009UL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT       0x0000000AUL

 #define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES     0x0000000AUL

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES        (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES        (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES       (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES       (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES      (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES       (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES       (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES       (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES       (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES      (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT        (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT << 12)

 #define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES      (_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES << 12)

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_SHIFT        16

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_MASK         0xF0000UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2CYCLES      0x00000000UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4CYCLES      0x00000001UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT      0x00000002UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16CYCLES     0x00000002UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32CYCLES     0x00000003UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_256CYCLES    0x00000004UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_1KCYCLES     0x00000005UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2KCYCLES     0x00000006UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4KCYCLES     0x00000007UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_8KCYCLES     0x00000008UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16KCYCLES    0x00000009UL

 #define _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32KCYCLES    0x0000000AUL

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2CYCLES       (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2CYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4CYCLES       (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4CYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT       (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16CYCLES      (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16CYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32CYCLES      (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32CYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_256CYCLES     (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_256CYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_1KCYCLES      (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_1KCYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2KCYCLES      (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_2KCYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4KCYCLES      (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_4KCYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_8KCYCLES      (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_8KCYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16KCYCLES     (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_16KCYCLES << 16)

 #define CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32KCYCLES     (_CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_32KCYCLES << 16)

 /* Bit fields for CMU LFXOCTRL */

 #define _CMU_LFXOCTRL_RESETVALUE                          0x07009000UL

 #define _CMU_LFXOCTRL_MASK                                0x0713DB7FUL

 #define _CMU_LFXOCTRL_TUNING_SHIFT                        0

 #define _CMU_LFXOCTRL_TUNING_MASK                         0x7FUL

 #define _CMU_LFXOCTRL_TUNING_DEFAULT                      0x00000000UL

 #define CMU_LFXOCTRL_TUNING_DEFAULT                       (_CMU_LFXOCTRL_TUNING_DEFAULT << 0)

 #define _CMU_LFXOCTRL_MODE_SHIFT                          8

 #define _CMU_LFXOCTRL_MODE_MASK                           0x300UL

 #define _CMU_LFXOCTRL_MODE_DEFAULT                        0x00000000UL

 #define _CMU_LFXOCTRL_MODE_XTAL                           0x00000000UL

 #define _CMU_LFXOCTRL_MODE_BUFEXTCLK                      0x00000001UL

 #define _CMU_LFXOCTRL_MODE_DIGEXTCLK                      0x00000002UL

 #define CMU_LFXOCTRL_MODE_DEFAULT                         (_CMU_LFXOCTRL_MODE_DEFAULT << 8)

 #define CMU_LFXOCTRL_MODE_XTAL                            (_CMU_LFXOCTRL_MODE_XTAL << 8)

 #define CMU_LFXOCTRL_MODE_BUFEXTCLK                       (_CMU_LFXOCTRL_MODE_BUFEXTCLK << 8)

 #define CMU_LFXOCTRL_MODE_DIGEXTCLK                       (_CMU_LFXOCTRL_MODE_DIGEXTCLK << 8)

 #define _CMU_LFXOCTRL_GAIN_SHIFT                          11

 #define _CMU_LFXOCTRL_GAIN_MASK                           0x1800UL

 #define _CMU_LFXOCTRL_GAIN_DEFAULT                        0x00000002UL

 #define CMU_LFXOCTRL_GAIN_DEFAULT                         (_CMU_LFXOCTRL_GAIN_DEFAULT << 11)

 #define CMU_LFXOCTRL_HIGHAMPL                             (0x1UL << 14)

 #define _CMU_LFXOCTRL_HIGHAMPL_SHIFT                      14

 #define _CMU_LFXOCTRL_HIGHAMPL_MASK                       0x4000UL

 #define _CMU_LFXOCTRL_HIGHAMPL_DEFAULT                    0x00000000UL

 #define CMU_LFXOCTRL_HIGHAMPL_DEFAULT                     (_CMU_LFXOCTRL_HIGHAMPL_DEFAULT << 14)

 #define CMU_LFXOCTRL_AGC                                  (0x1UL << 15)

 #define _CMU_LFXOCTRL_AGC_SHIFT                           15

 #define _CMU_LFXOCTRL_AGC_MASK                            0x8000UL

 #define _CMU_LFXOCTRL_AGC_DEFAULT                         0x00000001UL

 #define CMU_LFXOCTRL_AGC_DEFAULT                          (_CMU_LFXOCTRL_AGC_DEFAULT << 15)

 #define _CMU_LFXOCTRL_CUR_SHIFT                           16

 #define _CMU_LFXOCTRL_CUR_MASK                            0x30000UL

 #define _CMU_LFXOCTRL_CUR_DEFAULT                         0x00000000UL

 #define CMU_LFXOCTRL_CUR_DEFAULT                          (_CMU_LFXOCTRL_CUR_DEFAULT << 16)

 #define CMU_LFXOCTRL_BUFCUR                               (0x1UL << 20)

 #define _CMU_LFXOCTRL_BUFCUR_SHIFT                        20

 #define _CMU_LFXOCTRL_BUFCUR_MASK                         0x100000UL

 #define _CMU_LFXOCTRL_BUFCUR_DEFAULT                      0x00000000UL

 #define CMU_LFXOCTRL_BUFCUR_DEFAULT                       (_CMU_LFXOCTRL_BUFCUR_DEFAULT << 20)

 #define _CMU_LFXOCTRL_TIMEOUT_SHIFT                       24

 #define _CMU_LFXOCTRL_TIMEOUT_MASK                        0x7000000UL

 #define _CMU_LFXOCTRL_TIMEOUT_2CYCLES                     0x00000000UL

 #define _CMU_LFXOCTRL_TIMEOUT_256CYCLES                   0x00000001UL

 #define _CMU_LFXOCTRL_TIMEOUT_1KCYCLES                    0x00000002UL

 #define _CMU_LFXOCTRL_TIMEOUT_2KCYCLES                    0x00000003UL

 #define _CMU_LFXOCTRL_TIMEOUT_4KCYCLES                    0x00000004UL

 #define _CMU_LFXOCTRL_TIMEOUT_8KCYCLES                    0x00000005UL

 #define _CMU_LFXOCTRL_TIMEOUT_16KCYCLES                   0x00000006UL

 #define _CMU_LFXOCTRL_TIMEOUT_DEFAULT                     0x00000007UL

 #define _CMU_LFXOCTRL_TIMEOUT_32KCYCLES                   0x00000007UL

 #define CMU_LFXOCTRL_TIMEOUT_2CYCLES                      (_CMU_LFXOCTRL_TIMEOUT_2CYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_256CYCLES                    (_CMU_LFXOCTRL_TIMEOUT_256CYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_1KCYCLES                     (_CMU_LFXOCTRL_TIMEOUT_1KCYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_2KCYCLES                     (_CMU_LFXOCTRL_TIMEOUT_2KCYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_4KCYCLES                     (_CMU_LFXOCTRL_TIMEOUT_4KCYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_8KCYCLES                     (_CMU_LFXOCTRL_TIMEOUT_8KCYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_16KCYCLES                    (_CMU_LFXOCTRL_TIMEOUT_16KCYCLES << 24)

 #define CMU_LFXOCTRL_TIMEOUT_DEFAULT                      (_CMU_LFXOCTRL_TIMEOUT_DEFAULT << 24)

 #define CMU_LFXOCTRL_TIMEOUT_32KCYCLES                    (_CMU_LFXOCTRL_TIMEOUT_32KCYCLES << 24)

 /* Bit fields for CMU DPLLCTRL */

 #define _CMU_DPLLCTRL_RESETVALUE                          0x00000000UL

 #define _CMU_DPLLCTRL_MASK                                0x0000001FUL

 #define CMU_DPLLCTRL_MODE                                 (0x1UL << 0)

 #define _CMU_DPLLCTRL_MODE_SHIFT                          0

 #define _CMU_DPLLCTRL_MODE_MASK                           0x1UL

 #define _CMU_DPLLCTRL_MODE_DEFAULT                        0x00000000UL

 #define _CMU_DPLLCTRL_MODE_FREQLL                         0x00000000UL

 #define _CMU_DPLLCTRL_MODE_PHASELL                        0x00000001UL

 #define CMU_DPLLCTRL_MODE_DEFAULT                         (_CMU_DPLLCTRL_MODE_DEFAULT << 0)

 #define CMU_DPLLCTRL_MODE_FREQLL                          (_CMU_DPLLCTRL_MODE_FREQLL << 0)

 #define CMU_DPLLCTRL_MODE_PHASELL                         (_CMU_DPLLCTRL_MODE_PHASELL << 0)

 #define CMU_DPLLCTRL_EDGESEL                              (0x1UL << 1)

 #define _CMU_DPLLCTRL_EDGESEL_SHIFT                       1

 #define _CMU_DPLLCTRL_EDGESEL_MASK                        0x2UL

 #define _CMU_DPLLCTRL_EDGESEL_DEFAULT                     0x00000000UL

 #define _CMU_DPLLCTRL_EDGESEL_FALL                        0x00000000UL

 #define _CMU_DPLLCTRL_EDGESEL_RISE                        0x00000001UL

 #define CMU_DPLLCTRL_EDGESEL_DEFAULT                      (_CMU_DPLLCTRL_EDGESEL_DEFAULT << 1)

 #define CMU_DPLLCTRL_EDGESEL_FALL                         (_CMU_DPLLCTRL_EDGESEL_FALL << 1)

 #define CMU_DPLLCTRL_EDGESEL_RISE                         (_CMU_DPLLCTRL_EDGESEL_RISE << 1)

 #define CMU_DPLLCTRL_AUTORECOVER                          (0x1UL << 2)

 #define _CMU_DPLLCTRL_AUTORECOVER_SHIFT                   2

 #define _CMU_DPLLCTRL_AUTORECOVER_MASK                    0x4UL

 #define _CMU_DPLLCTRL_AUTORECOVER_DEFAULT                 0x00000000UL

 #define CMU_DPLLCTRL_AUTORECOVER_DEFAULT                  (_CMU_DPLLCTRL_AUTORECOVER_DEFAULT << 2)

 #define _CMU_DPLLCTRL_REFSEL_SHIFT                        3

 #define _CMU_DPLLCTRL_REFSEL_MASK                         0x18UL

 #define _CMU_DPLLCTRL_REFSEL_DEFAULT                      0x00000000UL

 #define _CMU_DPLLCTRL_REFSEL_HFXO                         0x00000000UL

 #define _CMU_DPLLCTRL_REFSEL_LFXO                         0x00000001UL

 #define _CMU_DPLLCTRL_REFSEL_CLKIN0                       0x00000003UL

 #define CMU_DPLLCTRL_REFSEL_DEFAULT                       (_CMU_DPLLCTRL_REFSEL_DEFAULT << 3)

 #define CMU_DPLLCTRL_REFSEL_HFXO                          (_CMU_DPLLCTRL_REFSEL_HFXO << 3)

 #define CMU_DPLLCTRL_REFSEL_LFXO                          (_CMU_DPLLCTRL_REFSEL_LFXO << 3)

 #define CMU_DPLLCTRL_REFSEL_CLKIN0                        (_CMU_DPLLCTRL_REFSEL_CLKIN0 << 3)

 /* Bit fields for CMU DPLLCTRL1 */

 #define _CMU_DPLLCTRL1_RESETVALUE                         0x00000000UL

 #define _CMU_DPLLCTRL1_MASK                               0x0FFF0FFFUL

 #define _CMU_DPLLCTRL1_M_SHIFT                            0

 #define _CMU_DPLLCTRL1_M_MASK                             0xFFFUL

 #define _CMU_DPLLCTRL1_M_DEFAULT                          0x00000000UL

 #define CMU_DPLLCTRL1_M_DEFAULT                           (_CMU_DPLLCTRL1_M_DEFAULT << 0)

 #define _CMU_DPLLCTRL1_N_SHIFT                            16

 #define _CMU_DPLLCTRL1_N_MASK                             0xFFF0000UL

 #define _CMU_DPLLCTRL1_N_DEFAULT                          0x00000000UL

 #define CMU_DPLLCTRL1_N_DEFAULT                           (_CMU_DPLLCTRL1_N_DEFAULT << 16)

 /* Bit fields for CMU CALCTRL */

 #define _CMU_CALCTRL_RESETVALUE                           0x00000000UL

 #define _CMU_CALCTRL_MASK                                 0x0F0F01FFUL

 #define _CMU_CALCTRL_UPSEL_SHIFT                          0

 #define _CMU_CALCTRL_UPSEL_MASK                           0xFUL

 #define _CMU_CALCTRL_UPSEL_DEFAULT                        0x00000000UL

 #define _CMU_CALCTRL_UPSEL_HFXO                           0x00000000UL

 #define _CMU_CALCTRL_UPSEL_LFXO                           0x00000001UL

 #define _CMU_CALCTRL_UPSEL_HFRCO                          0x00000002UL

 #define _CMU_CALCTRL_UPSEL_LFRCO                          0x00000003UL

 #define _CMU_CALCTRL_UPSEL_AUXHFRCO                       0x00000004UL

 #define _CMU_CALCTRL_UPSEL_PRS                            0x00000005UL

 #define CMU_CALCTRL_UPSEL_DEFAULT                         (_CMU_CALCTRL_UPSEL_DEFAULT << 0)

 #define CMU_CALCTRL_UPSEL_HFXO                            (_CMU_CALCTRL_UPSEL_HFXO << 0)

 #define CMU_CALCTRL_UPSEL_LFXO                            (_CMU_CALCTRL_UPSEL_LFXO << 0)

 #define CMU_CALCTRL_UPSEL_HFRCO                           (_CMU_CALCTRL_UPSEL_HFRCO << 0)

 #define CMU_CALCTRL_UPSEL_LFRCO                           (_CMU_CALCTRL_UPSEL_LFRCO << 0)

 #define CMU_CALCTRL_UPSEL_AUXHFRCO                        (_CMU_CALCTRL_UPSEL_AUXHFRCO << 0)

 #define CMU_CALCTRL_UPSEL_PRS                             (_CMU_CALCTRL_UPSEL_PRS << 0)

 #define _CMU_CALCTRL_DOWNSEL_SHIFT                        4

 #define _CMU_CALCTRL_DOWNSEL_MASK                         0xF0UL

 #define _CMU_CALCTRL_DOWNSEL_DEFAULT                      0x00000000UL

 #define _CMU_CALCTRL_DOWNSEL_HFCLK                        0x00000000UL

 #define _CMU_CALCTRL_DOWNSEL_HFXO                         0x00000001UL

 #define _CMU_CALCTRL_DOWNSEL_LFXO                         0x00000002UL

 #define _CMU_CALCTRL_DOWNSEL_HFRCO                        0x00000003UL

 #define _CMU_CALCTRL_DOWNSEL_LFRCO                        0x00000004UL

 #define _CMU_CALCTRL_DOWNSEL_AUXHFRCO                     0x00000005UL

 #define _CMU_CALCTRL_DOWNSEL_PRS                          0x00000006UL

 #define CMU_CALCTRL_DOWNSEL_DEFAULT                       (_CMU_CALCTRL_DOWNSEL_DEFAULT << 4)

 #define CMU_CALCTRL_DOWNSEL_HFCLK                         (_CMU_CALCTRL_DOWNSEL_HFCLK << 4)

 #define CMU_CALCTRL_DOWNSEL_HFXO                          (_CMU_CALCTRL_DOWNSEL_HFXO << 4)

 #define CMU_CALCTRL_DOWNSEL_LFXO                          (_CMU_CALCTRL_DOWNSEL_LFXO << 4)

 #define CMU_CALCTRL_DOWNSEL_HFRCO                         (_CMU_CALCTRL_DOWNSEL_HFRCO << 4)

 #define CMU_CALCTRL_DOWNSEL_LFRCO                         (_CMU_CALCTRL_DOWNSEL_LFRCO << 4)

 #define CMU_CALCTRL_DOWNSEL_AUXHFRCO                      (_CMU_CALCTRL_DOWNSEL_AUXHFRCO << 4)

 #define CMU_CALCTRL_DOWNSEL_PRS                           (_CMU_CALCTRL_DOWNSEL_PRS << 4)

 #define CMU_CALCTRL_CONT                                  (0x1UL << 8)

 #define _CMU_CALCTRL_CONT_SHIFT                           8

 #define _CMU_CALCTRL_CONT_MASK                            0x100UL

 #define _CMU_CALCTRL_CONT_DEFAULT                         0x00000000UL

 #define CMU_CALCTRL_CONT_DEFAULT                          (_CMU_CALCTRL_CONT_DEFAULT << 8)

 #define _CMU_CALCTRL_PRSUPSEL_SHIFT                       16

 #define _CMU_CALCTRL_PRSUPSEL_MASK                        0xF0000UL

 #define _CMU_CALCTRL_PRSUPSEL_DEFAULT                     0x00000000UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH0                      0x00000000UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH1                      0x00000001UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH2                      0x00000002UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH3                      0x00000003UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH4                      0x00000004UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH5                      0x00000005UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH6                      0x00000006UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH7                      0x00000007UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH8                      0x00000008UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH9                      0x00000009UL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH10                     0x0000000AUL

 #define _CMU_CALCTRL_PRSUPSEL_PRSCH11                     0x0000000BUL

 #define CMU_CALCTRL_PRSUPSEL_DEFAULT                      (_CMU_CALCTRL_PRSUPSEL_DEFAULT << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH0                       (_CMU_CALCTRL_PRSUPSEL_PRSCH0 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH1                       (_CMU_CALCTRL_PRSUPSEL_PRSCH1 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH2                       (_CMU_CALCTRL_PRSUPSEL_PRSCH2 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH3                       (_CMU_CALCTRL_PRSUPSEL_PRSCH3 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH4                       (_CMU_CALCTRL_PRSUPSEL_PRSCH4 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH5                       (_CMU_CALCTRL_PRSUPSEL_PRSCH5 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH6                       (_CMU_CALCTRL_PRSUPSEL_PRSCH6 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH7                       (_CMU_CALCTRL_PRSUPSEL_PRSCH7 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH8                       (_CMU_CALCTRL_PRSUPSEL_PRSCH8 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH9                       (_CMU_CALCTRL_PRSUPSEL_PRSCH9 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH10                      (_CMU_CALCTRL_PRSUPSEL_PRSCH10 << 16)

 #define CMU_CALCTRL_PRSUPSEL_PRSCH11                      (_CMU_CALCTRL_PRSUPSEL_PRSCH11 << 16)

 #define _CMU_CALCTRL_PRSDOWNSEL_SHIFT                     24

 #define _CMU_CALCTRL_PRSDOWNSEL_MASK                      0xF000000UL

 #define _CMU_CALCTRL_PRSDOWNSEL_DEFAULT                   0x00000000UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH0                    0x00000000UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH1                    0x00000001UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH2                    0x00000002UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH3                    0x00000003UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH4                    0x00000004UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH5                    0x00000005UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH6                    0x00000006UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH7                    0x00000007UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH8                    0x00000008UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH9                    0x00000009UL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH10                   0x0000000AUL

 #define _CMU_CALCTRL_PRSDOWNSEL_PRSCH11                   0x0000000BUL

 #define CMU_CALCTRL_PRSDOWNSEL_DEFAULT                    (_CMU_CALCTRL_PRSDOWNSEL_DEFAULT << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH0                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH0 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH1                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH1 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH2                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH2 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH3                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH3 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH4                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH4 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH5                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH5 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH6                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH6 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH7                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH7 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH8                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH8 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH9                     (_CMU_CALCTRL_PRSDOWNSEL_PRSCH9 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH10                    (_CMU_CALCTRL_PRSDOWNSEL_PRSCH10 << 24)

 #define CMU_CALCTRL_PRSDOWNSEL_PRSCH11                    (_CMU_CALCTRL_PRSDOWNSEL_PRSCH11 << 24)

 /* Bit fields for CMU CALCNT */

 #define _CMU_CALCNT_RESETVALUE                            0x00000000UL

 #define _CMU_CALCNT_MASK                                  0x000FFFFFUL

 #define _CMU_CALCNT_CALCNT_SHIFT                          0

 #define _CMU_CALCNT_CALCNT_MASK                           0xFFFFFUL

 #define _CMU_CALCNT_CALCNT_DEFAULT                        0x00000000UL

 #define CMU_CALCNT_CALCNT_DEFAULT                         (_CMU_CALCNT_CALCNT_DEFAULT << 0)

 /* Bit fields for CMU OSCENCMD */

 #define _CMU_OSCENCMD_RESETVALUE                          0x00000000UL

 #define _CMU_OSCENCMD_MASK                                0x000033FFUL

 #define CMU_OSCENCMD_HFRCOEN                              (0x1UL << 0)

 #define _CMU_OSCENCMD_HFRCOEN_SHIFT                       0

 #define _CMU_OSCENCMD_HFRCOEN_MASK                        0x1UL

 #define _CMU_OSCENCMD_HFRCOEN_DEFAULT                     0x00000000UL

 #define CMU_OSCENCMD_HFRCOEN_DEFAULT                      (_CMU_OSCENCMD_HFRCOEN_DEFAULT << 0)

 #define CMU_OSCENCMD_HFRCODIS                             (0x1UL << 1)

 #define _CMU_OSCENCMD_HFRCODIS_SHIFT                      1

 #define _CMU_OSCENCMD_HFRCODIS_MASK                       0x2UL

 #define _CMU_OSCENCMD_HFRCODIS_DEFAULT                    0x00000000UL

 #define CMU_OSCENCMD_HFRCODIS_DEFAULT                     (_CMU_OSCENCMD_HFRCODIS_DEFAULT << 1)

 #define CMU_OSCENCMD_HFXOEN                               (0x1UL << 2)

 #define _CMU_OSCENCMD_HFXOEN_SHIFT                        2

 #define _CMU_OSCENCMD_HFXOEN_MASK                         0x4UL

 #define _CMU_OSCENCMD_HFXOEN_DEFAULT                      0x00000000UL

 #define CMU_OSCENCMD_HFXOEN_DEFAULT                       (_CMU_OSCENCMD_HFXOEN_DEFAULT << 2)

 #define CMU_OSCENCMD_HFXODIS                              (0x1UL << 3)

 #define _CMU_OSCENCMD_HFXODIS_SHIFT                       3

 #define _CMU_OSCENCMD_HFXODIS_MASK                        0x8UL

 #define _CMU_OSCENCMD_HFXODIS_DEFAULT                     0x00000000UL

 #define CMU_OSCENCMD_HFXODIS_DEFAULT                      (_CMU_OSCENCMD_HFXODIS_DEFAULT << 3)

 #define CMU_OSCENCMD_AUXHFRCOEN                           (0x1UL << 4)

 #define _CMU_OSCENCMD_AUXHFRCOEN_SHIFT                    4

 #define _CMU_OSCENCMD_AUXHFRCOEN_MASK                     0x10UL

 #define _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT                  0x00000000UL

 #define CMU_OSCENCMD_AUXHFRCOEN_DEFAULT                   (_CMU_OSCENCMD_AUXHFRCOEN_DEFAULT << 4)

 #define CMU_OSCENCMD_AUXHFRCODIS                          (0x1UL << 5)

 #define _CMU_OSCENCMD_AUXHFRCODIS_SHIFT                   5

 #define _CMU_OSCENCMD_AUXHFRCODIS_MASK                    0x20UL

 #define _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT                 0x00000000UL

 #define CMU_OSCENCMD_AUXHFRCODIS_DEFAULT                  (_CMU_OSCENCMD_AUXHFRCODIS_DEFAULT << 5)

 #define CMU_OSCENCMD_LFRCOEN                              (0x1UL << 6)

 #define _CMU_OSCENCMD_LFRCOEN_SHIFT                       6

 #define _CMU_OSCENCMD_LFRCOEN_MASK                        0x40UL

 #define _CMU_OSCENCMD_LFRCOEN_DEFAULT                     0x00000000UL

 #define CMU_OSCENCMD_LFRCOEN_DEFAULT                      (_CMU_OSCENCMD_LFRCOEN_DEFAULT << 6)

 #define CMU_OSCENCMD_LFRCODIS                             (0x1UL << 7)

 #define _CMU_OSCENCMD_LFRCODIS_SHIFT                      7

 #define _CMU_OSCENCMD_LFRCODIS_MASK                       0x80UL

 #define _CMU_OSCENCMD_LFRCODIS_DEFAULT                    0x00000000UL

 #define CMU_OSCENCMD_LFRCODIS_DEFAULT                     (_CMU_OSCENCMD_LFRCODIS_DEFAULT << 7)

 #define CMU_OSCENCMD_LFXOEN                               (0x1UL << 8)

 #define _CMU_OSCENCMD_LFXOEN_SHIFT                        8

 #define _CMU_OSCENCMD_LFXOEN_MASK                         0x100UL

 #define _CMU_OSCENCMD_LFXOEN_DEFAULT                      0x00000000UL

 #define CMU_OSCENCMD_LFXOEN_DEFAULT                       (_CMU_OSCENCMD_LFXOEN_DEFAULT << 8)

 #define CMU_OSCENCMD_LFXODIS                              (0x1UL << 9)

 #define _CMU_OSCENCMD_LFXODIS_SHIFT                       9

 #define _CMU_OSCENCMD_LFXODIS_MASK                        0x200UL

 #define _CMU_OSCENCMD_LFXODIS_DEFAULT                     0x00000000UL

 #define CMU_OSCENCMD_LFXODIS_DEFAULT                      (_CMU_OSCENCMD_LFXODIS_DEFAULT << 9)

 #define CMU_OSCENCMD_DPLLEN                               (0x1UL << 12)

 #define _CMU_OSCENCMD_DPLLEN_SHIFT                        12

 #define _CMU_OSCENCMD_DPLLEN_MASK                         0x1000UL

 #define _CMU_OSCENCMD_DPLLEN_DEFAULT                      0x00000000UL

 #define CMU_OSCENCMD_DPLLEN_DEFAULT                       (_CMU_OSCENCMD_DPLLEN_DEFAULT << 12)

 #define CMU_OSCENCMD_DPLLDIS                              (0x1UL << 13)

 #define _CMU_OSCENCMD_DPLLDIS_SHIFT                       13

 #define _CMU_OSCENCMD_DPLLDIS_MASK                        0x2000UL

 #define _CMU_OSCENCMD_DPLLDIS_DEFAULT                     0x00000000UL

 #define CMU_OSCENCMD_DPLLDIS_DEFAULT                      (_CMU_OSCENCMD_DPLLDIS_DEFAULT << 13)

 /* Bit fields for CMU CMD */

 #define _CMU_CMD_RESETVALUE                               0x00000000UL

 #define _CMU_CMD_MASK                                     0x00000033UL

 #define CMU_CMD_CALSTART                                  (0x1UL << 0)

 #define _CMU_CMD_CALSTART_SHIFT                           0

 #define _CMU_CMD_CALSTART_MASK                            0x1UL

 #define _CMU_CMD_CALSTART_DEFAULT                         0x00000000UL

 #define CMU_CMD_CALSTART_DEFAULT                          (_CMU_CMD_CALSTART_DEFAULT << 0)

 #define CMU_CMD_CALSTOP                                   (0x1UL << 1)

 #define _CMU_CMD_CALSTOP_SHIFT                            1

 #define _CMU_CMD_CALSTOP_MASK                             0x2UL

 #define _CMU_CMD_CALSTOP_DEFAULT                          0x00000000UL

 #define CMU_CMD_CALSTOP_DEFAULT                           (_CMU_CMD_CALSTOP_DEFAULT << 1)

 #define CMU_CMD_HFXOPEAKDETSTART                          (0x1UL << 4)

 #define _CMU_CMD_HFXOPEAKDETSTART_SHIFT                   4

 #define _CMU_CMD_HFXOPEAKDETSTART_MASK                    0x10UL

 #define _CMU_CMD_HFXOPEAKDETSTART_DEFAULT                 0x00000000UL

 #define CMU_CMD_HFXOPEAKDETSTART_DEFAULT                  (_CMU_CMD_HFXOPEAKDETSTART_DEFAULT << 4)

 #define CMU_CMD_HFXOSHUNTOPTSTART                         (0x1UL << 5)

 #define _CMU_CMD_HFXOSHUNTOPTSTART_SHIFT                  5

 #define _CMU_CMD_HFXOSHUNTOPTSTART_MASK                   0x20UL

 #define _CMU_CMD_HFXOSHUNTOPTSTART_DEFAULT                0x00000000UL

 #define CMU_CMD_HFXOSHUNTOPTSTART_DEFAULT                 (_CMU_CMD_HFXOSHUNTOPTSTART_DEFAULT << 5)

 /* Bit fields for CMU DBGCLKSEL */

 #define _CMU_DBGCLKSEL_RESETVALUE                         0x00000000UL

 #define _CMU_DBGCLKSEL_MASK                               0x00000001UL

 #define _CMU_DBGCLKSEL_DBG_SHIFT                          0

 #define _CMU_DBGCLKSEL_DBG_MASK                           0x1UL

 #define _CMU_DBGCLKSEL_DBG_DEFAULT                        0x00000000UL

 #define _CMU_DBGCLKSEL_DBG_AUXHFRCO                       0x00000000UL

 #define _CMU_DBGCLKSEL_DBG_HFCLK                          0x00000001UL

 #define CMU_DBGCLKSEL_DBG_DEFAULT                         (_CMU_DBGCLKSEL_DBG_DEFAULT << 0)

 #define CMU_DBGCLKSEL_DBG_AUXHFRCO                        (_CMU_DBGCLKSEL_DBG_AUXHFRCO << 0)

 #define CMU_DBGCLKSEL_DBG_HFCLK                           (_CMU_DBGCLKSEL_DBG_HFCLK << 0)

 /* Bit fields for CMU HFCLKSEL */

 #define _CMU_HFCLKSEL_RESETVALUE                          0x00000000UL

 #define _CMU_HFCLKSEL_MASK                                0x00000007UL

 #define _CMU_HFCLKSEL_HF_SHIFT                            0

 #define _CMU_HFCLKSEL_HF_MASK                             0x7UL

 #define _CMU_HFCLKSEL_HF_DEFAULT                          0x00000000UL

 #define _CMU_HFCLKSEL_HF_HFRCO                            0x00000001UL

 #define _CMU_HFCLKSEL_HF_HFXO                             0x00000002UL

 #define _CMU_HFCLKSEL_HF_LFRCO                            0x00000003UL

 #define _CMU_HFCLKSEL_HF_LFXO                             0x00000004UL

 #define _CMU_HFCLKSEL_HF_HFRCODIV2                        0x00000005UL

 #define _CMU_HFCLKSEL_HF_CLKIN0                           0x00000007UL

 #define CMU_HFCLKSEL_HF_DEFAULT                           (_CMU_HFCLKSEL_HF_DEFAULT << 0)

 #define CMU_HFCLKSEL_HF_HFRCO                             (_CMU_HFCLKSEL_HF_HFRCO << 0)

 #define CMU_HFCLKSEL_HF_HFXO                              (_CMU_HFCLKSEL_HF_HFXO << 0)

 #define CMU_HFCLKSEL_HF_LFRCO                             (_CMU_HFCLKSEL_HF_LFRCO << 0)

 #define CMU_HFCLKSEL_HF_LFXO                              (_CMU_HFCLKSEL_HF_LFXO << 0)

 #define CMU_HFCLKSEL_HF_HFRCODIV2                         (_CMU_HFCLKSEL_HF_HFRCODIV2 << 0)

 #define CMU_HFCLKSEL_HF_CLKIN0                            (_CMU_HFCLKSEL_HF_CLKIN0 << 0)

 /* Bit fields for CMU LFACLKSEL */

 #define _CMU_LFACLKSEL_RESETVALUE                         0x00000000UL

 #define _CMU_LFACLKSEL_MASK                               0x00000007UL

 #define _CMU_LFACLKSEL_LFA_SHIFT                          0

 #define _CMU_LFACLKSEL_LFA_MASK                           0x7UL

 #define _CMU_LFACLKSEL_LFA_DEFAULT                        0x00000000UL

 #define _CMU_LFACLKSEL_LFA_DISABLED                       0x00000000UL

 #define _CMU_LFACLKSEL_LFA_LFRCO                          0x00000001UL

 #define _CMU_LFACLKSEL_LFA_LFXO                           0x00000002UL

 #define _CMU_LFACLKSEL_LFA_ULFRCO                         0x00000004UL

 #define CMU_LFACLKSEL_LFA_DEFAULT                         (_CMU_LFACLKSEL_LFA_DEFAULT << 0)

 #define CMU_LFACLKSEL_LFA_DISABLED                        (_CMU_LFACLKSEL_LFA_DISABLED << 0)

 #define CMU_LFACLKSEL_LFA_LFRCO                           (_CMU_LFACLKSEL_LFA_LFRCO << 0)

 #define CMU_LFACLKSEL_LFA_LFXO                            (_CMU_LFACLKSEL_LFA_LFXO << 0)

 #define CMU_LFACLKSEL_LFA_ULFRCO                          (_CMU_LFACLKSEL_LFA_ULFRCO << 0)

 /* Bit fields for CMU LFBCLKSEL */

 #define _CMU_LFBCLKSEL_RESETVALUE                         0x00000000UL

 #define _CMU_LFBCLKSEL_MASK                               0x00000007UL

 #define _CMU_LFBCLKSEL_LFB_SHIFT                          0

 #define _CMU_LFBCLKSEL_LFB_MASK                           0x7UL

 #define _CMU_LFBCLKSEL_LFB_DEFAULT                        0x00000000UL

 #define _CMU_LFBCLKSEL_LFB_DISABLED                       0x00000000UL

 #define _CMU_LFBCLKSEL_LFB_LFRCO                          0x00000001UL

 #define _CMU_LFBCLKSEL_LFB_LFXO                           0x00000002UL

 #define _CMU_LFBCLKSEL_LFB_HFCLKLE                        0x00000003UL

 #define _CMU_LFBCLKSEL_LFB_ULFRCO                         0x00000004UL

 #define CMU_LFBCLKSEL_LFB_DEFAULT                         (_CMU_LFBCLKSEL_LFB_DEFAULT << 0)

 #define CMU_LFBCLKSEL_LFB_DISABLED                        (_CMU_LFBCLKSEL_LFB_DISABLED << 0)

 #define CMU_LFBCLKSEL_LFB_LFRCO                           (_CMU_LFBCLKSEL_LFB_LFRCO << 0)

 #define CMU_LFBCLKSEL_LFB_LFXO                            (_CMU_LFBCLKSEL_LFB_LFXO << 0)

 #define CMU_LFBCLKSEL_LFB_HFCLKLE                         (_CMU_LFBCLKSEL_LFB_HFCLKLE << 0)

 #define CMU_LFBCLKSEL_LFB_ULFRCO                          (_CMU_LFBCLKSEL_LFB_ULFRCO << 0)

 /* Bit fields for CMU LFECLKSEL */

 #define _CMU_LFECLKSEL_RESETVALUE                         0x00000000UL

 #define _CMU_LFECLKSEL_MASK                               0x00000007UL

 #define _CMU_LFECLKSEL_LFE_SHIFT                          0

 #define _CMU_LFECLKSEL_LFE_MASK                           0x7UL

 #define _CMU_LFECLKSEL_LFE_DEFAULT                        0x00000000UL

 #define _CMU_LFECLKSEL_LFE_DISABLED                       0x00000000UL

 #define _CMU_LFECLKSEL_LFE_LFRCO                          0x00000001UL

 #define _CMU_LFECLKSEL_LFE_LFXO                           0x00000002UL

 #define _CMU_LFECLKSEL_LFE_ULFRCO                         0x00000004UL

 #define CMU_LFECLKSEL_LFE_DEFAULT                         (_CMU_LFECLKSEL_LFE_DEFAULT << 0)

 #define CMU_LFECLKSEL_LFE_DISABLED                        (_CMU_LFECLKSEL_LFE_DISABLED << 0)

 #define CMU_LFECLKSEL_LFE_LFRCO                           (_CMU_LFECLKSEL_LFE_LFRCO << 0)

 #define CMU_LFECLKSEL_LFE_LFXO                            (_CMU_LFECLKSEL_LFE_LFXO << 0)

 #define CMU_LFECLKSEL_LFE_ULFRCO                          (_CMU_LFECLKSEL_LFE_ULFRCO << 0)

 /* Bit fields for CMU STATUS */

 #define _CMU_STATUS_RESETVALUE                            0x00010003UL

 #define _CMU_STATUS_MASK                                  0x3FE133FFUL

 #define CMU_STATUS_HFRCOENS                               (0x1UL << 0)

 #define _CMU_STATUS_HFRCOENS_SHIFT                        0

 #define _CMU_STATUS_HFRCOENS_MASK                         0x1UL

 #define _CMU_STATUS_HFRCOENS_DEFAULT                      0x00000001UL

 #define CMU_STATUS_HFRCOENS_DEFAULT                       (_CMU_STATUS_HFRCOENS_DEFAULT << 0)

 #define CMU_STATUS_HFRCORDY                               (0x1UL << 1)

 #define _CMU_STATUS_HFRCORDY_SHIFT                        1

 #define _CMU_STATUS_HFRCORDY_MASK                         0x2UL

 #define _CMU_STATUS_HFRCORDY_DEFAULT                      0x00000001UL

 #define CMU_STATUS_HFRCORDY_DEFAULT                       (_CMU_STATUS_HFRCORDY_DEFAULT << 1)

 #define CMU_STATUS_HFXOENS                                (0x1UL << 2)

 #define _CMU_STATUS_HFXOENS_SHIFT                         2

 #define _CMU_STATUS_HFXOENS_MASK                          0x4UL

 #define _CMU_STATUS_HFXOENS_DEFAULT                       0x00000000UL

 #define CMU_STATUS_HFXOENS_DEFAULT                        (_CMU_STATUS_HFXOENS_DEFAULT << 2)

 #define CMU_STATUS_HFXORDY                                (0x1UL << 3)

 #define _CMU_STATUS_HFXORDY_SHIFT                         3

 #define _CMU_STATUS_HFXORDY_MASK                          0x8UL

 #define _CMU_STATUS_HFXORDY_DEFAULT                       0x00000000UL

 #define CMU_STATUS_HFXORDY_DEFAULT                        (_CMU_STATUS_HFXORDY_DEFAULT << 3)

 #define CMU_STATUS_AUXHFRCOENS                            (0x1UL << 4)

 #define _CMU_STATUS_AUXHFRCOENS_SHIFT                     4

 #define _CMU_STATUS_AUXHFRCOENS_MASK                      0x10UL

 #define _CMU_STATUS_AUXHFRCOENS_DEFAULT                   0x00000000UL

 #define CMU_STATUS_AUXHFRCOENS_DEFAULT                    (_CMU_STATUS_AUXHFRCOENS_DEFAULT << 4)

 #define CMU_STATUS_AUXHFRCORDY                            (0x1UL << 5)

 #define _CMU_STATUS_AUXHFRCORDY_SHIFT                     5

 #define _CMU_STATUS_AUXHFRCORDY_MASK                      0x20UL

 #define _CMU_STATUS_AUXHFRCORDY_DEFAULT                   0x00000000UL

 #define CMU_STATUS_AUXHFRCORDY_DEFAULT                    (_CMU_STATUS_AUXHFRCORDY_DEFAULT << 5)

 #define CMU_STATUS_LFRCOENS                               (0x1UL << 6)

 #define _CMU_STATUS_LFRCOENS_SHIFT                        6

 #define _CMU_STATUS_LFRCOENS_MASK                         0x40UL

 #define _CMU_STATUS_LFRCOENS_DEFAULT                      0x00000000UL

 #define CMU_STATUS_LFRCOENS_DEFAULT                       (_CMU_STATUS_LFRCOENS_DEFAULT << 6)

 #define CMU_STATUS_LFRCORDY                               (0x1UL << 7)

 #define _CMU_STATUS_LFRCORDY_SHIFT                        7

 #define _CMU_STATUS_LFRCORDY_MASK                         0x80UL

 #define _CMU_STATUS_LFRCORDY_DEFAULT                      0x00000000UL

 #define CMU_STATUS_LFRCORDY_DEFAULT                       (_CMU_STATUS_LFRCORDY_DEFAULT << 7)

 #define CMU_STATUS_LFXOENS                                (0x1UL << 8)

 #define _CMU_STATUS_LFXOENS_SHIFT                         8

 #define _CMU_STATUS_LFXOENS_MASK                          0x100UL

 #define _CMU_STATUS_LFXOENS_DEFAULT                       0x00000000UL

 #define CMU_STATUS_LFXOENS_DEFAULT                        (_CMU_STATUS_LFXOENS_DEFAULT << 8)

 #define CMU_STATUS_LFXORDY                                (0x1UL << 9)

 #define _CMU_STATUS_LFXORDY_SHIFT                         9

 #define _CMU_STATUS_LFXORDY_MASK                          0x200UL

 #define _CMU_STATUS_LFXORDY_DEFAULT                       0x00000000UL

 #define CMU_STATUS_LFXORDY_DEFAULT                        (_CMU_STATUS_LFXORDY_DEFAULT << 9)

 #define CMU_STATUS_DPLLENS                                (0x1UL << 12)

 #define _CMU_STATUS_DPLLENS_SHIFT                         12

 #define _CMU_STATUS_DPLLENS_MASK                          0x1000UL

 #define _CMU_STATUS_DPLLENS_DEFAULT                       0x00000000UL

 #define CMU_STATUS_DPLLENS_DEFAULT                        (_CMU_STATUS_DPLLENS_DEFAULT << 12)

 #define CMU_STATUS_DPLLRDY                                (0x1UL << 13)

 #define _CMU_STATUS_DPLLRDY_SHIFT                         13

 #define _CMU_STATUS_DPLLRDY_MASK                          0x2000UL

 #define _CMU_STATUS_DPLLRDY_DEFAULT                       0x00000000UL

 #define CMU_STATUS_DPLLRDY_DEFAULT                        (_CMU_STATUS_DPLLRDY_DEFAULT << 13)

 #define CMU_STATUS_CALRDY                                 (0x1UL << 16)

 #define _CMU_STATUS_CALRDY_SHIFT                          16

 #define _CMU_STATUS_CALRDY_MASK                           0x10000UL

 #define _CMU_STATUS_CALRDY_DEFAULT                        0x00000001UL

 #define CMU_STATUS_CALRDY_DEFAULT                         (_CMU_STATUS_CALRDY_DEFAULT << 16)

 #define CMU_STATUS_HFXOREQ                                (0x1UL << 21)

 #define _CMU_STATUS_HFXOREQ_SHIFT                         21

 #define _CMU_STATUS_HFXOREQ_MASK                          0x200000UL

 #define _CMU_STATUS_HFXOREQ_DEFAULT                       0x00000000UL

 #define CMU_STATUS_HFXOREQ_DEFAULT                        (_CMU_STATUS_HFXOREQ_DEFAULT << 21)

 #define CMU_STATUS_HFXOPEAKDETRDY                         (0x1UL << 22)

 #define _CMU_STATUS_HFXOPEAKDETRDY_SHIFT                  22

 #define _CMU_STATUS_HFXOPEAKDETRDY_MASK                   0x400000UL

 #define _CMU_STATUS_HFXOPEAKDETRDY_DEFAULT                0x00000000UL

 #define CMU_STATUS_HFXOPEAKDETRDY_DEFAULT                 (_CMU_STATUS_HFXOPEAKDETRDY_DEFAULT << 22)

 #define CMU_STATUS_HFXOSHUNTOPTRDY                        (0x1UL << 23)

 #define _CMU_STATUS_HFXOSHUNTOPTRDY_SHIFT                 23

 #define _CMU_STATUS_HFXOSHUNTOPTRDY_MASK                  0x800000UL

 #define _CMU_STATUS_HFXOSHUNTOPTRDY_DEFAULT               0x00000000UL

 #define CMU_STATUS_HFXOSHUNTOPTRDY_DEFAULT                (_CMU_STATUS_HFXOSHUNTOPTRDY_DEFAULT << 23)

 #define CMU_STATUS_HFXOAMPHIGH                            (0x1UL << 24)

 #define _CMU_STATUS_HFXOAMPHIGH_SHIFT                     24

 #define _CMU_STATUS_HFXOAMPHIGH_MASK                      0x1000000UL

 #define _CMU_STATUS_HFXOAMPHIGH_DEFAULT                   0x00000000UL

 #define CMU_STATUS_HFXOAMPHIGH_DEFAULT                    (_CMU_STATUS_HFXOAMPHIGH_DEFAULT << 24)

 #define CMU_STATUS_HFXOAMPLOW                             (0x1UL << 25)

 #define _CMU_STATUS_HFXOAMPLOW_SHIFT                      25

 #define _CMU_STATUS_HFXOAMPLOW_MASK                       0x2000000UL

 #define _CMU_STATUS_HFXOAMPLOW_DEFAULT                    0x00000000UL

 #define CMU_STATUS_HFXOAMPLOW_DEFAULT                     (_CMU_STATUS_HFXOAMPLOW_DEFAULT << 25)

 #define CMU_STATUS_HFXOREGILOW                            (0x1UL << 26)

 #define _CMU_STATUS_HFXOREGILOW_SHIFT                     26

 #define _CMU_STATUS_HFXOREGILOW_MASK                      0x4000000UL

 #define _CMU_STATUS_HFXOREGILOW_DEFAULT                   0x00000000UL

 #define CMU_STATUS_HFXOREGILOW_DEFAULT                    (_CMU_STATUS_HFXOREGILOW_DEFAULT << 26)

 #define CMU_STATUS_LFXOPHASE                              (0x1UL << 27)

 #define _CMU_STATUS_LFXOPHASE_SHIFT                       27

 #define _CMU_STATUS_LFXOPHASE_MASK                        0x8000000UL

 #define _CMU_STATUS_LFXOPHASE_DEFAULT                     0x00000000UL

 #define CMU_STATUS_LFXOPHASE_DEFAULT                      (_CMU_STATUS_LFXOPHASE_DEFAULT << 27)

 #define CMU_STATUS_LFRCOPHASE                             (0x1UL << 28)

 #define _CMU_STATUS_LFRCOPHASE_SHIFT                      28

 #define _CMU_STATUS_LFRCOPHASE_MASK                       0x10000000UL

 #define _CMU_STATUS_LFRCOPHASE_DEFAULT                    0x00000000UL

 #define CMU_STATUS_LFRCOPHASE_DEFAULT                     (_CMU_STATUS_LFRCOPHASE_DEFAULT << 28)

 #define CMU_STATUS_ULFRCOPHASE                            (0x1UL << 29)

 #define _CMU_STATUS_ULFRCOPHASE_SHIFT                     29

 #define _CMU_STATUS_ULFRCOPHASE_MASK                      0x20000000UL

 #define _CMU_STATUS_ULFRCOPHASE_DEFAULT                   0x00000000UL

 #define CMU_STATUS_ULFRCOPHASE_DEFAULT                    (_CMU_STATUS_ULFRCOPHASE_DEFAULT << 29)

 /* Bit fields for CMU HFCLKSTATUS */

 #define _CMU_HFCLKSTATUS_RESETVALUE                       0x00000001UL

 #define _CMU_HFCLKSTATUS_MASK                             0x00000007UL

 #define _CMU_HFCLKSTATUS_SELECTED_SHIFT                   0

 #define _CMU_HFCLKSTATUS_SELECTED_MASK                    0x7UL

 #define _CMU_HFCLKSTATUS_SELECTED_DEFAULT                 0x00000001UL

 #define _CMU_HFCLKSTATUS_SELECTED_HFRCO                   0x00000001UL

 #define _CMU_HFCLKSTATUS_SELECTED_HFXO                    0x00000002UL

 #define _CMU_HFCLKSTATUS_SELECTED_LFRCO                   0x00000003UL

 #define _CMU_HFCLKSTATUS_SELECTED_LFXO                    0x00000004UL

 #define _CMU_HFCLKSTATUS_SELECTED_HFRCODIV2               0x00000005UL

 #define _CMU_HFCLKSTATUS_SELECTED_CLKIN0                  0x00000007UL

 #define CMU_HFCLKSTATUS_SELECTED_DEFAULT                  (_CMU_HFCLKSTATUS_SELECTED_DEFAULT << 0)

 #define CMU_HFCLKSTATUS_SELECTED_HFRCO                    (_CMU_HFCLKSTATUS_SELECTED_HFRCO << 0)

 #define CMU_HFCLKSTATUS_SELECTED_HFXO                     (_CMU_HFCLKSTATUS_SELECTED_HFXO << 0)

 #define CMU_HFCLKSTATUS_SELECTED_LFRCO                    (_CMU_HFCLKSTATUS_SELECTED_LFRCO << 0)

 #define CMU_HFCLKSTATUS_SELECTED_LFXO                     (_CMU_HFCLKSTATUS_SELECTED_LFXO << 0)

 #define CMU_HFCLKSTATUS_SELECTED_HFRCODIV2                (_CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 << 0)

 #define CMU_HFCLKSTATUS_SELECTED_CLKIN0                   (_CMU_HFCLKSTATUS_SELECTED_CLKIN0 << 0)

 /* Bit fields for CMU HFXOTRIMSTATUS */

 #define _CMU_HFXOTRIMSTATUS_RESETVALUE                    0x00000500UL

 #define _CMU_HFXOTRIMSTATUS_MASK                          0x000007FFUL

 #define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_SHIFT            0

 #define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK             0x7FUL

 #define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT          0x00000000UL

 #define CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT           (_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT << 0)

 #define _CMU_HFXOTRIMSTATUS_REGISH_SHIFT                  7

 #define _CMU_HFXOTRIMSTATUS_REGISH_MASK                   0x780UL

 #define _CMU_HFXOTRIMSTATUS_REGISH_DEFAULT                0x0000000AUL

 #define CMU_HFXOTRIMSTATUS_REGISH_DEFAULT                 (_CMU_HFXOTRIMSTATUS_REGISH_DEFAULT << 7)

 /* Bit fields for CMU IF */

 #define _CMU_IF_RESETVALUE                                0x00000001UL

 #define _CMU_IF_MASK                                      0xB803FF7FUL

 #define CMU_IF_HFRCORDY                                   (0x1UL << 0)

 #define _CMU_IF_HFRCORDY_SHIFT                            0

 #define _CMU_IF_HFRCORDY_MASK                             0x1UL

 #define _CMU_IF_HFRCORDY_DEFAULT                          0x00000001UL

 #define CMU_IF_HFRCORDY_DEFAULT                           (_CMU_IF_HFRCORDY_DEFAULT << 0)

 #define CMU_IF_HFXORDY                                    (0x1UL << 1)

 #define _CMU_IF_HFXORDY_SHIFT                             1

 #define _CMU_IF_HFXORDY_MASK                              0x2UL

 #define _CMU_IF_HFXORDY_DEFAULT                           0x00000000UL

 #define CMU_IF_HFXORDY_DEFAULT                            (_CMU_IF_HFXORDY_DEFAULT << 1)

 #define CMU_IF_LFRCORDY                                   (0x1UL << 2)

 #define _CMU_IF_LFRCORDY_SHIFT                            2

 #define _CMU_IF_LFRCORDY_MASK                             0x4UL

 #define _CMU_IF_LFRCORDY_DEFAULT                          0x00000000UL

 #define CMU_IF_LFRCORDY_DEFAULT                           (_CMU_IF_LFRCORDY_DEFAULT << 2)

 #define CMU_IF_LFXORDY                                    (0x1UL << 3)

 #define _CMU_IF_LFXORDY_SHIFT                             3

 #define _CMU_IF_LFXORDY_MASK                              0x8UL

 #define _CMU_IF_LFXORDY_DEFAULT                           0x00000000UL

 #define CMU_IF_LFXORDY_DEFAULT                            (_CMU_IF_LFXORDY_DEFAULT << 3)

 #define CMU_IF_AUXHFRCORDY                                (0x1UL << 4)

 #define _CMU_IF_AUXHFRCORDY_SHIFT                         4

 #define _CMU_IF_AUXHFRCORDY_MASK                          0x10UL

 #define _CMU_IF_AUXHFRCORDY_DEFAULT                       0x00000000UL

 #define CMU_IF_AUXHFRCORDY_DEFAULT                        (_CMU_IF_AUXHFRCORDY_DEFAULT << 4)

 #define CMU_IF_CALRDY                                     (0x1UL << 5)

 #define _CMU_IF_CALRDY_SHIFT                              5

 #define _CMU_IF_CALRDY_MASK                               0x20UL

 #define _CMU_IF_CALRDY_DEFAULT                            0x00000000UL

 #define CMU_IF_CALRDY_DEFAULT                             (_CMU_IF_CALRDY_DEFAULT << 5)

 #define CMU_IF_CALOF                                      (0x1UL << 6)

 #define _CMU_IF_CALOF_SHIFT                               6

 #define _CMU_IF_CALOF_MASK                                0x40UL

 #define _CMU_IF_CALOF_DEFAULT                             0x00000000UL

 #define CMU_IF_CALOF_DEFAULT                              (_CMU_IF_CALOF_DEFAULT << 6)

 #define CMU_IF_HFXODISERR                                 (0x1UL << 8)

 #define _CMU_IF_HFXODISERR_SHIFT                          8

 #define _CMU_IF_HFXODISERR_MASK                           0x100UL

 #define _CMU_IF_HFXODISERR_DEFAULT                        0x00000000UL

 #define CMU_IF_HFXODISERR_DEFAULT                         (_CMU_IF_HFXODISERR_DEFAULT << 8)

 #define CMU_IF_HFXOAUTOSW                                 (0x1UL << 9)

 #define _CMU_IF_HFXOAUTOSW_SHIFT                          9

 #define _CMU_IF_HFXOAUTOSW_MASK                           0x200UL

 #define _CMU_IF_HFXOAUTOSW_DEFAULT                        0x00000000UL

 #define CMU_IF_HFXOAUTOSW_DEFAULT                         (_CMU_IF_HFXOAUTOSW_DEFAULT << 9)

 #define CMU_IF_HFXOPEAKDETERR                             (0x1UL << 10)

 #define _CMU_IF_HFXOPEAKDETERR_SHIFT                      10

 #define _CMU_IF_HFXOPEAKDETERR_MASK                       0x400UL

 #define _CMU_IF_HFXOPEAKDETERR_DEFAULT                    0x00000000UL

 #define CMU_IF_HFXOPEAKDETERR_DEFAULT                     (_CMU_IF_HFXOPEAKDETERR_DEFAULT << 10)

 #define CMU_IF_HFXOPEAKDETRDY                             (0x1UL << 11)

 #define _CMU_IF_HFXOPEAKDETRDY_SHIFT                      11

 #define _CMU_IF_HFXOPEAKDETRDY_MASK                       0x800UL

 #define _CMU_IF_HFXOPEAKDETRDY_DEFAULT                    0x00000000UL

 #define CMU_IF_HFXOPEAKDETRDY_DEFAULT                     (_CMU_IF_HFXOPEAKDETRDY_DEFAULT << 11)

 #define CMU_IF_HFXOSHUNTOPTRDY                            (0x1UL << 12)

 #define _CMU_IF_HFXOSHUNTOPTRDY_SHIFT                     12

 #define _CMU_IF_HFXOSHUNTOPTRDY_MASK                      0x1000UL

 #define _CMU_IF_HFXOSHUNTOPTRDY_DEFAULT                   0x00000000UL

 #define CMU_IF_HFXOSHUNTOPTRDY_DEFAULT                    (_CMU_IF_HFXOSHUNTOPTRDY_DEFAULT << 12)

 #define CMU_IF_HFRCODIS                                   (0x1UL << 13)

 #define _CMU_IF_HFRCODIS_SHIFT                            13

 #define _CMU_IF_HFRCODIS_MASK                             0x2000UL

 #define _CMU_IF_HFRCODIS_DEFAULT                          0x00000000UL

 #define CMU_IF_HFRCODIS_DEFAULT                           (_CMU_IF_HFRCODIS_DEFAULT << 13)

 #define CMU_IF_LFTIMEOUTERR                               (0x1UL << 14)

 #define _CMU_IF_LFTIMEOUTERR_SHIFT                        14

 #define _CMU_IF_LFTIMEOUTERR_MASK                         0x4000UL

 #define _CMU_IF_LFTIMEOUTERR_DEFAULT                      0x00000000UL

 #define CMU_IF_LFTIMEOUTERR_DEFAULT                       (_CMU_IF_LFTIMEOUTERR_DEFAULT << 14)

 #define CMU_IF_DPLLRDY                                    (0x1UL << 15)

 #define _CMU_IF_DPLLRDY_SHIFT                             15

 #define _CMU_IF_DPLLRDY_MASK                              0x8000UL

 #define _CMU_IF_DPLLRDY_DEFAULT                           0x00000000UL

 #define CMU_IF_DPLLRDY_DEFAULT                            (_CMU_IF_DPLLRDY_DEFAULT << 15)

 #define CMU_IF_DPLLLOCKFAILLOW                            (0x1UL << 16)

 #define _CMU_IF_DPLLLOCKFAILLOW_SHIFT                     16

 #define _CMU_IF_DPLLLOCKFAILLOW_MASK                      0x10000UL

 #define _CMU_IF_DPLLLOCKFAILLOW_DEFAULT                   0x00000000UL

 #define CMU_IF_DPLLLOCKFAILLOW_DEFAULT                    (_CMU_IF_DPLLLOCKFAILLOW_DEFAULT << 16)

 #define CMU_IF_DPLLLOCKFAILHIGH                           (0x1UL << 17)

 #define _CMU_IF_DPLLLOCKFAILHIGH_SHIFT                    17

 #define _CMU_IF_DPLLLOCKFAILHIGH_MASK                     0x20000UL

 #define _CMU_IF_DPLLLOCKFAILHIGH_DEFAULT                  0x00000000UL

 #define CMU_IF_DPLLLOCKFAILHIGH_DEFAULT                   (_CMU_IF_DPLLLOCKFAILHIGH_DEFAULT << 17)

 #define CMU_IF_LFXOEDGE                                   (0x1UL << 27)

 #define _CMU_IF_LFXOEDGE_SHIFT                            27

 #define _CMU_IF_LFXOEDGE_MASK                             0x8000000UL

 #define _CMU_IF_LFXOEDGE_DEFAULT                          0x00000000UL

 #define CMU_IF_LFXOEDGE_DEFAULT                           (_CMU_IF_LFXOEDGE_DEFAULT << 27)

 #define CMU_IF_LFRCOEDGE                                  (0x1UL << 28)

 #define _CMU_IF_LFRCOEDGE_SHIFT                           28

 #define _CMU_IF_LFRCOEDGE_MASK                            0x10000000UL

 #define _CMU_IF_LFRCOEDGE_DEFAULT                         0x00000000UL

 #define CMU_IF_LFRCOEDGE_DEFAULT                          (_CMU_IF_LFRCOEDGE_DEFAULT << 28)

 #define CMU_IF_ULFRCOEDGE                                 (0x1UL << 29)

 #define _CMU_IF_ULFRCOEDGE_SHIFT                          29

 #define _CMU_IF_ULFRCOEDGE_MASK                           0x20000000UL

 #define _CMU_IF_ULFRCOEDGE_DEFAULT                        0x00000000UL

 #define CMU_IF_ULFRCOEDGE_DEFAULT                         (_CMU_IF_ULFRCOEDGE_DEFAULT << 29)

 #define CMU_IF_CMUERR                                     (0x1UL << 31)

 #define _CMU_IF_CMUERR_SHIFT                              31

 #define _CMU_IF_CMUERR_MASK                               0x80000000UL

 #define _CMU_IF_CMUERR_DEFAULT                            0x00000000UL

 #define CMU_IF_CMUERR_DEFAULT                             (_CMU_IF_CMUERR_DEFAULT << 31)

 /* Bit fields for CMU IFS */

 #define _CMU_IFS_RESETVALUE                               0x00000000UL

 #define _CMU_IFS_MASK                                     0xB803FF7FUL

 #define CMU_IFS_HFRCORDY                                  (0x1UL << 0)

 #define _CMU_IFS_HFRCORDY_SHIFT                           0

 #define _CMU_IFS_HFRCORDY_MASK                            0x1UL

 #define _CMU_IFS_HFRCORDY_DEFAULT                         0x00000000UL

 #define CMU_IFS_HFRCORDY_DEFAULT                          (_CMU_IFS_HFRCORDY_DEFAULT << 0)

 #define CMU_IFS_HFXORDY                                   (0x1UL << 1)

 #define _CMU_IFS_HFXORDY_SHIFT                            1

 #define _CMU_IFS_HFXORDY_MASK                             0x2UL

 #define _CMU_IFS_HFXORDY_DEFAULT                          0x00000000UL

 #define CMU_IFS_HFXORDY_DEFAULT                           (_CMU_IFS_HFXORDY_DEFAULT << 1)

 #define CMU_IFS_LFRCORDY                                  (0x1UL << 2)

 #define _CMU_IFS_LFRCORDY_SHIFT                           2

 #define _CMU_IFS_LFRCORDY_MASK                            0x4UL

 #define _CMU_IFS_LFRCORDY_DEFAULT                         0x00000000UL

 #define CMU_IFS_LFRCORDY_DEFAULT                          (_CMU_IFS_LFRCORDY_DEFAULT << 2)

 #define CMU_IFS_LFXORDY                                   (0x1UL << 3)

 #define _CMU_IFS_LFXORDY_SHIFT                            3

 #define _CMU_IFS_LFXORDY_MASK                             0x8UL

 #define _CMU_IFS_LFXORDY_DEFAULT                          0x00000000UL

 #define CMU_IFS_LFXORDY_DEFAULT                           (_CMU_IFS_LFXORDY_DEFAULT << 3)

 #define CMU_IFS_AUXHFRCORDY                               (0x1UL << 4)

 #define _CMU_IFS_AUXHFRCORDY_SHIFT                        4

 #define _CMU_IFS_AUXHFRCORDY_MASK                         0x10UL

 #define _CMU_IFS_AUXHFRCORDY_DEFAULT                      0x00000000UL

 #define CMU_IFS_AUXHFRCORDY_DEFAULT                       (_CMU_IFS_AUXHFRCORDY_DEFAULT << 4)

 #define CMU_IFS_CALRDY                                    (0x1UL << 5)

 #define _CMU_IFS_CALRDY_SHIFT                             5

 #define _CMU_IFS_CALRDY_MASK                              0x20UL

 #define _CMU_IFS_CALRDY_DEFAULT                           0x00000000UL

 #define CMU_IFS_CALRDY_DEFAULT                            (_CMU_IFS_CALRDY_DEFAULT << 5)

 #define CMU_IFS_CALOF                                     (0x1UL << 6)

 #define _CMU_IFS_CALOF_SHIFT                              6

 #define _CMU_IFS_CALOF_MASK                               0x40UL

 #define _CMU_IFS_CALOF_DEFAULT                            0x00000000UL

 #define CMU_IFS_CALOF_DEFAULT                             (_CMU_IFS_CALOF_DEFAULT << 6)

 #define CMU_IFS_HFXODISERR                                (0x1UL << 8)

 #define _CMU_IFS_HFXODISERR_SHIFT                         8

 #define _CMU_IFS_HFXODISERR_MASK                          0x100UL

 #define _CMU_IFS_HFXODISERR_DEFAULT                       0x00000000UL

 #define CMU_IFS_HFXODISERR_DEFAULT                        (_CMU_IFS_HFXODISERR_DEFAULT << 8)

 #define CMU_IFS_HFXOAUTOSW                                (0x1UL << 9)

 #define _CMU_IFS_HFXOAUTOSW_SHIFT                         9

 #define _CMU_IFS_HFXOAUTOSW_MASK                          0x200UL

 #define _CMU_IFS_HFXOAUTOSW_DEFAULT                       0x00000000UL

 #define CMU_IFS_HFXOAUTOSW_DEFAULT                        (_CMU_IFS_HFXOAUTOSW_DEFAULT << 9)

 #define CMU_IFS_HFXOPEAKDETERR                            (0x1UL << 10)

 #define _CMU_IFS_HFXOPEAKDETERR_SHIFT                     10

 #define _CMU_IFS_HFXOPEAKDETERR_MASK                      0x400UL

 #define _CMU_IFS_HFXOPEAKDETERR_DEFAULT                   0x00000000UL

 #define CMU_IFS_HFXOPEAKDETERR_DEFAULT                    (_CMU_IFS_HFXOPEAKDETERR_DEFAULT << 10)

 #define CMU_IFS_HFXOPEAKDETRDY                            (0x1UL << 11)

 #define _CMU_IFS_HFXOPEAKDETRDY_SHIFT                     11

 #define _CMU_IFS_HFXOPEAKDETRDY_MASK                      0x800UL

 #define _CMU_IFS_HFXOPEAKDETRDY_DEFAULT                   0x00000000UL

 #define CMU_IFS_HFXOPEAKDETRDY_DEFAULT                    (_CMU_IFS_HFXOPEAKDETRDY_DEFAULT << 11)

 #define CMU_IFS_HFXOSHUNTOPTRDY                           (0x1UL << 12)

 #define _CMU_IFS_HFXOSHUNTOPTRDY_SHIFT                    12

 #define _CMU_IFS_HFXOSHUNTOPTRDY_MASK                     0x1000UL

 #define _CMU_IFS_HFXOSHUNTOPTRDY_DEFAULT                  0x00000000UL

 #define CMU_IFS_HFXOSHUNTOPTRDY_DEFAULT                   (_CMU_IFS_HFXOSHUNTOPTRDY_DEFAULT << 12)

 #define CMU_IFS_HFRCODIS                                  (0x1UL << 13)

 #define _CMU_IFS_HFRCODIS_SHIFT                           13

 #define _CMU_IFS_HFRCODIS_MASK                            0x2000UL

 #define _CMU_IFS_HFRCODIS_DEFAULT                         0x00000000UL

 #define CMU_IFS_HFRCODIS_DEFAULT                          (_CMU_IFS_HFRCODIS_DEFAULT << 13)

 #define CMU_IFS_LFTIMEOUTERR                              (0x1UL << 14)

 #define _CMU_IFS_LFTIMEOUTERR_SHIFT                       14

 #define _CMU_IFS_LFTIMEOUTERR_MASK                        0x4000UL

 #define _CMU_IFS_LFTIMEOUTERR_DEFAULT                     0x00000000UL

 #define CMU_IFS_LFTIMEOUTERR_DEFAULT                      (_CMU_IFS_LFTIMEOUTERR_DEFAULT << 14)

 #define CMU_IFS_DPLLRDY                                   (0x1UL << 15)

 #define _CMU_IFS_DPLLRDY_SHIFT                            15

 #define _CMU_IFS_DPLLRDY_MASK                             0x8000UL

 #define _CMU_IFS_DPLLRDY_DEFAULT                          0x00000000UL

 #define CMU_IFS_DPLLRDY_DEFAULT                           (_CMU_IFS_DPLLRDY_DEFAULT << 15)

 #define CMU_IFS_DPLLLOCKFAILLOW                           (0x1UL << 16)

 #define _CMU_IFS_DPLLLOCKFAILLOW_SHIFT                    16

 #define _CMU_IFS_DPLLLOCKFAILLOW_MASK                     0x10000UL

 #define _CMU_IFS_DPLLLOCKFAILLOW_DEFAULT                  0x00000000UL

 #define CMU_IFS_DPLLLOCKFAILLOW_DEFAULT                   (_CMU_IFS_DPLLLOCKFAILLOW_DEFAULT << 16)

 #define CMU_IFS_DPLLLOCKFAILHIGH                          (0x1UL << 17)

 #define _CMU_IFS_DPLLLOCKFAILHIGH_SHIFT                   17

 #define _CMU_IFS_DPLLLOCKFAILHIGH_MASK                    0x20000UL

 #define _CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT                 0x00000000UL

 #define CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT                  (_CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT << 17)

 #define CMU_IFS_LFXOEDGE                                  (0x1UL << 27)

 #define _CMU_IFS_LFXOEDGE_SHIFT                           27

 #define _CMU_IFS_LFXOEDGE_MASK                            0x8000000UL

 #define _CMU_IFS_LFXOEDGE_DEFAULT                         0x00000000UL

 #define CMU_IFS_LFXOEDGE_DEFAULT                          (_CMU_IFS_LFXOEDGE_DEFAULT << 27)

 #define CMU_IFS_LFRCOEDGE                                 (0x1UL << 28)

 #define _CMU_IFS_LFRCOEDGE_SHIFT                          28

 #define _CMU_IFS_LFRCOEDGE_MASK                           0x10000000UL

 #define _CMU_IFS_LFRCOEDGE_DEFAULT                        0x00000000UL

 #define CMU_IFS_LFRCOEDGE_DEFAULT                         (_CMU_IFS_LFRCOEDGE_DEFAULT << 28)

 #define CMU_IFS_ULFRCOEDGE                                (0x1UL << 29)

 #define _CMU_IFS_ULFRCOEDGE_SHIFT                         29

 #define _CMU_IFS_ULFRCOEDGE_MASK                          0x20000000UL

 #define _CMU_IFS_ULFRCOEDGE_DEFAULT                       0x00000000UL

 #define CMU_IFS_ULFRCOEDGE_DEFAULT                        (_CMU_IFS_ULFRCOEDGE_DEFAULT << 29)

 #define CMU_IFS_CMUERR                                    (0x1UL << 31)

 #define _CMU_IFS_CMUERR_SHIFT                             31

 #define _CMU_IFS_CMUERR_MASK                              0x80000000UL

 #define _CMU_IFS_CMUERR_DEFAULT                           0x00000000UL

 #define CMU_IFS_CMUERR_DEFAULT                            (_CMU_IFS_CMUERR_DEFAULT << 31)

 /* Bit fields for CMU IFC */

 #define _CMU_IFC_RESETVALUE                               0x00000000UL

 #define _CMU_IFC_MASK                                     0xB803FF7FUL

 #define CMU_IFC_HFRCORDY                                  (0x1UL << 0)

 #define _CMU_IFC_HFRCORDY_SHIFT                           0

 #define _CMU_IFC_HFRCORDY_MASK                            0x1UL

 #define _CMU_IFC_HFRCORDY_DEFAULT                         0x00000000UL

 #define CMU_IFC_HFRCORDY_DEFAULT                          (_CMU_IFC_HFRCORDY_DEFAULT << 0)

 #define CMU_IFC_HFXORDY                                   (0x1UL << 1)

 #define _CMU_IFC_HFXORDY_SHIFT                            1

 #define _CMU_IFC_HFXORDY_MASK                             0x2UL

 #define _CMU_IFC_HFXORDY_DEFAULT                          0x00000000UL

 #define CMU_IFC_HFXORDY_DEFAULT                           (_CMU_IFC_HFXORDY_DEFAULT << 1)

 #define CMU_IFC_LFRCORDY                                  (0x1UL << 2)

 #define _CMU_IFC_LFRCORDY_SHIFT                           2

 #define _CMU_IFC_LFRCORDY_MASK                            0x4UL

 #define _CMU_IFC_LFRCORDY_DEFAULT                         0x00000000UL

 #define CMU_IFC_LFRCORDY_DEFAULT                          (_CMU_IFC_LFRCORDY_DEFAULT << 2)

 #define CMU_IFC_LFXORDY                                   (0x1UL << 3)

 #define _CMU_IFC_LFXORDY_SHIFT                            3

 #define _CMU_IFC_LFXORDY_MASK                             0x8UL

 #define _CMU_IFC_LFXORDY_DEFAULT                          0x00000000UL

 #define CMU_IFC_LFXORDY_DEFAULT                           (_CMU_IFC_LFXORDY_DEFAULT << 3)

 #define CMU_IFC_AUXHFRCORDY                               (0x1UL << 4)

 #define _CMU_IFC_AUXHFRCORDY_SHIFT                        4

 #define _CMU_IFC_AUXHFRCORDY_MASK                         0x10UL

 #define _CMU_IFC_AUXHFRCORDY_DEFAULT                      0x00000000UL

 #define CMU_IFC_AUXHFRCORDY_DEFAULT                       (_CMU_IFC_AUXHFRCORDY_DEFAULT << 4)

 #define CMU_IFC_CALRDY                                    (0x1UL << 5)

 #define _CMU_IFC_CALRDY_SHIFT                             5

 #define _CMU_IFC_CALRDY_MASK                              0x20UL

 #define _CMU_IFC_CALRDY_DEFAULT                           0x00000000UL

 #define CMU_IFC_CALRDY_DEFAULT                            (_CMU_IFC_CALRDY_DEFAULT << 5)

 #define CMU_IFC_CALOF                                     (0x1UL << 6)

 #define _CMU_IFC_CALOF_SHIFT                              6

 #define _CMU_IFC_CALOF_MASK                               0x40UL

 #define _CMU_IFC_CALOF_DEFAULT                            0x00000000UL

 #define CMU_IFC_CALOF_DEFAULT                             (_CMU_IFC_CALOF_DEFAULT << 6)

 #define CMU_IFC_HFXODISERR                                (0x1UL << 8)

 #define _CMU_IFC_HFXODISERR_SHIFT                         8

 #define _CMU_IFC_HFXODISERR_MASK                          0x100UL

 #define _CMU_IFC_HFXODISERR_DEFAULT                       0x00000000UL

 #define CMU_IFC_HFXODISERR_DEFAULT                        (_CMU_IFC_HFXODISERR_DEFAULT << 8)

 #define CMU_IFC_HFXOAUTOSW                                (0x1UL << 9)

 #define _CMU_IFC_HFXOAUTOSW_SHIFT                         9

 #define _CMU_IFC_HFXOAUTOSW_MASK                          0x200UL

 #define _CMU_IFC_HFXOAUTOSW_DEFAULT                       0x00000000UL

 #define CMU_IFC_HFXOAUTOSW_DEFAULT                        (_CMU_IFC_HFXOAUTOSW_DEFAULT << 9)

 #define CMU_IFC_HFXOPEAKDETERR                            (0x1UL << 10)

 #define _CMU_IFC_HFXOPEAKDETERR_SHIFT                     10

 #define _CMU_IFC_HFXOPEAKDETERR_MASK                      0x400UL

 #define _CMU_IFC_HFXOPEAKDETERR_DEFAULT                   0x00000000UL

 #define CMU_IFC_HFXOPEAKDETERR_DEFAULT                    (_CMU_IFC_HFXOPEAKDETERR_DEFAULT << 10)

 #define CMU_IFC_HFXOPEAKDETRDY                            (0x1UL << 11)

 #define _CMU_IFC_HFXOPEAKDETRDY_SHIFT                     11

 #define _CMU_IFC_HFXOPEAKDETRDY_MASK                      0x800UL

 #define _CMU_IFC_HFXOPEAKDETRDY_DEFAULT                   0x00000000UL

 #define CMU_IFC_HFXOPEAKDETRDY_DEFAULT                    (_CMU_IFC_HFXOPEAKDETRDY_DEFAULT << 11)

 #define CMU_IFC_HFXOSHUNTOPTRDY                           (0x1UL << 12)

 #define _CMU_IFC_HFXOSHUNTOPTRDY_SHIFT                    12

 #define _CMU_IFC_HFXOSHUNTOPTRDY_MASK                     0x1000UL

 #define _CMU_IFC_HFXOSHUNTOPTRDY_DEFAULT                  0x00000000UL

 #define CMU_IFC_HFXOSHUNTOPTRDY_DEFAULT                   (_CMU_IFC_HFXOSHUNTOPTRDY_DEFAULT << 12)

 #define CMU_IFC_HFRCODIS                                  (0x1UL << 13)

 #define _CMU_IFC_HFRCODIS_SHIFT                           13

 #define _CMU_IFC_HFRCODIS_MASK                            0x2000UL

 #define _CMU_IFC_HFRCODIS_DEFAULT                         0x00000000UL

 #define CMU_IFC_HFRCODIS_DEFAULT                          (_CMU_IFC_HFRCODIS_DEFAULT << 13)

 #define CMU_IFC_LFTIMEOUTERR                              (0x1UL << 14)

 #define _CMU_IFC_LFTIMEOUTERR_SHIFT                       14

 #define _CMU_IFC_LFTIMEOUTERR_MASK                        0x4000UL

 #define _CMU_IFC_LFTIMEOUTERR_DEFAULT                     0x00000000UL

 #define CMU_IFC_LFTIMEOUTERR_DEFAULT                      (_CMU_IFC_LFTIMEOUTERR_DEFAULT << 14)

 #define CMU_IFC_DPLLRDY                                   (0x1UL << 15)

 #define _CMU_IFC_DPLLRDY_SHIFT                            15

 #define _CMU_IFC_DPLLRDY_MASK                             0x8000UL

 #define _CMU_IFC_DPLLRDY_DEFAULT                          0x00000000UL

 #define CMU_IFC_DPLLRDY_DEFAULT                           (_CMU_IFC_DPLLRDY_DEFAULT << 15)

 #define CMU_IFC_DPLLLOCKFAILLOW                           (0x1UL << 16)

 #define _CMU_IFC_DPLLLOCKFAILLOW_SHIFT                    16

 #define _CMU_IFC_DPLLLOCKFAILLOW_MASK                     0x10000UL

 #define _CMU_IFC_DPLLLOCKFAILLOW_DEFAULT                  0x00000000UL

 #define CMU_IFC_DPLLLOCKFAILLOW_DEFAULT                   (_CMU_IFC_DPLLLOCKFAILLOW_DEFAULT << 16)

 #define CMU_IFC_DPLLLOCKFAILHIGH                          (0x1UL << 17)

 #define _CMU_IFC_DPLLLOCKFAILHIGH_SHIFT                   17

 #define _CMU_IFC_DPLLLOCKFAILHIGH_MASK                    0x20000UL

 #define _CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT                 0x00000000UL

 #define CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT                  (_CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT << 17)

 #define CMU_IFC_LFXOEDGE                                  (0x1UL << 27)

 #define _CMU_IFC_LFXOEDGE_SHIFT                           27

 #define _CMU_IFC_LFXOEDGE_MASK                            0x8000000UL

 #define _CMU_IFC_LFXOEDGE_DEFAULT                         0x00000000UL

 #define CMU_IFC_LFXOEDGE_DEFAULT                          (_CMU_IFC_LFXOEDGE_DEFAULT << 27)

 #define CMU_IFC_LFRCOEDGE                                 (0x1UL << 28)

 #define _CMU_IFC_LFRCOEDGE_SHIFT                          28

 #define _CMU_IFC_LFRCOEDGE_MASK                           0x10000000UL

 #define _CMU_IFC_LFRCOEDGE_DEFAULT                        0x00000000UL

 #define CMU_IFC_LFRCOEDGE_DEFAULT                         (_CMU_IFC_LFRCOEDGE_DEFAULT << 28)

 #define CMU_IFC_ULFRCOEDGE                                (0x1UL << 29)

 #define _CMU_IFC_ULFRCOEDGE_SHIFT                         29

 #define _CMU_IFC_ULFRCOEDGE_MASK                          0x20000000UL

 #define _CMU_IFC_ULFRCOEDGE_DEFAULT                       0x00000000UL

 #define CMU_IFC_ULFRCOEDGE_DEFAULT                        (_CMU_IFC_ULFRCOEDGE_DEFAULT << 29)

 #define CMU_IFC_CMUERR                                    (0x1UL << 31)

 #define _CMU_IFC_CMUERR_SHIFT                             31

 #define _CMU_IFC_CMUERR_MASK                              0x80000000UL

 #define _CMU_IFC_CMUERR_DEFAULT                           0x00000000UL

 #define CMU_IFC_CMUERR_DEFAULT                            (_CMU_IFC_CMUERR_DEFAULT << 31)

 /* Bit fields for CMU IEN */

 #define _CMU_IEN_RESETVALUE                               0x00000000UL

 #define _CMU_IEN_MASK                                     0xB803FF7FUL

 #define CMU_IEN_HFRCORDY                                  (0x1UL << 0)

 #define _CMU_IEN_HFRCORDY_SHIFT                           0

 #define _CMU_IEN_HFRCORDY_MASK                            0x1UL

 #define _CMU_IEN_HFRCORDY_DEFAULT                         0x00000000UL

 #define CMU_IEN_HFRCORDY_DEFAULT                          (_CMU_IEN_HFRCORDY_DEFAULT << 0)

 #define CMU_IEN_HFXORDY                                   (0x1UL << 1)

 #define _CMU_IEN_HFXORDY_SHIFT                            1

 #define _CMU_IEN_HFXORDY_MASK                             0x2UL

 #define _CMU_IEN_HFXORDY_DEFAULT                          0x00000000UL

 #define CMU_IEN_HFXORDY_DEFAULT                           (_CMU_IEN_HFXORDY_DEFAULT << 1)

 #define CMU_IEN_LFRCORDY                                  (0x1UL << 2)

 #define _CMU_IEN_LFRCORDY_SHIFT                           2

 #define _CMU_IEN_LFRCORDY_MASK                            0x4UL

 #define _CMU_IEN_LFRCORDY_DEFAULT                         0x00000000UL

 #define CMU_IEN_LFRCORDY_DEFAULT                          (_CMU_IEN_LFRCORDY_DEFAULT << 2)

 #define CMU_IEN_LFXORDY                                   (0x1UL << 3)

 #define _CMU_IEN_LFXORDY_SHIFT                            3

 #define _CMU_IEN_LFXORDY_MASK                             0x8UL

 #define _CMU_IEN_LFXORDY_DEFAULT                          0x00000000UL

 #define CMU_IEN_LFXORDY_DEFAULT                           (_CMU_IEN_LFXORDY_DEFAULT << 3)

 #define CMU_IEN_AUXHFRCORDY                               (0x1UL << 4)

 #define _CMU_IEN_AUXHFRCORDY_SHIFT                        4

 #define _CMU_IEN_AUXHFRCORDY_MASK                         0x10UL

 #define _CMU_IEN_AUXHFRCORDY_DEFAULT                      0x00000000UL

 #define CMU_IEN_AUXHFRCORDY_DEFAULT                       (_CMU_IEN_AUXHFRCORDY_DEFAULT << 4)

 #define CMU_IEN_CALRDY                                    (0x1UL << 5)

 #define _CMU_IEN_CALRDY_SHIFT                             5

 #define _CMU_IEN_CALRDY_MASK                              0x20UL

 #define _CMU_IEN_CALRDY_DEFAULT                           0x00000000UL

 #define CMU_IEN_CALRDY_DEFAULT                            (_CMU_IEN_CALRDY_DEFAULT << 5)

 #define CMU_IEN_CALOF                                     (0x1UL << 6)

 #define _CMU_IEN_CALOF_SHIFT                              6

 #define _CMU_IEN_CALOF_MASK                               0x40UL

 #define _CMU_IEN_CALOF_DEFAULT                            0x00000000UL

 #define CMU_IEN_CALOF_DEFAULT                             (_CMU_IEN_CALOF_DEFAULT << 6)

 #define CMU_IEN_HFXODISERR                                (0x1UL << 8)

 #define _CMU_IEN_HFXODISERR_SHIFT                         8

 #define _CMU_IEN_HFXODISERR_MASK                          0x100UL

 #define _CMU_IEN_HFXODISERR_DEFAULT                       0x00000000UL

 #define CMU_IEN_HFXODISERR_DEFAULT                        (_CMU_IEN_HFXODISERR_DEFAULT << 8)

 #define CMU_IEN_HFXOAUTOSW                                (0x1UL << 9)

 #define _CMU_IEN_HFXOAUTOSW_SHIFT                         9

 #define _CMU_IEN_HFXOAUTOSW_MASK                          0x200UL

 #define _CMU_IEN_HFXOAUTOSW_DEFAULT                       0x00000000UL

 #define CMU_IEN_HFXOAUTOSW_DEFAULT                        (_CMU_IEN_HFXOAUTOSW_DEFAULT << 9)

 #define CMU_IEN_HFXOPEAKDETERR                            (0x1UL << 10)

 #define _CMU_IEN_HFXOPEAKDETERR_SHIFT                     10

 #define _CMU_IEN_HFXOPEAKDETERR_MASK                      0x400UL

 #define _CMU_IEN_HFXOPEAKDETERR_DEFAULT                   0x00000000UL

 #define CMU_IEN_HFXOPEAKDETERR_DEFAULT                    (_CMU_IEN_HFXOPEAKDETERR_DEFAULT << 10)

 #define CMU_IEN_HFXOPEAKDETRDY                            (0x1UL << 11)

 #define _CMU_IEN_HFXOPEAKDETRDY_SHIFT                     11

 #define _CMU_IEN_HFXOPEAKDETRDY_MASK                      0x800UL

 #define _CMU_IEN_HFXOPEAKDETRDY_DEFAULT                   0x00000000UL

 #define CMU_IEN_HFXOPEAKDETRDY_DEFAULT                    (_CMU_IEN_HFXOPEAKDETRDY_DEFAULT << 11)

 #define CMU_IEN_HFXOSHUNTOPTRDY                           (0x1UL << 12)

 #define _CMU_IEN_HFXOSHUNTOPTRDY_SHIFT                    12

 #define _CMU_IEN_HFXOSHUNTOPTRDY_MASK                     0x1000UL

 #define _CMU_IEN_HFXOSHUNTOPTRDY_DEFAULT                  0x00000000UL

 #define CMU_IEN_HFXOSHUNTOPTRDY_DEFAULT                   (_CMU_IEN_HFXOSHUNTOPTRDY_DEFAULT << 12)

 #define CMU_IEN_HFRCODIS                                  (0x1UL << 13)

 #define _CMU_IEN_HFRCODIS_SHIFT                           13

 #define _CMU_IEN_HFRCODIS_MASK                            0x2000UL

 #define _CMU_IEN_HFRCODIS_DEFAULT                         0x00000000UL

 #define CMU_IEN_HFRCODIS_DEFAULT                          (_CMU_IEN_HFRCODIS_DEFAULT << 13)

 #define CMU_IEN_LFTIMEOUTERR                              (0x1UL << 14)

 #define _CMU_IEN_LFTIMEOUTERR_SHIFT                       14

 #define _CMU_IEN_LFTIMEOUTERR_MASK                        0x4000UL

 #define _CMU_IEN_LFTIMEOUTERR_DEFAULT                     0x00000000UL

 #define CMU_IEN_LFTIMEOUTERR_DEFAULT                      (_CMU_IEN_LFTIMEOUTERR_DEFAULT << 14)

 #define CMU_IEN_DPLLRDY                                   (0x1UL << 15)

 #define _CMU_IEN_DPLLRDY_SHIFT                            15

 #define _CMU_IEN_DPLLRDY_MASK                             0x8000UL

 #define _CMU_IEN_DPLLRDY_DEFAULT                          0x00000000UL

 #define CMU_IEN_DPLLRDY_DEFAULT                           (_CMU_IEN_DPLLRDY_DEFAULT << 15)

 #define CMU_IEN_DPLLLOCKFAILLOW                           (0x1UL << 16)

 #define _CMU_IEN_DPLLLOCKFAILLOW_SHIFT                    16

 #define _CMU_IEN_DPLLLOCKFAILLOW_MASK                     0x10000UL

 #define _CMU_IEN_DPLLLOCKFAILLOW_DEFAULT                  0x00000000UL

 #define CMU_IEN_DPLLLOCKFAILLOW_DEFAULT                   (_CMU_IEN_DPLLLOCKFAILLOW_DEFAULT << 16)

 #define CMU_IEN_DPLLLOCKFAILHIGH                          (0x1UL << 17)

 #define _CMU_IEN_DPLLLOCKFAILHIGH_SHIFT                   17

 #define _CMU_IEN_DPLLLOCKFAILHIGH_MASK                    0x20000UL

 #define _CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT                 0x00000000UL

 #define CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT                  (_CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT << 17)

 #define CMU_IEN_LFXOEDGE                                  (0x1UL << 27)

 #define _CMU_IEN_LFXOEDGE_SHIFT                           27

 #define _CMU_IEN_LFXOEDGE_MASK                            0x8000000UL

 #define _CMU_IEN_LFXOEDGE_DEFAULT                         0x00000000UL

 #define CMU_IEN_LFXOEDGE_DEFAULT                          (_CMU_IEN_LFXOEDGE_DEFAULT << 27)

 #define CMU_IEN_LFRCOEDGE                                 (0x1UL << 28)

 #define _CMU_IEN_LFRCOEDGE_SHIFT                          28

 #define _CMU_IEN_LFRCOEDGE_MASK                           0x10000000UL

 #define _CMU_IEN_LFRCOEDGE_DEFAULT                        0x00000000UL

 #define CMU_IEN_LFRCOEDGE_DEFAULT                         (_CMU_IEN_LFRCOEDGE_DEFAULT << 28)

 #define CMU_IEN_ULFRCOEDGE                                (0x1UL << 29)

 #define _CMU_IEN_ULFRCOEDGE_SHIFT                         29

 #define _CMU_IEN_ULFRCOEDGE_MASK                          0x20000000UL

 #define _CMU_IEN_ULFRCOEDGE_DEFAULT                       0x00000000UL

 #define CMU_IEN_ULFRCOEDGE_DEFAULT                        (_CMU_IEN_ULFRCOEDGE_DEFAULT << 29)

 #define CMU_IEN_CMUERR                                    (0x1UL << 31)

 #define _CMU_IEN_CMUERR_SHIFT                             31

 #define _CMU_IEN_CMUERR_MASK                              0x80000000UL

 #define _CMU_IEN_CMUERR_DEFAULT                           0x00000000UL

 #define CMU_IEN_CMUERR_DEFAULT                            (_CMU_IEN_CMUERR_DEFAULT << 31)

 /* Bit fields for CMU HFBUSCLKEN0 */

 #define _CMU_HFBUSCLKEN0_RESETVALUE                       0x00000000UL

 #define _CMU_HFBUSCLKEN0_MASK                             0x0000007FUL

 #define CMU_HFBUSCLKEN0_CRYPTO0                           (0x1UL << 0)

 #define CMU_HFBUSCLKEN0_CRYPTO                            CMU_HFBUSCLKEN0_CRYPTO0

 #define _CMU_HFBUSCLKEN0_CRYPTO0_SHIFT                    0

 #define _CMU_HFBUSCLKEN0_CRYPTO0_MASK                     0x1UL

 #define _CMU_HFBUSCLKEN0_CRYPTO_SHIFT                     _CMU_HFBUSCLKEN0_CRYPTO0_SHIFT

 #define _CMU_HFBUSCLKEN0_CRYPTO_MASK                      _CMU_HFBUSCLKEN0_CRYPTO0_MASK

 #define _CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT                  0x00000000UL

 #define _CMU_HFBUSCLKEN0_CRYPTO_DEFAULT                   _CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT

 #define CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT                   (_CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT << 0)

 #define  CMU_HFBUSCLKEN0_CRYPTO_DEFAULT                   CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT

 #define CMU_HFBUSCLKEN0_CRYPTO1                           (0x1UL << 1)

 #define _CMU_HFBUSCLKEN0_CRYPTO1_SHIFT                    1

 #define _CMU_HFBUSCLKEN0_CRYPTO1_MASK                     0x2UL

 #define _CMU_HFBUSCLKEN0_CRYPTO1_DEFAULT                  0x00000000UL

 #define CMU_HFBUSCLKEN0_CRYPTO1_DEFAULT                   (_CMU_HFBUSCLKEN0_CRYPTO1_DEFAULT << 1)

 #define CMU_HFBUSCLKEN0_LE                                (0x1UL << 2)

 #define _CMU_HFBUSCLKEN0_LE_SHIFT                         2

 #define _CMU_HFBUSCLKEN0_LE_MASK                          0x4UL

 #define _CMU_HFBUSCLKEN0_LE_DEFAULT                       0x00000000UL

 #define CMU_HFBUSCLKEN0_LE_DEFAULT                        (_CMU_HFBUSCLKEN0_LE_DEFAULT << 2)

 #define CMU_HFBUSCLKEN0_GPIO                              (0x1UL << 3)

 #define _CMU_HFBUSCLKEN0_GPIO_SHIFT                       3

 #define _CMU_HFBUSCLKEN0_GPIO_MASK                        0x8UL

 #define _CMU_HFBUSCLKEN0_GPIO_DEFAULT                     0x00000000UL

 #define CMU_HFBUSCLKEN0_GPIO_DEFAULT                      (_CMU_HFBUSCLKEN0_GPIO_DEFAULT << 3)

 #define CMU_HFBUSCLKEN0_PRS                               (0x1UL << 4)

 #define _CMU_HFBUSCLKEN0_PRS_SHIFT                        4

 #define _CMU_HFBUSCLKEN0_PRS_MASK                         0x10UL

 #define _CMU_HFBUSCLKEN0_PRS_DEFAULT                      0x00000000UL

 #define CMU_HFBUSCLKEN0_PRS_DEFAULT                       (_CMU_HFBUSCLKEN0_PRS_DEFAULT << 4)

 #define CMU_HFBUSCLKEN0_LDMA                              (0x1UL << 5)

 #define _CMU_HFBUSCLKEN0_LDMA_SHIFT                       5

 #define _CMU_HFBUSCLKEN0_LDMA_MASK                        0x20UL

 #define _CMU_HFBUSCLKEN0_LDMA_DEFAULT                     0x00000000UL

 #define CMU_HFBUSCLKEN0_LDMA_DEFAULT                      (_CMU_HFBUSCLKEN0_LDMA_DEFAULT << 5)

 #define CMU_HFBUSCLKEN0_GPCRC                             (0x1UL << 6)

 #define _CMU_HFBUSCLKEN0_GPCRC_SHIFT                      6

 #define _CMU_HFBUSCLKEN0_GPCRC_MASK                       0x40UL

 #define _CMU_HFBUSCLKEN0_GPCRC_DEFAULT                    0x00000000UL

 #define CMU_HFBUSCLKEN0_GPCRC_DEFAULT                     (_CMU_HFBUSCLKEN0_GPCRC_DEFAULT << 6)

 /* Bit fields for CMU HFPERCLKEN0 */

 #define _CMU_HFPERCLKEN0_RESETVALUE                       0x00000000UL

 #define _CMU_HFPERCLKEN0_MASK                             0x0000FFFFUL

 #define CMU_HFPERCLKEN0_TIMER0                            (0x1UL << 0)

 #define _CMU_HFPERCLKEN0_TIMER0_SHIFT                     0

 #define _CMU_HFPERCLKEN0_TIMER0_MASK                      0x1UL

 #define _CMU_HFPERCLKEN0_TIMER0_DEFAULT                   0x00000000UL

 #define CMU_HFPERCLKEN0_TIMER0_DEFAULT                    (_CMU_HFPERCLKEN0_TIMER0_DEFAULT << 0)

 #define CMU_HFPERCLKEN0_TIMER1                            (0x1UL << 1)

 #define _CMU_HFPERCLKEN0_TIMER1_SHIFT                     1

 #define _CMU_HFPERCLKEN0_TIMER1_MASK                      0x2UL

 #define _CMU_HFPERCLKEN0_TIMER1_DEFAULT                   0x00000000UL

 #define CMU_HFPERCLKEN0_TIMER1_DEFAULT                    (_CMU_HFPERCLKEN0_TIMER1_DEFAULT << 1)

 #define CMU_HFPERCLKEN0_WTIMER0                           (0x1UL << 2)

 #define _CMU_HFPERCLKEN0_WTIMER0_SHIFT                    2

 #define _CMU_HFPERCLKEN0_WTIMER0_MASK                     0x4UL

 #define _CMU_HFPERCLKEN0_WTIMER0_DEFAULT                  0x00000000UL

 #define CMU_HFPERCLKEN0_WTIMER0_DEFAULT                   (_CMU_HFPERCLKEN0_WTIMER0_DEFAULT << 2)

 #define CMU_HFPERCLKEN0_USART0                            (0x1UL << 3)

 #define _CMU_HFPERCLKEN0_USART0_SHIFT                     3

 #define _CMU_HFPERCLKEN0_USART0_MASK                      0x8UL

 #define _CMU_HFPERCLKEN0_USART0_DEFAULT                   0x00000000UL

 #define CMU_HFPERCLKEN0_USART0_DEFAULT                    (_CMU_HFPERCLKEN0_USART0_DEFAULT << 3)

 #define CMU_HFPERCLKEN0_USART1                            (0x1UL << 4)

 #define _CMU_HFPERCLKEN0_USART1_SHIFT                     4

 #define _CMU_HFPERCLKEN0_USART1_MASK                      0x10UL

 #define _CMU_HFPERCLKEN0_USART1_DEFAULT                   0x00000000UL

 #define CMU_HFPERCLKEN0_USART1_DEFAULT                    (_CMU_HFPERCLKEN0_USART1_DEFAULT << 4)

 #define CMU_HFPERCLKEN0_USART2                            (0x1UL << 5)

 #define _CMU_HFPERCLKEN0_USART2_SHIFT                     5

 #define _CMU_HFPERCLKEN0_USART2_MASK                      0x20UL

 #define _CMU_HFPERCLKEN0_USART2_DEFAULT                   0x00000000UL

 #define CMU_HFPERCLKEN0_USART2_DEFAULT                    (_CMU_HFPERCLKEN0_USART2_DEFAULT << 5)

 #define CMU_HFPERCLKEN0_I2C0                              (0x1UL << 6)

 #define _CMU_HFPERCLKEN0_I2C0_SHIFT                       6

 #define _CMU_HFPERCLKEN0_I2C0_MASK                        0x40UL

 #define _CMU_HFPERCLKEN0_I2C0_DEFAULT                     0x00000000UL

 #define CMU_HFPERCLKEN0_I2C0_DEFAULT                      (_CMU_HFPERCLKEN0_I2C0_DEFAULT << 6)

 #define CMU_HFPERCLKEN0_I2C1                              (0x1UL << 7)

 #define _CMU_HFPERCLKEN0_I2C1_SHIFT                       7

 #define _CMU_HFPERCLKEN0_I2C1_MASK                        0x80UL

 #define _CMU_HFPERCLKEN0_I2C1_DEFAULT                     0x00000000UL

 #define CMU_HFPERCLKEN0_I2C1_DEFAULT                      (_CMU_HFPERCLKEN0_I2C1_DEFAULT << 7)

 #define CMU_HFPERCLKEN0_ACMP0                             (0x1UL << 8)

 #define _CMU_HFPERCLKEN0_ACMP0_SHIFT                      8

 #define _CMU_HFPERCLKEN0_ACMP0_MASK                       0x100UL

 #define _CMU_HFPERCLKEN0_ACMP0_DEFAULT                    0x00000000UL

 #define CMU_HFPERCLKEN0_ACMP0_DEFAULT                     (_CMU_HFPERCLKEN0_ACMP0_DEFAULT << 8)

 #define CMU_HFPERCLKEN0_ACMP1                             (0x1UL << 9)

 #define _CMU_HFPERCLKEN0_ACMP1_SHIFT                      9

 #define _CMU_HFPERCLKEN0_ACMP1_MASK                       0x200UL

 #define _CMU_HFPERCLKEN0_ACMP1_DEFAULT                    0x00000000UL

 #define CMU_HFPERCLKEN0_ACMP1_DEFAULT                     (_CMU_HFPERCLKEN0_ACMP1_DEFAULT << 9)

 #define CMU_HFPERCLKEN0_CRYOTIMER                         (0x1UL << 10)

 #define _CMU_HFPERCLKEN0_CRYOTIMER_SHIFT                  10

 #define _CMU_HFPERCLKEN0_CRYOTIMER_MASK                   0x400UL

 #define _CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT                0x00000000UL

 #define CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT                 (_CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT << 10)

 #define CMU_HFPERCLKEN0_ADC0                              (0x1UL << 11)

 #define _CMU_HFPERCLKEN0_ADC0_SHIFT                       11

 #define _CMU_HFPERCLKEN0_ADC0_MASK                        0x800UL

 #define _CMU_HFPERCLKEN0_ADC0_DEFAULT                     0x00000000UL

 #define CMU_HFPERCLKEN0_ADC0_DEFAULT                      (_CMU_HFPERCLKEN0_ADC0_DEFAULT << 11)

 #define CMU_HFPERCLKEN0_VDAC0                             (0x1UL << 12)

 #define _CMU_HFPERCLKEN0_VDAC0_SHIFT                      12

 #define _CMU_HFPERCLKEN0_VDAC0_MASK                       0x1000UL

 #define _CMU_HFPERCLKEN0_VDAC0_DEFAULT                    0x00000000UL

 #define CMU_HFPERCLKEN0_VDAC0_DEFAULT                     (_CMU_HFPERCLKEN0_VDAC0_DEFAULT << 12)

 #define CMU_HFPERCLKEN0_CSEN                              (0x1UL << 13)

 #define _CMU_HFPERCLKEN0_CSEN_SHIFT                       13

 #define _CMU_HFPERCLKEN0_CSEN_MASK                        0x2000UL

 #define _CMU_HFPERCLKEN0_CSEN_DEFAULT                     0x00000000UL

 #define CMU_HFPERCLKEN0_CSEN_DEFAULT                      (_CMU_HFPERCLKEN0_CSEN_DEFAULT << 13)

 #define CMU_HFPERCLKEN0_IDAC0                             (0x1UL << 14)

 #define _CMU_HFPERCLKEN0_IDAC0_SHIFT                      14

 #define _CMU_HFPERCLKEN0_IDAC0_MASK                       0x4000UL

 #define _CMU_HFPERCLKEN0_IDAC0_DEFAULT                    0x00000000UL

 #define CMU_HFPERCLKEN0_IDAC0_DEFAULT                     (_CMU_HFPERCLKEN0_IDAC0_DEFAULT << 14)

 #define CMU_HFPERCLKEN0_TRNG0                             (0x1UL << 15)

 #define _CMU_HFPERCLKEN0_TRNG0_SHIFT                      15

 #define _CMU_HFPERCLKEN0_TRNG0_MASK                       0x8000UL

 #define _CMU_HFPERCLKEN0_TRNG0_DEFAULT                    0x00000000UL

 #define CMU_HFPERCLKEN0_TRNG0_DEFAULT                     (_CMU_HFPERCLKEN0_TRNG0_DEFAULT << 15)

 /* Bit fields for CMU LFACLKEN0 */

 #define _CMU_LFACLKEN0_RESETVALUE                         0x00000000UL

 #define _CMU_LFACLKEN0_MASK                               0x00000003UL

 #define CMU_LFACLKEN0_LETIMER0                            (0x1UL << 0)

 #define _CMU_LFACLKEN0_LETIMER0_SHIFT                     0

 #define _CMU_LFACLKEN0_LETIMER0_MASK                      0x1UL

 #define _CMU_LFACLKEN0_LETIMER0_DEFAULT                   0x00000000UL

 #define CMU_LFACLKEN0_LETIMER0_DEFAULT                    (_CMU_LFACLKEN0_LETIMER0_DEFAULT << 0)

 #define CMU_LFACLKEN0_LESENSE                             (0x1UL << 1)

 #define _CMU_LFACLKEN0_LESENSE_SHIFT                      1

 #define _CMU_LFACLKEN0_LESENSE_MASK                       0x2UL

 #define _CMU_LFACLKEN0_LESENSE_DEFAULT                    0x00000000UL

 #define CMU_LFACLKEN0_LESENSE_DEFAULT                     (_CMU_LFACLKEN0_LESENSE_DEFAULT << 1)

 /* Bit fields for CMU LFBCLKEN0 */

 #define _CMU_LFBCLKEN0_RESETVALUE                         0x00000000UL

 #define _CMU_LFBCLKEN0_MASK                               0x00000007UL

 #define CMU_LFBCLKEN0_SYSTICK                             (0x1UL << 0)

 #define _CMU_LFBCLKEN0_SYSTICK_SHIFT                      0

 #define _CMU_LFBCLKEN0_SYSTICK_MASK                       0x1UL

 #define _CMU_LFBCLKEN0_SYSTICK_DEFAULT                    0x00000000UL

 #define CMU_LFBCLKEN0_SYSTICK_DEFAULT                     (_CMU_LFBCLKEN0_SYSTICK_DEFAULT << 0)

 #define CMU_LFBCLKEN0_LEUART0                             (0x1UL << 1)

 #define _CMU_LFBCLKEN0_LEUART0_SHIFT                      1

 #define _CMU_LFBCLKEN0_LEUART0_MASK                       0x2UL

 #define _CMU_LFBCLKEN0_LEUART0_DEFAULT                    0x00000000UL

 #define CMU_LFBCLKEN0_LEUART0_DEFAULT                     (_CMU_LFBCLKEN0_LEUART0_DEFAULT << 1)

 #define CMU_LFBCLKEN0_CSEN                                (0x1UL << 2)

 #define _CMU_LFBCLKEN0_CSEN_SHIFT                         2

 #define _CMU_LFBCLKEN0_CSEN_MASK                          0x4UL

 #define _CMU_LFBCLKEN0_CSEN_DEFAULT                       0x00000000UL

 #define CMU_LFBCLKEN0_CSEN_DEFAULT                        (_CMU_LFBCLKEN0_CSEN_DEFAULT << 2)

 /* Bit fields for CMU LFECLKEN0 */

 #define _CMU_LFECLKEN0_RESETVALUE                         0x00000000UL

 #define _CMU_LFECLKEN0_MASK                               0x00000001UL

 #define CMU_LFECLKEN0_RTCC                                (0x1UL << 0)

 #define _CMU_LFECLKEN0_RTCC_SHIFT                         0

 #define _CMU_LFECLKEN0_RTCC_MASK                          0x1UL

 #define _CMU_LFECLKEN0_RTCC_DEFAULT                       0x00000000UL

 #define CMU_LFECLKEN0_RTCC_DEFAULT                        (_CMU_LFECLKEN0_RTCC_DEFAULT << 0)

 /* Bit fields for CMU HFPRESC */

 #define _CMU_HFPRESC_RESETVALUE                           0x00000000UL

 #define _CMU_HFPRESC_MASK                                 0x01001F00UL

 #define _CMU_HFPRESC_PRESC_SHIFT                          8

 #define _CMU_HFPRESC_PRESC_MASK                           0x1F00UL

 #define _CMU_HFPRESC_PRESC_DEFAULT                        0x00000000UL

 #define _CMU_HFPRESC_PRESC_NODIVISION                     0x00000000UL

 #define CMU_HFPRESC_PRESC_DEFAULT                         (_CMU_HFPRESC_PRESC_DEFAULT << 8)

 #define CMU_HFPRESC_PRESC_NODIVISION                      (_CMU_HFPRESC_PRESC_NODIVISION << 8)

 #define _CMU_HFPRESC_HFCLKLEPRESC_SHIFT                   24

 #define _CMU_HFPRESC_HFCLKLEPRESC_MASK                    0x1000000UL

 #define _CMU_HFPRESC_HFCLKLEPRESC_DEFAULT                 0x00000000UL

 #define _CMU_HFPRESC_HFCLKLEPRESC_DIV2                    0x00000000UL

 #define _CMU_HFPRESC_HFCLKLEPRESC_DIV4                    0x00000001UL

 #define CMU_HFPRESC_HFCLKLEPRESC_DEFAULT                  (_CMU_HFPRESC_HFCLKLEPRESC_DEFAULT << 24)

 #define CMU_HFPRESC_HFCLKLEPRESC_DIV2                     (_CMU_HFPRESC_HFCLKLEPRESC_DIV2 << 24)

 #define CMU_HFPRESC_HFCLKLEPRESC_DIV4                     (_CMU_HFPRESC_HFCLKLEPRESC_DIV4 << 24)

 /* Bit fields for CMU HFCOREPRESC */

 #define _CMU_HFCOREPRESC_RESETVALUE                       0x00000000UL

 #define _CMU_HFCOREPRESC_MASK                             0x0001FF00UL

 #define _CMU_HFCOREPRESC_PRESC_SHIFT                      8

 #define _CMU_HFCOREPRESC_PRESC_MASK                       0x1FF00UL

 #define _CMU_HFCOREPRESC_PRESC_DEFAULT                    0x00000000UL

 #define _CMU_HFCOREPRESC_PRESC_NODIVISION                 0x00000000UL

 #define CMU_HFCOREPRESC_PRESC_DEFAULT                     (_CMU_HFCOREPRESC_PRESC_DEFAULT << 8)

 #define CMU_HFCOREPRESC_PRESC_NODIVISION                  (_CMU_HFCOREPRESC_PRESC_NODIVISION << 8)

 /* Bit fields for CMU HFPERPRESC */

 #define _CMU_HFPERPRESC_RESETVALUE                        0x00000000UL

 #define _CMU_HFPERPRESC_MASK                              0x0001FF00UL

 #define _CMU_HFPERPRESC_PRESC_SHIFT                       8

 #define _CMU_HFPERPRESC_PRESC_MASK                        0x1FF00UL

 #define _CMU_HFPERPRESC_PRESC_DEFAULT                     0x00000000UL

 #define _CMU_HFPERPRESC_PRESC_NODIVISION                  0x00000000UL

 #define CMU_HFPERPRESC_PRESC_DEFAULT                      (_CMU_HFPERPRESC_PRESC_DEFAULT << 8)

 #define CMU_HFPERPRESC_PRESC_NODIVISION                   (_CMU_HFPERPRESC_PRESC_NODIVISION << 8)

 /* Bit fields for CMU HFEXPPRESC */

 #define _CMU_HFEXPPRESC_RESETVALUE                        0x00000000UL

 #define _CMU_HFEXPPRESC_MASK                              0x00001F00UL

 #define _CMU_HFEXPPRESC_PRESC_SHIFT                       8

 #define _CMU_HFEXPPRESC_PRESC_MASK                        0x1F00UL

 #define _CMU_HFEXPPRESC_PRESC_DEFAULT                     0x00000000UL

 #define _CMU_HFEXPPRESC_PRESC_NODIVISION                  0x00000000UL

 #define CMU_HFEXPPRESC_PRESC_DEFAULT                      (_CMU_HFEXPPRESC_PRESC_DEFAULT << 8)

 #define CMU_HFEXPPRESC_PRESC_NODIVISION                   (_CMU_HFEXPPRESC_PRESC_NODIVISION << 8)

 /* Bit fields for CMU LFAPRESC0 */

 #define _CMU_LFAPRESC0_RESETVALUE                         0x00000000UL

 #define _CMU_LFAPRESC0_MASK                               0x0000003FUL

 #define _CMU_LFAPRESC0_LETIMER0_SHIFT                     0

 #define _CMU_LFAPRESC0_LETIMER0_MASK                      0xFUL

 #define _CMU_LFAPRESC0_LETIMER0_DIV1                      0x00000000UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV2                      0x00000001UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV4                      0x00000002UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV8                      0x00000003UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV16                     0x00000004UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV32                     0x00000005UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV64                     0x00000006UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV128                    0x00000007UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV256                    0x00000008UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV512                    0x00000009UL

 #define _CMU_LFAPRESC0_LETIMER0_DIV1024                   0x0000000AUL

 #define _CMU_LFAPRESC0_LETIMER0_DIV2048                   0x0000000BUL

 #define _CMU_LFAPRESC0_LETIMER0_DIV4096                   0x0000000CUL

 #define _CMU_LFAPRESC0_LETIMER0_DIV8192                   0x0000000DUL

 #define _CMU_LFAPRESC0_LETIMER0_DIV16384                  0x0000000EUL

 #define _CMU_LFAPRESC0_LETIMER0_DIV32768                  0x0000000FUL

 #define CMU_LFAPRESC0_LETIMER0_DIV1                       (_CMU_LFAPRESC0_LETIMER0_DIV1 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV2                       (_CMU_LFAPRESC0_LETIMER0_DIV2 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV4                       (_CMU_LFAPRESC0_LETIMER0_DIV4 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV8                       (_CMU_LFAPRESC0_LETIMER0_DIV8 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV16                      (_CMU_LFAPRESC0_LETIMER0_DIV16 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV32                      (_CMU_LFAPRESC0_LETIMER0_DIV32 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV64                      (_CMU_LFAPRESC0_LETIMER0_DIV64 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV128                     (_CMU_LFAPRESC0_LETIMER0_DIV128 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV256                     (_CMU_LFAPRESC0_LETIMER0_DIV256 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV512                     (_CMU_LFAPRESC0_LETIMER0_DIV512 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV1024                    (_CMU_LFAPRESC0_LETIMER0_DIV1024 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV2048                    (_CMU_LFAPRESC0_LETIMER0_DIV2048 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV4096                    (_CMU_LFAPRESC0_LETIMER0_DIV4096 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV8192                    (_CMU_LFAPRESC0_LETIMER0_DIV8192 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV16384                   (_CMU_LFAPRESC0_LETIMER0_DIV16384 << 0)

 #define CMU_LFAPRESC0_LETIMER0_DIV32768                   (_CMU_LFAPRESC0_LETIMER0_DIV32768 << 0)

 #define _CMU_LFAPRESC0_LESENSE_SHIFT                      4

 #define _CMU_LFAPRESC0_LESENSE_MASK                       0x30UL

 #define _CMU_LFAPRESC0_LESENSE_DIV1                       0x00000000UL

 #define _CMU_LFAPRESC0_LESENSE_DIV2                       0x00000001UL

 #define _CMU_LFAPRESC0_LESENSE_DIV4                       0x00000002UL

 #define _CMU_LFAPRESC0_LESENSE_DIV8                       0x00000003UL

 #define CMU_LFAPRESC0_LESENSE_DIV1                        (_CMU_LFAPRESC0_LESENSE_DIV1 << 4)

 #define CMU_LFAPRESC0_LESENSE_DIV2                        (_CMU_LFAPRESC0_LESENSE_DIV2 << 4)

 #define CMU_LFAPRESC0_LESENSE_DIV4                        (_CMU_LFAPRESC0_LESENSE_DIV4 << 4)

 #define CMU_LFAPRESC0_LESENSE_DIV8                        (_CMU_LFAPRESC0_LESENSE_DIV8 << 4)

 /* Bit fields for CMU LFBPRESC0 */

 #define _CMU_LFBPRESC0_RESETVALUE                         0x00000000UL

 #define _CMU_LFBPRESC0_MASK                               0x0000033FUL

 #define _CMU_LFBPRESC0_SYSTICK_SHIFT                      0

 #define _CMU_LFBPRESC0_SYSTICK_MASK                       0xFUL

 #define _CMU_LFBPRESC0_SYSTICK_DIV1                       0x00000000UL

 #define CMU_LFBPRESC0_SYSTICK_DIV1                        (_CMU_LFBPRESC0_SYSTICK_DIV1 << 0)

 #define _CMU_LFBPRESC0_LEUART0_SHIFT                      4

 #define _CMU_LFBPRESC0_LEUART0_MASK                       0x30UL

 #define _CMU_LFBPRESC0_LEUART0_DIV1                       0x00000000UL

 #define _CMU_LFBPRESC0_LEUART0_DIV2                       0x00000001UL

 #define _CMU_LFBPRESC0_LEUART0_DIV4                       0x00000002UL

 #define _CMU_LFBPRESC0_LEUART0_DIV8                       0x00000003UL

 #define CMU_LFBPRESC0_LEUART0_DIV1                        (_CMU_LFBPRESC0_LEUART0_DIV1 << 4)

 #define CMU_LFBPRESC0_LEUART0_DIV2                        (_CMU_LFBPRESC0_LEUART0_DIV2 << 4)

 #define CMU_LFBPRESC0_LEUART0_DIV4                        (_CMU_LFBPRESC0_LEUART0_DIV4 << 4)

 #define CMU_LFBPRESC0_LEUART0_DIV8                        (_CMU_LFBPRESC0_LEUART0_DIV8 << 4)

 #define _CMU_LFBPRESC0_CSEN_SHIFT                         8

 #define _CMU_LFBPRESC0_CSEN_MASK                          0x300UL

 #define _CMU_LFBPRESC0_CSEN_DIV16                         0x00000000UL

 #define _CMU_LFBPRESC0_CSEN_DIV32                         0x00000001UL

 #define _CMU_LFBPRESC0_CSEN_DIV64                         0x00000002UL

 #define _CMU_LFBPRESC0_CSEN_DIV128                        0x00000003UL

 #define CMU_LFBPRESC0_CSEN_DIV16                          (_CMU_LFBPRESC0_CSEN_DIV16 << 8)

 #define CMU_LFBPRESC0_CSEN_DIV32                          (_CMU_LFBPRESC0_CSEN_DIV32 << 8)

 #define CMU_LFBPRESC0_CSEN_DIV64                          (_CMU_LFBPRESC0_CSEN_DIV64 << 8)

 #define CMU_LFBPRESC0_CSEN_DIV128                         (_CMU_LFBPRESC0_CSEN_DIV128 << 8)

 /* Bit fields for CMU LFEPRESC0 */

 #define _CMU_LFEPRESC0_RESETVALUE                         0x00000000UL

 #define _CMU_LFEPRESC0_MASK                               0x00000003UL

 #define _CMU_LFEPRESC0_RTCC_SHIFT                         0

 #define _CMU_LFEPRESC0_RTCC_MASK                          0x3UL

 #define _CMU_LFEPRESC0_RTCC_DIV1                          0x00000000UL

 #define _CMU_LFEPRESC0_RTCC_DIV2                          0x00000001UL

 #define _CMU_LFEPRESC0_RTCC_DIV4                          0x00000002UL

 #define CMU_LFEPRESC0_RTCC_DIV1                           (_CMU_LFEPRESC0_RTCC_DIV1 << 0)

 #define CMU_LFEPRESC0_RTCC_DIV2                           (_CMU_LFEPRESC0_RTCC_DIV2 << 0)

 #define CMU_LFEPRESC0_RTCC_DIV4                           (_CMU_LFEPRESC0_RTCC_DIV4 << 0)

 /* Bit fields for CMU SYNCBUSY */

 #define _CMU_SYNCBUSY_RESETVALUE                          0x00000000UL

 #define _CMU_SYNCBUSY_MASK                                0x3F050055UL

 #define CMU_SYNCBUSY_LFACLKEN0                            (0x1UL << 0)

 #define _CMU_SYNCBUSY_LFACLKEN0_SHIFT                     0

 #define _CMU_SYNCBUSY_LFACLKEN0_MASK                      0x1UL

 #define _CMU_SYNCBUSY_LFACLKEN0_DEFAULT                   0x00000000UL

 #define CMU_SYNCBUSY_LFACLKEN0_DEFAULT                    (_CMU_SYNCBUSY_LFACLKEN0_DEFAULT << 0)

 #define CMU_SYNCBUSY_LFAPRESC0                            (0x1UL << 2)

 #define _CMU_SYNCBUSY_LFAPRESC0_SHIFT                     2

 #define _CMU_SYNCBUSY_LFAPRESC0_MASK                      0x4UL

 #define _CMU_SYNCBUSY_LFAPRESC0_DEFAULT                   0x00000000UL

 #define CMU_SYNCBUSY_LFAPRESC0_DEFAULT                    (_CMU_SYNCBUSY_LFAPRESC0_DEFAULT << 2)

 #define CMU_SYNCBUSY_LFBCLKEN0                            (0x1UL << 4)

 #define _CMU_SYNCBUSY_LFBCLKEN0_SHIFT                     4

 #define _CMU_SYNCBUSY_LFBCLKEN0_MASK                      0x10UL

 #define _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT                   0x00000000UL

 #define CMU_SYNCBUSY_LFBCLKEN0_DEFAULT                    (_CMU_SYNCBUSY_LFBCLKEN0_DEFAULT << 4)

 #define CMU_SYNCBUSY_LFBPRESC0                            (0x1UL << 6)

 #define _CMU_SYNCBUSY_LFBPRESC0_SHIFT                     6

 #define _CMU_SYNCBUSY_LFBPRESC0_MASK                      0x40UL

 #define _CMU_SYNCBUSY_LFBPRESC0_DEFAULT                   0x00000000UL

 #define CMU_SYNCBUSY_LFBPRESC0_DEFAULT                    (_CMU_SYNCBUSY_LFBPRESC0_DEFAULT << 6)

 #define CMU_SYNCBUSY_LFECLKEN0                            (0x1UL << 16)

 #define _CMU_SYNCBUSY_LFECLKEN0_SHIFT                     16

 #define _CMU_SYNCBUSY_LFECLKEN0_MASK                      0x10000UL

 #define _CMU_SYNCBUSY_LFECLKEN0_DEFAULT                   0x00000000UL

 #define CMU_SYNCBUSY_LFECLKEN0_DEFAULT                    (_CMU_SYNCBUSY_LFECLKEN0_DEFAULT << 16)

 #define CMU_SYNCBUSY_LFEPRESC0                            (0x1UL << 18)

 #define _CMU_SYNCBUSY_LFEPRESC0_SHIFT                     18

 #define _CMU_SYNCBUSY_LFEPRESC0_MASK                      0x40000UL

 #define _CMU_SYNCBUSY_LFEPRESC0_DEFAULT                   0x00000000UL

 #define CMU_SYNCBUSY_LFEPRESC0_DEFAULT                    (_CMU_SYNCBUSY_LFEPRESC0_DEFAULT << 18)

 #define CMU_SYNCBUSY_HFRCOBSY                             (0x1UL << 24)

 #define _CMU_SYNCBUSY_HFRCOBSY_SHIFT                      24

 #define _CMU_SYNCBUSY_HFRCOBSY_MASK                       0x1000000UL

 #define _CMU_SYNCBUSY_HFRCOBSY_DEFAULT                    0x00000000UL

 #define CMU_SYNCBUSY_HFRCOBSY_DEFAULT                     (_CMU_SYNCBUSY_HFRCOBSY_DEFAULT << 24)

 #define CMU_SYNCBUSY_AUXHFRCOBSY                          (0x1UL << 25)

 #define _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT                   25

 #define _CMU_SYNCBUSY_AUXHFRCOBSY_MASK                    0x2000000UL

 #define _CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT                 0x00000000UL

 #define CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT                  (_CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT << 25)

 #define CMU_SYNCBUSY_LFRCOBSY                             (0x1UL << 26)

 #define _CMU_SYNCBUSY_LFRCOBSY_SHIFT                      26

 #define _CMU_SYNCBUSY_LFRCOBSY_MASK                       0x4000000UL

 #define _CMU_SYNCBUSY_LFRCOBSY_DEFAULT                    0x00000000UL

 #define CMU_SYNCBUSY_LFRCOBSY_DEFAULT                     (_CMU_SYNCBUSY_LFRCOBSY_DEFAULT << 26)

 #define CMU_SYNCBUSY_LFRCOVREFBSY                         (0x1UL << 27)

 #define _CMU_SYNCBUSY_LFRCOVREFBSY_SHIFT                  27

 #define _CMU_SYNCBUSY_LFRCOVREFBSY_MASK                   0x8000000UL

 #define _CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT                0x00000000UL

 #define CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT                 (_CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT << 27)

 #define CMU_SYNCBUSY_HFXOBSY                              (0x1UL << 28)

 #define _CMU_SYNCBUSY_HFXOBSY_SHIFT                       28

 #define _CMU_SYNCBUSY_HFXOBSY_MASK                        0x10000000UL

 #define _CMU_SYNCBUSY_HFXOBSY_DEFAULT                     0x00000000UL

 #define CMU_SYNCBUSY_HFXOBSY_DEFAULT                      (_CMU_SYNCBUSY_HFXOBSY_DEFAULT << 28)

 #define CMU_SYNCBUSY_LFXOBSY                              (0x1UL << 29)

 #define _CMU_SYNCBUSY_LFXOBSY_SHIFT                       29

 #define _CMU_SYNCBUSY_LFXOBSY_MASK                        0x20000000UL

 #define _CMU_SYNCBUSY_LFXOBSY_DEFAULT                     0x00000000UL

 #define CMU_SYNCBUSY_LFXOBSY_DEFAULT                      (_CMU_SYNCBUSY_LFXOBSY_DEFAULT << 29)

 /* Bit fields for CMU FREEZE */

 #define _CMU_FREEZE_RESETVALUE                            0x00000000UL

 #define _CMU_FREEZE_MASK                                  0x00000001UL

 #define CMU_FREEZE_REGFREEZE                              (0x1UL << 0)

 #define _CMU_FREEZE_REGFREEZE_SHIFT                       0

 #define _CMU_FREEZE_REGFREEZE_MASK                        0x1UL

 #define _CMU_FREEZE_REGFREEZE_DEFAULT                     0x00000000UL

 #define _CMU_FREEZE_REGFREEZE_UPDATE                      0x00000000UL

 #define _CMU_FREEZE_REGFREEZE_FREEZE                      0x00000001UL

 #define CMU_FREEZE_REGFREEZE_DEFAULT                      (_CMU_FREEZE_REGFREEZE_DEFAULT << 0)

 #define CMU_FREEZE_REGFREEZE_UPDATE                       (_CMU_FREEZE_REGFREEZE_UPDATE << 0)

 #define CMU_FREEZE_REGFREEZE_FREEZE                       (_CMU_FREEZE_REGFREEZE_FREEZE << 0)

 /* Bit fields for CMU PCNTCTRL */

 #define _CMU_PCNTCTRL_RESETVALUE                          0x00000000UL

 #define _CMU_PCNTCTRL_MASK                                0x00000003UL

 #define CMU_PCNTCTRL_PCNT0CLKEN                           (0x1UL << 0)

 #define _CMU_PCNTCTRL_PCNT0CLKEN_SHIFT                    0

 #define _CMU_PCNTCTRL_PCNT0CLKEN_MASK                     0x1UL

 #define _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT                  0x00000000UL

 #define CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT                   (_CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT << 0)

 #define CMU_PCNTCTRL_PCNT0CLKSEL                          (0x1UL << 1)

 #define _CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT                   1

 #define _CMU_PCNTCTRL_PCNT0CLKSEL_MASK                    0x2UL

 #define _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT                 0x00000000UL

 #define _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK                  0x00000000UL

 #define _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0                 0x00000001UL

 #define CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT                  (_CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT << 1)

 #define CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK                   (_CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK << 1)

 #define CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0                  (_CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 << 1)

 /* Bit fields for CMU ADCCTRL */

 #define _CMU_ADCCTRL_RESETVALUE                           0x00000000UL

 #define _CMU_ADCCTRL_MASK                                 0x00000130UL

 #define _CMU_ADCCTRL_ADC0CLKSEL_SHIFT                     4

 #define _CMU_ADCCTRL_ADC0CLKSEL_MASK                      0x30UL

 #define _CMU_ADCCTRL_ADC0CLKSEL_DEFAULT                   0x00000000UL

 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED                  0x00000000UL

 #define _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO                  0x00000001UL

 #define _CMU_ADCCTRL_ADC0CLKSEL_HFXO                      0x00000002UL

 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK                  0x00000003UL

 #define CMU_ADCCTRL_ADC0CLKSEL_DEFAULT                    (_CMU_ADCCTRL_ADC0CLKSEL_DEFAULT << 4)

 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED                   (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4)

 #define CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO                   (_CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO << 4)

 #define CMU_ADCCTRL_ADC0CLKSEL_HFXO                       (_CMU_ADCCTRL_ADC0CLKSEL_HFXO << 4)

 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK                   (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4)

 #define CMU_ADCCTRL_ADC0CLKINV                            (0x1UL << 8)

 #define _CMU_ADCCTRL_ADC0CLKINV_SHIFT                     8

 #define _CMU_ADCCTRL_ADC0CLKINV_MASK                      0x100UL

 #define _CMU_ADCCTRL_ADC0CLKINV_DEFAULT                   0x00000000UL

 #define CMU_ADCCTRL_ADC0CLKINV_DEFAULT                    (_CMU_ADCCTRL_ADC0CLKINV_DEFAULT << 8)

 /* Bit fields for CMU ROUTEPEN */

 #define _CMU_ROUTEPEN_RESETVALUE                          0x00000000UL

 #define _CMU_ROUTEPEN_MASK                                0x10000003UL

 #define CMU_ROUTEPEN_CLKOUT0PEN                           (0x1UL << 0)

 #define _CMU_ROUTEPEN_CLKOUT0PEN_SHIFT                    0

 #define _CMU_ROUTEPEN_CLKOUT0PEN_MASK                     0x1UL

 #define _CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT                  0x00000000UL

 #define CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT                   (_CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT << 0)

 #define CMU_ROUTEPEN_CLKOUT1PEN                           (0x1UL << 1)

 #define _CMU_ROUTEPEN_CLKOUT1PEN_SHIFT                    1

 #define _CMU_ROUTEPEN_CLKOUT1PEN_MASK                     0x2UL

 #define _CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT                  0x00000000UL

 #define CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT                   (_CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT << 1)

 #define CMU_ROUTEPEN_CLKIN0PEN                            (0x1UL << 28)

 #define _CMU_ROUTEPEN_CLKIN0PEN_SHIFT                     28

 #define _CMU_ROUTEPEN_CLKIN0PEN_MASK                      0x10000000UL

 #define _CMU_ROUTEPEN_CLKIN0PEN_DEFAULT                   0x00000000UL

 #define CMU_ROUTEPEN_CLKIN0PEN_DEFAULT                    (_CMU_ROUTEPEN_CLKIN0PEN_DEFAULT << 28)

 /* Bit fields for CMU ROUTELOC0 */

 #define _CMU_ROUTELOC0_RESETVALUE                         0x00000000UL

 #define _CMU_ROUTELOC0_MASK                               0x00000707UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_SHIFT                   0

 #define _CMU_ROUTELOC0_CLKOUT0LOC_MASK                    0x7UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC0                    0x00000000UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT                 0x00000000UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC1                    0x00000001UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC2                    0x00000002UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC3                    0x00000003UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC4                    0x00000004UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC5                    0x00000005UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC6                    0x00000006UL

 #define _CMU_ROUTELOC0_CLKOUT0LOC_LOC7                    0x00000007UL

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC0                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC0 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT                  (_CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC1                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC1 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC2                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC2 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC3                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC3 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC4                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC4 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC5                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC5 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC6                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC6 << 0)

 #define CMU_ROUTELOC0_CLKOUT0LOC_LOC7                     (_CMU_ROUTELOC0_CLKOUT0LOC_LOC7 << 0)

 #define _CMU_ROUTELOC0_CLKOUT1LOC_SHIFT                   8

 #define _CMU_ROUTELOC0_CLKOUT1LOC_MASK                    0x700UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC0                    0x00000000UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT                 0x00000000UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC1                    0x00000001UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC2                    0x00000002UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC3                    0x00000003UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC4                    0x00000004UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC5                    0x00000005UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC6                    0x00000006UL

 #define _CMU_ROUTELOC0_CLKOUT1LOC_LOC7                    0x00000007UL

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC0                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC0 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT                  (_CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC1                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC1 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC2                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC2 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC3                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC3 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC4                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC4 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC5                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC5 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC6                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC6 << 8)

 #define CMU_ROUTELOC0_CLKOUT1LOC_LOC7                     (_CMU_ROUTELOC0_CLKOUT1LOC_LOC7 << 8)

 /* Bit fields for CMU ROUTELOC1 */

 #define _CMU_ROUTELOC1_RESETVALUE                         0x00000000UL

 #define _CMU_ROUTELOC1_MASK                               0x00000007UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_SHIFT                    0

 #define _CMU_ROUTELOC1_CLKIN0LOC_MASK                     0x7UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_LOC0                     0x00000000UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_DEFAULT                  0x00000000UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_LOC1                     0x00000001UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_LOC2                     0x00000002UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_LOC3                     0x00000003UL

 #define _CMU_ROUTELOC1_CLKIN0LOC_LOC4                     0x00000004UL

 #define CMU_ROUTELOC1_CLKIN0LOC_LOC0                      (_CMU_ROUTELOC1_CLKIN0LOC_LOC0 << 0)

 #define CMU_ROUTELOC1_CLKIN0LOC_DEFAULT                   (_CMU_ROUTELOC1_CLKIN0LOC_DEFAULT << 0)

 #define CMU_ROUTELOC1_CLKIN0LOC_LOC1                      (_CMU_ROUTELOC1_CLKIN0LOC_LOC1 << 0)

 #define CMU_ROUTELOC1_CLKIN0LOC_LOC2                      (_CMU_ROUTELOC1_CLKIN0LOC_LOC2 << 0)

 #define CMU_ROUTELOC1_CLKIN0LOC_LOC3                      (_CMU_ROUTELOC1_CLKIN0LOC_LOC3 << 0)

 #define CMU_ROUTELOC1_CLKIN0LOC_LOC4                      (_CMU_ROUTELOC1_CLKIN0LOC_LOC4 << 0)

 /* Bit fields for CMU LOCK */

 #define _CMU_LOCK_RESETVALUE                              0x00000000UL

 #define _CMU_LOCK_MASK                                    0x0000FFFFUL

 #define _CMU_LOCK_LOCKKEY_SHIFT                           0

 #define _CMU_LOCK_LOCKKEY_MASK                            0xFFFFUL

 #define _CMU_LOCK_LOCKKEY_DEFAULT                         0x00000000UL

 #define _CMU_LOCK_LOCKKEY_LOCK                            0x00000000UL

 #define _CMU_LOCK_LOCKKEY_UNLOCKED                        0x00000000UL

 #define _CMU_LOCK_LOCKKEY_LOCKED                          0x00000001UL

 #define _CMU_LOCK_LOCKKEY_UNLOCK                          0x0000580EUL

 #define CMU_LOCK_LOCKKEY_DEFAULT                          (_CMU_LOCK_LOCKKEY_DEFAULT << 0)

 #define CMU_LOCK_LOCKKEY_LOCK                             (_CMU_LOCK_LOCKKEY_LOCK << 0)

 #define CMU_LOCK_LOCKKEY_UNLOCKED                         (_CMU_LOCK_LOCKKEY_UNLOCKED << 0)

 #define CMU_LOCK_LOCKKEY_LOCKED                           (_CMU_LOCK_LOCKKEY_LOCKED << 0)

 #define CMU_LOCK_LOCKKEY_UNLOCK                           (_CMU_LOCK_LOCKKEY_UNLOCK << 0)

 /* Bit fields for CMU HFRCOSS */

 #define _CMU_HFRCOSS_RESETVALUE                           0x00000000UL

 #define _CMU_HFRCOSS_MASK                                 0x00001F07UL

 #define _CMU_HFRCOSS_SSAMP_SHIFT                          0

 #define _CMU_HFRCOSS_SSAMP_MASK                           0x7UL

 #define _CMU_HFRCOSS_SSAMP_DEFAULT                        0x00000000UL

 #define CMU_HFRCOSS_SSAMP_DEFAULT                         (_CMU_HFRCOSS_SSAMP_DEFAULT << 0)

 #define _CMU_HFRCOSS_SSINV_SHIFT                          8

 #define _CMU_HFRCOSS_SSINV_MASK                           0x1F00UL

 #define _CMU_HFRCOSS_SSINV_DEFAULT                        0x00000000UL

 #define CMU_HFRCOSS_SSINV_DEFAULT                         (_CMU_HFRCOSS_SSINV_DEFAULT << 8)

CMU_TypeDef::LFECLKEN0
__IOM uint32_t LFECLKEN0
Definition: efr32bg13p_cmu.h:98

CMU_TypeDef::DBGCLKSEL
__IOM uint32_t DBGCLKSEL
Definition: efr32bg13p_cmu.h:71

CMU_TypeDef::LFACLKSEL
__IOM uint32_t LFACLKSEL
Definition: efr32bg13p_cmu.h:74

CMU_TypeDef::CALCTRL
__IOM uint32_t CALCTRL
Definition: efr32bg13p_cmu.h:65

CMU_TypeDef::HFCOREPRESC
__IOM uint32_t HFCOREPRESC
Definition: efr32bg13p_cmu.h:103

CMU_TypeDef::HFRCOSS
__IOM uint32_t HFRCOSS
Definition: efr32bg13p_cmu.h:131

CMU_TypeDef::ROUTELOC1
__IOM uint32_t ROUTELOC1
Definition: efr32bg13p_cmu.h:128

CMU_TypeDef::HFEXPPRESC
__IOM uint32_t HFEXPPRESC
Definition: efr32bg13p_cmu.h:107

CMU_TypeDef::HFXOCTRL
__IOM uint32_t HFXOCTRL
Definition: efr32bg13p_cmu.h:53

CMU_TypeDef::IF
__IM uint32_t IF
Definition: efr32bg13p_cmu.h:83

CMU_TypeDef::IEN
__IOM uint32_t IEN
Definition: efr32bg13p_cmu.h:86

CMU_TypeDef::LFACLKEN0
__IOM uint32_t LFACLKEN0
Definition: efr32bg13p_cmu.h:93

CMU_TypeDef::HFXOSTEADYSTATECTRL
__IOM uint32_t HFXOSTEADYSTATECTRL
Definition: efr32bg13p_cmu.h:57

CMU_TypeDef::DPLLCTRL1
__IOM uint32_t DPLLCTRL1
Definition: efr32bg13p_cmu.h:63

CMU_TypeDef::PCNTCTRL
__IOM uint32_t PCNTCTRL
Definition: efr32bg13p_cmu.h:120

CMU_TypeDef::LFAPRESC0
__IOM uint32_t LFAPRESC0
Definition: efr32bg13p_cmu.h:110

CMU_TypeDef::IFC
__IOM uint32_t IFC
Definition: efr32bg13p_cmu.h:85

CMU_TypeDef::ROUTELOC0
__IOM uint32_t ROUTELOC0
Definition: efr32bg13p_cmu.h:127

CMU_TypeDef::HFBUSCLKEN0
__IOM uint32_t HFBUSCLKEN0
Definition: efr32bg13p_cmu.h:87

CMU_TypeDef::CTRL
__IOM uint32_t CTRL
Definition: efr32bg13p_cmu.h:43

CMU_TypeDef::LFBPRESC0
__IOM uint32_t LFBPRESC0
Definition: efr32bg13p_cmu.h:112

CMU_TypeDef::HFCLKSEL
__IOM uint32_t HFCLKSEL
Definition: efr32bg13p_cmu.h:72

CMU_TypeDef::DPLLCTRL
__IOM uint32_t DPLLCTRL
Definition: efr32bg13p_cmu.h:62

CMU_TypeDef::AUXHFRCOCTRL
__IOM uint32_t AUXHFRCOCTRL
Definition: efr32bg13p_cmu.h:49

CMU_TypeDef::OSCENCMD
__IOM uint32_t OSCENCMD
Definition: efr32bg13p_cmu.h:68

CMU_TypeDef::FREEZE
__IOM uint32_t FREEZE
Definition: efr32bg13p_cmu.h:118

CMU_TypeDef::STATUS
__IM uint32_t STATUS
Definition: efr32bg13p_cmu.h:79

CMU_TypeDef::LFBCLKEN0
__IOM uint32_t LFBCLKEN0
Definition: efr32bg13p_cmu.h:95

CMU_TypeDef::CALCNT
__IOM uint32_t CALCNT
Definition: efr32bg13p_cmu.h:66

CMU_TypeDef::HFPERCLKEN0
__IOM uint32_t HFPERCLKEN0
Definition: efr32bg13p_cmu.h:90

CMU_TypeDef::ROUTEPEN
__IOM uint32_t ROUTEPEN
Definition: efr32bg13p_cmu.h:126

CMU_TypeDef::IFS
__IOM uint32_t IFS
Definition: efr32bg13p_cmu.h:84

CMU_TypeDef::LFXOCTRL
__IOM uint32_t LFXOCTRL
Definition: efr32bg13p_cmu.h:59

CMU_TypeDef::HFXOTRIMSTATUS
__IM uint32_t HFXOTRIMSTATUS
Definition: efr32bg13p_cmu.h:82

CMU_TypeDef::HFRCOCTRL
__IOM uint32_t HFRCOCTRL
Definition: efr32bg13p_cmu.h:46

CMU_TypeDef::LFEPRESC0
__IOM uint32_t LFEPRESC0
Definition: efr32bg13p_cmu.h:114

CMU_TypeDef
Definition: efr32bg13p_cmu.h:41

CMU_TypeDef::HFCLKSTATUS
__IM uint32_t HFCLKSTATUS
Definition: efr32bg13p_cmu.h:80

CMU_TypeDef::HFXOTIMEOUTCTRL
__IOM uint32_t HFXOTIMEOUTCTRL
Definition: efr32bg13p_cmu.h:58

CMU_TypeDef::CMD
__IOM uint32_t CMD
Definition: efr32bg13p_cmu.h:69

CMU_TypeDef::HFPRESC
__IOM uint32_t HFPRESC
Definition: efr32bg13p_cmu.h:100

CMU_TypeDef::HFPERPRESC
__IOM uint32_t HFPERPRESC
Definition: efr32bg13p_cmu.h:104

CMU_TypeDef::SYNCBUSY
__IM uint32_t SYNCBUSY
Definition: efr32bg13p_cmu.h:117

CMU_TypeDef::HFXOSTARTUPCTRL
__IOM uint32_t HFXOSTARTUPCTRL
Definition: efr32bg13p_cmu.h:56

CMU_TypeDef::ADCCTRL
__IOM uint32_t ADCCTRL
Definition: efr32bg13p_cmu.h:123

CMU_TypeDef::LFRCOCTRL
__IOM uint32_t LFRCOCTRL
Definition: efr32bg13p_cmu.h:52

CMU_TypeDef::LFBCLKSEL
__IOM uint32_t LFBCLKSEL
Definition: efr32bg13p_cmu.h:75

CMU_TypeDef::LOCK
__IOM uint32_t LOCK
Definition: efr32bg13p_cmu.h:130

CMU_TypeDef::LFECLKSEL
__IOM uint32_t LFECLKSEL
Definition: efr32bg13p_cmu.h:76