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EFR32 Blue Gecko 12 Software Documentation
efr32bg12-doc-5.1.2
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EFR32 Blue Gecko 12 Software Documentation
efr32bg12-doc-5.1.2
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Macros | |
| #define | __CM4_REV 0x001 |
| #define | _EFR32_BLUE_FAMILY 1 |
| #define | _EFR_DEVICE |
| #define | _SILICON_LABS_32B_PLATFORM 2 |
| #define | _SILICON_LABS_32B_PLATFORM_2 |
| #define | _SILICON_LABS_32B_PLATFORM_2_GEN 2 |
| #define | _SILICON_LABS_32B_PLATFORM_2_GEN_2 |
| #define | _SILICON_LABS_32B_SERIES 1 |
| #define | _SILICON_LABS_32B_SERIES_1 |
| #define | _SILICON_LABS_32B_SERIES_1_CONFIG 2 |
| #define | _SILICON_LABS_32B_SERIES_1_CONFIG_2 |
| #define | _SILICON_LABS_EFR32_RADIO_2G4HZ 2 |
| #define | _SILICON_LABS_EFR32_RADIO_DUALBAND 3 |
| #define | _SILICON_LABS_EFR32_RADIO_SUBGHZ 1 |
| #define | _SILICON_LABS_EFR32_RADIO_TYPE _SILICON_LABS_EFR32_RADIO_DUALBAND |
| #define | _SILICON_LABS_GECKO_INTERNAL_SDID 84 /** Silicon Labs internal use only, may change any time */ |
| #define | _SILICON_LABS_GECKO_INTERNAL_SDID_84 /** Silicon Labs internal use only, may change any time */ |
| #define | ACMP_COUNT 2 |
| #define | ACMP_PRESENT |
| #define | ADC_COUNT 1 |
| #define | ADC_PRESENT |
| #define | AFACHAN_MAX 125 |
| #define | AFCHAN_MAX 136 |
| #define | AFCHANLOC_MAX 32 |
| #define | BITBAND_PER_BASE ((uint32_t) 0x42000000UL) |
| #define | BITBAND_RAM_BASE ((uint32_t) 0x22000000UL) |
| #define | BOOTLOADER_COUNT 1 |
| #define | BOOTLOADER_PRESENT |
| #define | CMU_COUNT 1 |
| #define | CMU_PRESENT |
| #define | CRYOTIMER_COUNT 1 |
| #define | CRYOTIMER_PRESENT |
| #define | CRYPTO0_BITCLR_MEM_BASE ((uint32_t) 0x440F0000UL) |
| #define | CRYPTO0_BITCLR_MEM_BITS ((uint32_t) 0x0000000AUL) |
| #define | CRYPTO0_BITCLR_MEM_END ((uint32_t) 0x440F03FFUL) |
| #define | CRYPTO0_BITCLR_MEM_SIZE ((uint32_t) 0x400UL) |
| #define | CRYPTO0_BITSET_MEM_BASE ((uint32_t) 0x460F0000UL) |
| #define | CRYPTO0_BITSET_MEM_BITS ((uint32_t) 0x0000000AUL) |
| #define | CRYPTO0_BITSET_MEM_END ((uint32_t) 0x460F03FFUL) |
| #define | CRYPTO0_BITSET_MEM_SIZE ((uint32_t) 0x400UL) |
| #define | CRYPTO0_MEM_BASE ((uint32_t) 0x400F0000UL) |
| #define | CRYPTO0_MEM_BITS ((uint32_t) 0x0000000AUL) |
| #define | CRYPTO0_MEM_END ((uint32_t) 0x400F03FFUL) |
| #define | CRYPTO0_MEM_SIZE ((uint32_t) 0x400UL) |
| #define | CRYPTO1_BITCLR_MEM_BASE ((uint32_t) 0x440F0400UL) |
| #define | CRYPTO1_BITCLR_MEM_BITS ((uint32_t) 0x0000000AUL) |
| #define | CRYPTO1_BITCLR_MEM_END ((uint32_t) 0x440F07FFUL) |
| #define | CRYPTO1_BITCLR_MEM_SIZE ((uint32_t) 0x400UL) |
| #define | CRYPTO1_BITSET_MEM_BASE ((uint32_t) 0x460F0400UL) |
| #define | CRYPTO1_BITSET_MEM_BITS ((uint32_t) 0x0000000AUL) |
| #define | CRYPTO1_BITSET_MEM_END ((uint32_t) 0x460F07FFUL) |
| #define | CRYPTO1_BITSET_MEM_SIZE ((uint32_t) 0x400UL) |
| #define | CRYPTO1_MEM_BASE ((uint32_t) 0x400F0400UL) |
| #define | CRYPTO1_MEM_BITS ((uint32_t) 0x0000000AUL) |
| #define | CRYPTO1_MEM_END ((uint32_t) 0x400F07FFUL) |
| #define | CRYPTO1_MEM_SIZE ((uint32_t) 0x400UL) |
| #define | CRYPTO_BITCLR_MEM_BASE CRYPTO0_BITCLR_MEM_BASE |
| #define | CRYPTO_BITCLR_MEM_BITS CRYPTO0_BITCLR_MEM_BITS |
| #define | CRYPTO_BITCLR_MEM_END CRYPTO0_BITCLR_MEM_END |
| #define | CRYPTO_BITCLR_MEM_SIZE CRYPTO0_BITCLR_MEM_SIZE |
| #define | CRYPTO_BITSET_MEM_BASE CRYPTO0_BITSET_MEM_BASE |
| #define | CRYPTO_BITSET_MEM_BITS CRYPTO0_BITSET_MEM_BITS |
| #define | CRYPTO_BITSET_MEM_END CRYPTO0_BITSET_MEM_END |
| #define | CRYPTO_BITSET_MEM_SIZE CRYPTO0_BITSET_MEM_SIZE |
| #define | CRYPTO_COUNT 2 |
| #define | CRYPTO_MEM_BASE CRYPTO0_MEM_BASE |
| #define | CRYPTO_MEM_BITS CRYPTO0_MEM_BITS |
| #define | CRYPTO_MEM_END CRYPTO0_MEM_END |
| #define | CRYPTO_MEM_SIZE CRYPTO0_MEM_SIZE |
| #define | CRYPTO_PRESENT |
| #define | CSEN_COUNT 1 |
| #define | CSEN_PRESENT |
| #define | DMA_CHAN_COUNT 8 |
| #define | EMU_COUNT 1 |
| #define | EMU_PRESENT |
| #define | ETM_COUNT 1 |
| #define | ETM_PRESENT |
| #define | EXT_IRQ_COUNT 51 |
| #define | FLASH_BASE (0x00000000UL) |
| #define | FLASH_MEM_BASE ((uint32_t) 0x00000000UL) |
| #define | FLASH_MEM_BITS ((uint32_t) 0x0000001CUL) |
| #define | FLASH_MEM_END ((uint32_t) 0x0FFFFFFFUL) |
| #define | FLASH_MEM_SIZE ((uint32_t) 0x10000000UL) |
| #define | FLASH_PAGE_SIZE 2048 |
| #define | FLASH_SIZE (0x00100000UL) |
| #define | FPUEH_COUNT 1 |
| #define | FPUEH_PRESENT |
| #define | GPCRC_COUNT 1 |
| #define | GPCRC_PRESENT |
| #define | GPIO_COUNT 1 |
| #define | GPIO_PRESENT |
| #define | I2C_COUNT 2 |
| #define | I2C_PRESENT |
| #define | IDAC_COUNT 1 |
| #define | IDAC_PRESENT |
| #define | LDMA_COUNT 1 |
| #define | LDMA_PRESENT |
| #define | LESENSE_COUNT 1 |
| #define | LESENSE_PRESENT |
| #define | LETIMER_COUNT 1 |
| #define | LETIMER_PRESENT |
| #define | LEUART_COUNT 1 |
| #define | LEUART_PRESENT |
| #define | MSC_COUNT 1 |
| #define | MSC_PRESENT |
| #define | PART_NUMBER "EFR32BG12P433F1024GL125" |
| #define | PCNT_COUNT 3 |
| #define | PCNT_PRESENT |
| #define | PER_BITCLR_MEM_BASE ((uint32_t) 0x44000000UL) |
| #define | PER_BITCLR_MEM_BITS ((uint32_t) 0x00000014UL) |
| #define | PER_BITCLR_MEM_END ((uint32_t) 0x440EFFFFUL) |
| #define | PER_BITCLR_MEM_SIZE ((uint32_t) 0xF0000UL) |
| #define | PER_BITSET_MEM_BASE ((uint32_t) 0x46000000UL) |
| #define | PER_BITSET_MEM_BITS ((uint32_t) 0x00000014UL) |
| #define | PER_BITSET_MEM_END ((uint32_t) 0x460EFFFFUL) |
| #define | PER_BITSET_MEM_SIZE ((uint32_t) 0xF0000UL) |
| #define | PER_MEM_BASE ((uint32_t) 0x40000000UL) |
| #define | PER_MEM_BITS ((uint32_t) 0x00000014UL) |
| #define | PER_MEM_END ((uint32_t) 0x400EFFFFUL) |
| #define | PER_MEM_SIZE ((uint32_t) 0xF0000UL) |
| #define | PRS_CHAN_COUNT 12 |
| #define | PRS_COUNT 1 |
| #define | PRS_PRESENT |
| #define | RAM0_CODE_MEM_BASE ((uint32_t) 0x10000000UL) |
| #define | RAM0_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
| #define | RAM0_CODE_MEM_END ((uint32_t) 0x1001FFFFUL) |
| #define | RAM0_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
| #define | RAM1_CODE_MEM_BASE ((uint32_t) 0x10020000UL) |
| #define | RAM1_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
| #define | RAM1_CODE_MEM_END ((uint32_t) 0x1003FFFFUL) |
| #define | RAM1_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
| #define | RAM1_MEM_BASE ((uint32_t) 0x20020000UL) |
| #define | RAM1_MEM_BITS ((uint32_t) 0x00000011UL) |
| #define | RAM1_MEM_END ((uint32_t) 0x2003FFFFUL) |
| #define | RAM1_MEM_SIZE ((uint32_t) 0x20000UL) |
| #define | RAM2_CODE_MEM_BASE ((uint32_t) 0x10040000UL) |
| #define | RAM2_CODE_MEM_BITS ((uint32_t) 0x0000000BUL) |
| #define | RAM2_CODE_MEM_END ((uint32_t) 0x100407FFUL) |
| #define | RAM2_CODE_MEM_SIZE ((uint32_t) 0x800UL) |
| #define | RAM2_MEM_BASE ((uint32_t) 0x20040000UL) |
| #define | RAM2_MEM_BITS ((uint32_t) 0x0000000BUL) |
| #define | RAM2_MEM_END ((uint32_t) 0x200407FFUL) |
| #define | RAM2_MEM_SIZE ((uint32_t) 0x800UL) |
| #define | RAM_MEM_BASE ((uint32_t) 0x20000000UL) |
| #define | RAM_MEM_BITS ((uint32_t) 0x00000011UL) |
| #define | RAM_MEM_END ((uint32_t) 0x2001FFFFUL) |
| #define | RAM_MEM_SIZE ((uint32_t) 0x20000UL) |
| #define | RMU_COUNT 1 |
| #define | RMU_PRESENT |
| #define | RTCC_COUNT 1 |
| #define | RTCC_PRESENT |
| #define | SMU_COUNT 1 |
| #define | SMU_PRESENT |
| #define | SRAM_BASE (0x20000000UL) |
| #define | SRAM_SIZE (0x00040000UL) |
| #define | SYSTICK_COUNT 1 |
| #define | SYSTICK_PRESENT |
| #define | TIMER_COUNT 2 |
| #define | TIMER_PRESENT |
| #define | TRNG_COUNT 1 |
| #define | TRNG_PRESENT |
| #define | USART_COUNT 4 |
| #define | USART_PRESENT |
| #define | VDAC_COUNT 1 |
| #define | VDAC_PRESENT |
| #define | WDOG_COUNT 2 |
| #define | WDOG_PRESENT |
| #define | WTIMER_COUNT 2 |
| #define | WTIMER_PRESENT |
| #define __CM4_REV 0x001 |
Cortex-M4 Core revision r0p1
Definition at line 243 of file efr32bg12p433f1024gl125.h.
| #define _EFR32_BLUE_FAMILY 1 |
Part family BLUE Gecko RF SoC Family
Definition at line 130 of file efr32bg12p433f1024gl125.h.
| #define _EFR_DEVICE |
Silicon Labs EFR-type RF SoC
Definition at line 131 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_PLATFORM 2 |
Definition at line 143 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_PLATFORM_2 |
Definition at line 142 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_PLATFORM_2_GEN 2 |
Definition at line 145 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_PLATFORM_2_GEN_2 |
Definition at line 144 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_SERIES 1 |
Silicon Labs series number
Definition at line 133 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_SERIES_1 |
Silicon Labs series number
Definition at line 132 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_SERIES_1_CONFIG 2 |
Series 1, Configuration 2
Definition at line 135 of file efr32bg12p433f1024gl125.h.
| #define _SILICON_LABS_32B_SERIES_1_CONFIG_2 |
Series 1, Configuration 2
Definition at line 134 of file efr32bg12p433f1024gl125.h.
| #define ACMP_COUNT 2 |
2 ACMPs available
Definition at line 275 of file efr32bg12p433f1024gl125.h.
| #define ACMP_PRESENT |
ACMP is available in this part
Definition at line 274 of file efr32bg12p433f1024gl125.h.
| #define ADC_COUNT 1 |
1 ADCs available
Definition at line 273 of file efr32bg12p433f1024gl125.h.
| #define ADC_PRESENT |
ADC is available in this part
Definition at line 272 of file efr32bg12p433f1024gl125.h.
| #define AFACHAN_MAX 125 |
Analog AF channels
Definition at line 252 of file efr32bg12p433f1024gl125.h.
| #define AFCHAN_MAX 136 |
AF channels connect the different on-chip peripherals with the af-mux
Definition at line 249 of file efr32bg12p433f1024gl125.h.
| #define BITBAND_PER_BASE ((uint32_t) 0x42000000UL) |
Bit banding area Peripheral Address Space bit-band area
Definition at line 234 of file efr32bg12p433f1024gl125.h.
Referenced by BUS_RegBitRead(), and BUS_RegBitWrite().
| #define BITBAND_RAM_BASE ((uint32_t) 0x22000000UL) |
SRAM Address Space bit-band area
Definition at line 235 of file efr32bg12p433f1024gl125.h.
Referenced by BUS_RamBitRead(), and BUS_RamBitWrite().
| #define CRYPTO0_BITCLR_MEM_BASE ((uint32_t) 0x440F0000UL) |
CRYPTO0_BITCLR base address
Definition at line 208 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITCLR_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO0_BITCLR used bits
Definition at line 211 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITCLR_MEM_END ((uint32_t) 0x440F03FFUL) |
CRYPTO0_BITCLR end address
Definition at line 210 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITCLR_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO0_BITCLR available address space
Definition at line 209 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITSET_MEM_BASE ((uint32_t) 0x460F0000UL) |
CRYPTO0_BITSET base address
Definition at line 200 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITSET_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO0_BITSET used bits
Definition at line 203 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITSET_MEM_END ((uint32_t) 0x460F03FFUL) |
CRYPTO0_BITSET end address
Definition at line 202 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_BITSET_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO0_BITSET available address space
Definition at line 201 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_MEM_BASE ((uint32_t) 0x400F0000UL) |
CRYPTO0 base address
Definition at line 188 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO0 used bits
Definition at line 191 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_MEM_END ((uint32_t) 0x400F03FFUL) |
CRYPTO0 end address
Definition at line 190 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO0_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO0 available address space
Definition at line 189 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITCLR_MEM_BASE ((uint32_t) 0x440F0400UL) |
CRYPTO1_BITCLR base address
Definition at line 168 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITCLR_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO1_BITCLR used bits
Definition at line 171 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITCLR_MEM_END ((uint32_t) 0x440F07FFUL) |
CRYPTO1_BITCLR end address
Definition at line 170 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITCLR_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO1_BITCLR available address space
Definition at line 169 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITSET_MEM_BASE ((uint32_t) 0x460F0400UL) |
CRYPTO1_BITSET base address
Definition at line 220 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITSET_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO1_BITSET used bits
Definition at line 223 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITSET_MEM_END ((uint32_t) 0x460F07FFUL) |
CRYPTO1_BITSET end address
Definition at line 222 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_BITSET_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO1_BITSET available address space
Definition at line 221 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_MEM_BASE ((uint32_t) 0x400F0400UL) |
CRYPTO1 base address
Definition at line 180 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO1 used bits
Definition at line 183 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_MEM_END ((uint32_t) 0x400F07FFUL) |
CRYPTO1 end address
Definition at line 182 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO1_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO1 available address space
Definition at line 181 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITCLR_MEM_BASE CRYPTO0_BITCLR_MEM_BASE |
Alias for CRYPTO0_BITCLR_MEM_BASE
Definition at line 212 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITCLR_MEM_BITS CRYPTO0_BITCLR_MEM_BITS |
Alias for CRYPTO0_BITCLR_MEM_BITS
Definition at line 215 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITCLR_MEM_END CRYPTO0_BITCLR_MEM_END |
Alias for CRYPTO0_BITCLR_MEM_END
Definition at line 214 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITCLR_MEM_SIZE CRYPTO0_BITCLR_MEM_SIZE |
Alias for CRYPTO0_BITCLR_MEM_SIZE
Definition at line 213 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITSET_MEM_BASE CRYPTO0_BITSET_MEM_BASE |
Alias for CRYPTO0_BITSET_MEM_BASE
Definition at line 204 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITSET_MEM_BITS CRYPTO0_BITSET_MEM_BITS |
Alias for CRYPTO0_BITSET_MEM_BITS
Definition at line 207 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITSET_MEM_END CRYPTO0_BITSET_MEM_END |
Alias for CRYPTO0_BITSET_MEM_END
Definition at line 206 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_BITSET_MEM_SIZE CRYPTO0_BITSET_MEM_SIZE |
Alias for CRYPTO0_BITSET_MEM_SIZE
Definition at line 205 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_COUNT 2 |
2 CRYPTOs available
Definition at line 257 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_MEM_BASE CRYPTO0_MEM_BASE |
Alias for CRYPTO0_MEM_BASE
Definition at line 192 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_MEM_BITS CRYPTO0_MEM_BITS |
Alias for CRYPTO0_MEM_BITS
Definition at line 195 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_MEM_END CRYPTO0_MEM_END |
Alias for CRYPTO0_MEM_END
Definition at line 194 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_MEM_SIZE CRYPTO0_MEM_SIZE |
Alias for CRYPTO0_MEM_SIZE
Definition at line 193 of file efr32bg12p433f1024gl125.h.
| #define CRYPTO_PRESENT |
CRYPTO is available in this part
Definition at line 256 of file efr32bg12p433f1024gl125.h.
| #define DMA_CHAN_COUNT 8 |
Number of DMA channels
Definition at line 245 of file efr32bg12p433f1024gl125.h.
Referenced by NANDFLASH_Init().
| #define EXT_IRQ_COUNT 51 |
Number of External (NVIC) interrupts
Definition at line 246 of file efr32bg12p433f1024gl125.h.
Referenced by CORE_GetNvicRamTableHandler(), CORE_IrqIsBlocked(), CORE_NvicIRQDisabled(), CORE_NvicMaskClearIRQ(), CORE_NvicMaskSetIRQ(), and CORE_SetNvicRamTableHandler().
| #define FLASH_BASE (0x00000000UL) |
Flash and SRAM limits for EFR32BG12P433F1024GL125 Flash Base Address
Definition at line 238 of file efr32bg12p433f1024gl125.h.
| #define FLASH_MEM_BASE ((uint32_t) 0x00000000UL) |
FLASH base address
Definition at line 184 of file efr32bg12p433f1024gl125.h.
| #define FLASH_MEM_BITS ((uint32_t) 0x0000001CUL) |
FLASH used bits
Definition at line 187 of file efr32bg12p433f1024gl125.h.
| #define FLASH_MEM_END ((uint32_t) 0x0FFFFFFFUL) |
FLASH end address
Definition at line 186 of file efr32bg12p433f1024gl125.h.
| #define FLASH_MEM_SIZE ((uint32_t) 0x10000000UL) |
FLASH available address space
Definition at line 185 of file efr32bg12p433f1024gl125.h.
| #define FLASH_PAGE_SIZE 2048 |
Flash Memory page size (interleaving off)
Definition at line 240 of file efr32bg12p433f1024gl125.h.
Referenced by MSC_ErasePage(), and SYSTEM_GetFlashPageSize().
| #define FLASH_SIZE (0x00100000UL) |
Available Flash Memory
Definition at line 239 of file efr32bg12p433f1024gl125.h.
| #define I2C_COUNT 2 |
2 I2Cs available
Definition at line 271 of file efr32bg12p433f1024gl125.h.
| #define I2C_PRESENT |
I2C is available in this part
Definition at line 270 of file efr32bg12p433f1024gl125.h.
| #define IDAC_COUNT 1 |
1 IDACs available
Definition at line 277 of file efr32bg12p433f1024gl125.h.
| #define IDAC_PRESENT |
IDAC is available in this part
Definition at line 276 of file efr32bg12p433f1024gl125.h.
| #define LETIMER_COUNT 1 |
1 LETIMERs available
Definition at line 267 of file efr32bg12p433f1024gl125.h.
| #define LETIMER_PRESENT |
LETIMER is available in this part
Definition at line 266 of file efr32bg12p433f1024gl125.h.
| #define LEUART_COUNT 1 |
1 LEUARTs available
Definition at line 265 of file efr32bg12p433f1024gl125.h.
| #define LEUART_PRESENT |
LEUART is available in this part
Definition at line 264 of file efr32bg12p433f1024gl125.h.
| #define PART_NUMBER "EFR32BG12P433F1024GL125" |
Configure part number Part Number
Definition at line 153 of file efr32bg12p433f1024gl125.h.
| #define PCNT_COUNT 3 |
3 PCNTs available
Definition at line 269 of file efr32bg12p433f1024gl125.h.
Referenced by CMU_PCNTClockExternalSet().
| #define PCNT_PRESENT |
PCNT is available in this part
Definition at line 268 of file efr32bg12p433f1024gl125.h.
| #define PER_BITCLR_MEM_BASE ((uint32_t) 0x44000000UL) |
PER_BITCLR base address
Definition at line 196 of file efr32bg12p433f1024gl125.h.
Referenced by BUS_RegMaskedClear().
| #define PER_BITCLR_MEM_BITS ((uint32_t) 0x00000014UL) |
PER_BITCLR used bits
Definition at line 199 of file efr32bg12p433f1024gl125.h.
| #define PER_BITCLR_MEM_END ((uint32_t) 0x440EFFFFUL) |
PER_BITCLR end address
Definition at line 198 of file efr32bg12p433f1024gl125.h.
| #define PER_BITCLR_MEM_SIZE ((uint32_t) 0xF0000UL) |
PER_BITCLR available address space
Definition at line 197 of file efr32bg12p433f1024gl125.h.
| #define PER_BITSET_MEM_BASE ((uint32_t) 0x46000000UL) |
PER_BITSET base address
Definition at line 216 of file efr32bg12p433f1024gl125.h.
Referenced by BUS_RegMaskedSet().
| #define PER_BITSET_MEM_BITS ((uint32_t) 0x00000014UL) |
PER_BITSET used bits
Definition at line 219 of file efr32bg12p433f1024gl125.h.
| #define PER_BITSET_MEM_END ((uint32_t) 0x460EFFFFUL) |
PER_BITSET end address
Definition at line 218 of file efr32bg12p433f1024gl125.h.
| #define PER_BITSET_MEM_SIZE ((uint32_t) 0xF0000UL) |
PER_BITSET available address space
Definition at line 217 of file efr32bg12p433f1024gl125.h.
| #define PER_MEM_BASE ((uint32_t) 0x40000000UL) |
PER base address
Definition at line 172 of file efr32bg12p433f1024gl125.h.
Referenced by BUS_RegBitRead(), BUS_RegBitWrite(), BUS_RegMaskedClear(), and BUS_RegMaskedSet().
| #define PER_MEM_BITS ((uint32_t) 0x00000014UL) |
PER used bits
Definition at line 175 of file efr32bg12p433f1024gl125.h.
| #define PER_MEM_END ((uint32_t) 0x400EFFFFUL) |
PER end address
Definition at line 174 of file efr32bg12p433f1024gl125.h.
| #define PER_MEM_SIZE ((uint32_t) 0xF0000UL) |
PER available address space
Definition at line 173 of file efr32bg12p433f1024gl125.h.
| #define PRS_CHAN_COUNT 12 |
Number of PRS channels
Definition at line 244 of file efr32bg12p433f1024gl125.h.
Referenced by PRS_SourceAsyncSignalSet(), and PRS_SourceSignalSet().
| #define RAM0_CODE_MEM_BASE ((uint32_t) 0x10000000UL) |
Memory Base addresses and limits RAM0_CODE base address
Definition at line 156 of file efr32bg12p433f1024gl125.h.
| #define RAM0_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM0_CODE used bits
Definition at line 159 of file efr32bg12p433f1024gl125.h.
| #define RAM0_CODE_MEM_END ((uint32_t) 0x1001FFFFUL) |
RAM0_CODE end address
Definition at line 158 of file efr32bg12p433f1024gl125.h.
| #define RAM0_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM0_CODE available address space
Definition at line 157 of file efr32bg12p433f1024gl125.h.
| #define RAM1_CODE_MEM_BASE ((uint32_t) 0x10020000UL) |
RAM1_CODE base address
Definition at line 176 of file efr32bg12p433f1024gl125.h.
| #define RAM1_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM1_CODE used bits
Definition at line 179 of file efr32bg12p433f1024gl125.h.
| #define RAM1_CODE_MEM_END ((uint32_t) 0x1003FFFFUL) |
RAM1_CODE end address
Definition at line 178 of file efr32bg12p433f1024gl125.h.
| #define RAM1_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM1_CODE available address space
Definition at line 177 of file efr32bg12p433f1024gl125.h.
| #define RAM1_MEM_BASE ((uint32_t) 0x20020000UL) |
RAM1 base address
Definition at line 164 of file efr32bg12p433f1024gl125.h.
Referenced by EMU_RamPowerDown().
| #define RAM1_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM1 used bits
Definition at line 167 of file efr32bg12p433f1024gl125.h.
| #define RAM1_MEM_END ((uint32_t) 0x2003FFFFUL) |
RAM1 end address
Definition at line 166 of file efr32bg12p433f1024gl125.h.
Referenced by EMU_RamPowerDown().
| #define RAM1_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM1 available address space
Definition at line 165 of file efr32bg12p433f1024gl125.h.
| #define RAM2_CODE_MEM_BASE ((uint32_t) 0x10040000UL) |
RAM2_CODE base address
Definition at line 224 of file efr32bg12p433f1024gl125.h.
| #define RAM2_CODE_MEM_BITS ((uint32_t) 0x0000000BUL) |
RAM2_CODE used bits
Definition at line 227 of file efr32bg12p433f1024gl125.h.
| #define RAM2_CODE_MEM_END ((uint32_t) 0x100407FFUL) |
RAM2_CODE end address
Definition at line 226 of file efr32bg12p433f1024gl125.h.
| #define RAM2_CODE_MEM_SIZE ((uint32_t) 0x800UL) |
RAM2_CODE available address space
Definition at line 225 of file efr32bg12p433f1024gl125.h.
| #define RAM2_MEM_BASE ((uint32_t) 0x20040000UL) |
RAM2 base address
Definition at line 160 of file efr32bg12p433f1024gl125.h.
| #define RAM2_MEM_BITS ((uint32_t) 0x0000000BUL) |
RAM2 used bits
Definition at line 163 of file efr32bg12p433f1024gl125.h.
| #define RAM2_MEM_END ((uint32_t) 0x200407FFUL) |
RAM2 end address
Definition at line 162 of file efr32bg12p433f1024gl125.h.
| #define RAM2_MEM_SIZE ((uint32_t) 0x800UL) |
RAM2 available address space
Definition at line 161 of file efr32bg12p433f1024gl125.h.
| #define RAM_MEM_BASE ((uint32_t) 0x20000000UL) |
RAM base address
Definition at line 228 of file efr32bg12p433f1024gl125.h.
Referenced by CORE_InitNvicVectorTable(), and EMU_RamPowerDown().
| #define RAM_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM used bits
Definition at line 231 of file efr32bg12p433f1024gl125.h.
| #define RAM_MEM_END ((uint32_t) 0x2001FFFFUL) |
RAM end address
Definition at line 230 of file efr32bg12p433f1024gl125.h.
| #define RAM_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM available address space
Definition at line 229 of file efr32bg12p433f1024gl125.h.
Referenced by CORE_InitNvicVectorTable().
| #define SRAM_BASE (0x20000000UL) |
SRAM Base Address
Definition at line 241 of file efr32bg12p433f1024gl125.h.
Referenced by BUS_RamBitRead(), BUS_RamBitWrite(), and EMU_RamPowerDown().
| #define SRAM_SIZE (0x00040000UL) |
Available SRAM Memory
Definition at line 242 of file efr32bg12p433f1024gl125.h.
Referenced by EMU_RamPowerDown().
| #define TIMER_COUNT 2 |
2 TIMERs available
Definition at line 259 of file efr32bg12p433f1024gl125.h.
| #define TIMER_PRESENT |
TIMER is available in this part
Definition at line 258 of file efr32bg12p433f1024gl125.h.
| #define TRNG_COUNT 1 |
1 TRNGs available
Definition at line 283 of file efr32bg12p433f1024gl125.h.
| #define TRNG_PRESENT |
TRNG is available in this part
Definition at line 282 of file efr32bg12p433f1024gl125.h.
| #define USART_COUNT 4 |
4 USARTs available
Definition at line 263 of file efr32bg12p433f1024gl125.h.
| #define USART_PRESENT |
USART is available in this part
Definition at line 262 of file efr32bg12p433f1024gl125.h.
| #define VDAC_COUNT 1 |
1 VDACs available
Definition at line 279 of file efr32bg12p433f1024gl125.h.
| #define VDAC_PRESENT |
VDAC is available in this part
Definition at line 278 of file efr32bg12p433f1024gl125.h.
| #define WDOG_COUNT 2 |
2 WDOGs available
Definition at line 281 of file efr32bg12p433f1024gl125.h.
| #define WDOG_PRESENT |
WDOG is available in this part
Definition at line 280 of file efr32bg12p433f1024gl125.h.
| #define WTIMER_COUNT 2 |
2 WTIMERs available
Definition at line 261 of file efr32bg12p433f1024gl125.h.
| #define WTIMER_PRESENT |
WTIMER is available in this part
Definition at line 260 of file efr32bg12p433f1024gl125.h.
1.8.10 
